SN54LS257

QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS The LSTTL / MSI SN54 / 74LS257B and the SN54 / 74LS258B are Quad 2-Input Multiplexers with 3-state outputs. Four bits of data from two sources can be selected using a Common Data Select input. The four outputs present the selected data in true (non-inverted) form. The outputs may be switched to a high impedance state with a HIGH on the common Output Enable (EO) Input, allowing the outputs to interface directly with bus oriented systems. It is fabricated with the Schottky barrier diode process for high speed and is completely compatible with all Motorola TTL families. SN54/74LS257B SN54/74LS258B QUAD 2-INPUT MULTIPLEXER WITH 3-STATE OUTPUTS LOW POWER SCHOTTKY • • • • • • Schottky Process For High Speed Multiplexer Expansion By Tying Outputs Together Non-Inverting 3-State Outputs Input Clamp Diodes Limit High Speed Termination Effects Special Circuitry Ensures Glitch Free Multiplexing ESD > 3500 Volts CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 E0 15 I0c 14 I1c 13 Zc 12 I0d 11 I1d 10 Zd 9 J SUFFIX CERAMIC CASE 620-09 16 1 16 1 N SUFFIX PLASTIC CASE 648-08 SN54/74LS257B VCC = PIN 16 GND = PIN 8 16 1 D SUFFIX SOIC CASE 751B-03 1 S VCC 16 2 I0a E0 15 3 I1a I0c 14 4 Za I1c 13 5 I0b Zc 12 6 I1b I0d 11 7 Zb I1d 10 8 GND Zd 9 ORDERING INFORMATION SN54LSXXXJ SN74LSXXXN SN74LSXXXD NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. Ceramic Plastic SOIC SN54/74LS258B 1 S 2 I0a 3 I1a 4 Za 5 I0b 6 I1b 7 Zb 8 GND FAST AND LS TTL DATA 5-427 SN54/74LS257B D SN54/74LS258B LOGIC DIAGRAMS SN54 / 74LS257B E0 15 I0a 2 I1a 3 I0b 5 I1b 6 I0c 14 I1c 13 I0d 11 I1d 10 S 1 4 7 12 9 Za Zb Zc Zd SN54 / 74LS258B E0 15 I0a 2 I1a 3 I0b 5 I1b 6 I0c 14 I1c 13 I0d 11 I1d 10 S 1 VCC = PIN 16 GND = PIN 8 = PIN NUMBERS 4 7 12 9 Za Zb Zc Zd FAST AND LS TTL DATA 5-428 SN54/74LS257B D SN54/74LS258B FUNCTIONAL DESCRIPTION The LS257B and LS258B are Quad 2-Input Multiplexers with 3-state outputs. They select four bits of data from two sources each under control of a Common Data Select Input. When the Select Input is LOW, the I0 inputs are selected and when Select is HIGH, the I1 inputs are selected. The data on the selected inputs appears at the outputs in true (noninverted) form for the LS257B and in the inverted form for the LS258B. The LS257B and LS258B are the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select Input. The logic equations for the outputs are shown below: LS257B Za = E0 • (I1a • S + I0a • S) Zb = E0 • (I1b • S + I0b • S) Zc = E0 • (I1c • S + I0c • S) Zd = E0 • (I1d • S + I0d • S) When the Output Enable Input (E0) is HIGH, the outputs are forced to a high impedance “off” state. If the outputs are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure that Output Enable signals to 3-state devices whose outputs are tied together are designed so there is no overlap. LS258B Za = E0 • (I1a • S + I0a • S) Zb = E0 • (I1b • S + I0b • S) Zc = E0 • (I1c • S + I0c • S) Zd = E0 • (I1d • S + I0d • S) TRUTH TABLE OUTPUT ENABLE EO H L L L L SELECT INPUT S X H H L L DATA INPUTS I0 X X X L H I1 X L H X X OUTPUTS LS257B Z (Z) L H L H OUTPUTS LS258B Z (Z) H L H L H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care (Z) = High Impedance (off) GUARANTEED OPERATING RANGES Symbol VCC TA IOH IOL Supply Voltage Operating Ambient Temperature Range Output Current — High Output Current — Low Parameter 54 74 54 74 54 74 54 74 Min 4.5 4.75 – 55 0 Typ 5.0 5.0 25 25 Max 5.5 5.25 125 70 – 1.0 – 2.6 12 24 Unit V °C mA mA FAST AND LS TTL DATA 5-429 SN54/74LS257B D SN54/74LS258B DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified) Limits Symbol VIH VIL VIK VOH Parameter Input HIGH Voltage 54 Input LOW Voltage 74 Input Clamp Diode Voltage 54 Output HIGH Voltage 74 54, 74 VOL IOZH IOZL Output LOW Voltage 74 Output Off Current — HIGH Output Off Current — LOW Input HIGH Current Other Inputs S Inputs Other Inputs S Inputs IIL IOS Input LOW Current All Inputs Short Circuit Current (Note 1) Power Supply Current Total, Output HIGH ICC Total, Output LOW Total, Output 3-State LS257B LS258B LS257B LS258B LS257B LS258B 10 9.0 16 14 19 16 mA VCC = MAX – 30 0.35 0.5 20 – 20 20 40 0.1 0.2 – 0.4 – 130 V µA µA µA 2.4 3.1 0.25 0.4 V V 2.4 – 0.65 3.4 0.8 – 1.5 V V Min 2.0 0.7 V Typ Max Unit V Test Conditions Guaranteed Input HIGH Voltage for All Inputs Guaranteed Input LOW Voltage for All Inputs VCC = MIN, IIN = – 18 mA VCC = MIN, IOH = MAX, VIN = VIH or VIL per Truth Table IOL = 12 mA IOL = 24 mA VCC = VCC MIN, VIN = VIL or VIH per Truth Table VCC = MAX, VOUT = 2.7 V VCC = MAX, VOUT = 0.4 V VCC = MAX, VIN = 2.7 V IIH mA mA mA VCC = MAX, VIN = 7.0 V VCC = MAX, VIN = 0.4 V VCC = MAX mA mA Note 1: Not more than one output should be shorted at a time, nor for more than 1 second. AC CHARACTERISTICS (TA = 25°C, VCC = 5.0 V) See SN54LS251 for Waveforms Limits Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPLZ tPHZ Parameter Propagation Delay, Data to Output Propagation Delay, Select to Output Output Enable Time to HIGH Level Output Enable Time to LOW Level Output Disable Time to LOW Level Output Disable Time from HIGH Level Min Typ 10 12 14 14 20 20 16 18 Max 13 15 21 21 25 25 25 25 Unit ns ns ns ns ns ns Test Conditions Figures 1 & 2 CL = 45 pF Figures 1 & 2 Figures 4 & 5 Figures 3 & 5 Figures 3 & 5 Figures 4 & 5 CL = 45 pF RL = 667 Ω CL = 5.0 pF RL = 667 Ω FAST AND LS TTL DATA 5-430 -A- Case 751B-03 D Suffix 16-Pin Plastic SO-16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. 3. CONTROLLING DIMENSION: MILLIMETER. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. 751B 01 IS OBSOLETE, NEW STANDARD 751B 03. 16 9 -B1 8 P 8 PL 0.25 (0.010) M B M R X 45° G -TD 16 PL 0.25 (0.010) M C SEATING PLANE K T B S M F J A S DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 3.80 1.35 0.35 0.40 10.00 4.00 1.75 0.49 1.25 INCHES MIN MAX 0.386 0.150 0.054 0.014 0.016 0.393 0.157 0.068 0.019 0.049 1.27 BSC 0.19 0.10 0 0.25 0.25 7 0.050 BSC 0.008 0.004 0 0.009 0.009 7 ° ° ° ° 5.80 0.25 6.20 0.50 0.229 0.010 0.244 0.019 Case 648-08 N Suffix 16-Pin Plastic -A16 9 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. 3. CONTROLLING DIMENSION: INCH. DIMENSION L" TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B" DOES NOT INCLUDE MOLD FLASH. 5. 6. ROUNDED CORNERS OPTIONAL. 648 01 THRU 07 OBSOLETE, NEW STANDARD 648 08. B 1 8 F S C -TK SEATING PLANE L H G D 16 PL 0.25 (0.010) M J M T A M DIM A B C D F G H J K L M S MILLIMETERS MIN MAX 18.80 6.35 3.69 0.39 1.02 19.55 6.85 4.44 0.53 1.77 INCHES MIN MAX 0.740 0.250 0.145 0.015 0.040 0.770 0.270 0.175 0.021 0.070 2.54 BSC 1.27 BSC 0.21 2.80 7.50 0 0.38 3.30 7.74 10 0.100 BSC 0.050 BSC 0.008 0.110 0.295 0 0.015 0.130 0.305 10 ° ° ° ° 0.51 1.01 0.020 0.040 -A16 9 Case 620-09 J Suffix 16-Pin Ceramic Dual In-Line NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. -B1 8 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIM F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. C L 5. 620 01 THRU 08 OBSOLETE, NEW STANDARD 620 09. -TSEATING PLANE K E F D 16 PL 0.25 (0.010) M N G T A S M J 16 PL 0.25 (0.010) M T B S DIM A B C D E F G J K L M N MILLIMETERS MIN MAX 19.05 6.10 19.55 7.36 4.19 0.39 0.53 INCHES MIN MAX 0.750 0.240 0.770 0.290 0.165 0.015 0.021 1.27 BSC 1.40 1.77 0.050 BSC 0.055 0.070 2.54 BSC 0.23 0.27 5.08 7.62 BSC 0 0.100 BSC 0.009 0.011 0.200 0.300 BSC 0 ° 15 ° ° 15 ° 0.39 0.88 0.015 0.035 FAST AND LS TTL DATA 5-431 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. 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ASIA PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Center, No. 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong. ◊ FAST AND LS TTL DATA 5-432