HR1000A
Resonant Half-Bridge Controller
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The HR1000A is a controller designed specifically
for the resonant half-bridge topology. It provides
two
drive-signal
channels
that
output
complementary signals at a 50% duty cycle. An
internal fixed dead-time of 350ns between the
two complementary gate signals guarantees
zero-voltage switching during the transient and
enables high-frequency operation.
•
The integrated bootstrap diode simplifies the
external driving circuit for the high-side switch. It
can withstand up to 600V with immunity against
high dV/dt noise.
Modulating the switching frequency regulates the
topology output voltage. A programmable
oscillator can set both the maximum and
minimum switching frequencies.
The IC starts up at the programmed maximum
switching frequency and gradually slows until the
control loop takes over to prevent excessive
inrush current
The IC can be forced to enter a controlled burstmode operation at light-load to minimize the
power consumption and tighten output regulation.
Protections features—including latched shutdown,
auto-recovery, brown-out protection, and overtemperature
protection—improve
converter
design safety without engendering additional
circuit complexity.
The IC provide 1.5A/2A source/sink capability for
both high-side and low-side gate drivers.
The HR1000A is available in a SO-16 package.
•
•
•
•
•
•
•
•
•
•
•
50% Duty Cycle, Variable Frequency
Control For Resonant Half-Bridge Converter
600V High-Side Gate Driver with Integrated
Bootstrap Diode and High dV/dt Immunity
1.5A/2A Source/Sink Capability for Both
High-Side and Low-Side Gate Drivers
High-Accuracy Oscillator
Operates at up to 600kHz
Two-Level
Over-Current
Protection:
Frequency-Shift and Latched Shutdown with
Programmable Duration Time
Remote ON/OFF Control and Brown-Out
Protection through the BO Pin
Latched-Disable Input for Easy Protections
Implementation
Interfaces with PFC Controller
Programmable Burst-Mode Operation at
Light-Load
Non-Linear Soft-Start for Monotonic Output
Voltage Rise
SO-16 package
APPLICATIONS
•
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•
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LCD and PDP TVs
Desktop PCs and Servers
Telecom SMPS
AC-DC Adapter, Open-Frame SMPS
Video Game Consoles
Electronic Lighting Ballast
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance. “MPS” and “The
Future of Analog IC Technology” are Registered Trademarks of Monolithic
Power Systems, Inc.
HR1000A Rev. 1.02
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1
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
TYPICAL APPLICATION BLOCK DIAGRAM
HR1000A Rev. 1.02
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2
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
ORDERING INFORMATION
Part Number*
Package
Top Marking
HR1000AGS
SOIC16
HR1000A
* For Tape & Reel, add suffix –Z (e.g. HR1000AGS–Z).
PACKAGE REFERENCE
TOP VIEW
SS
1
16
BST
TIMER
2
15
HG
CT
3
14
SW
Fset
4
13
N.C.
Burst
5
12
VCC
CS
6
11
LG
BO
7
10
GND
LATCH
8
9
PFC
ABSOLUTE MAXIMUM RATINGS (1)
Symbol
VBST
VSW
dVSW/dt
VCC
VPFC
IPFC
IFset
LG
PIC
TJ
TLead
TStorage
Pin
16
14
14
12
9
9
4
11
1 to 8
Parameter
Floating supply voltage
Floating ground voltage
Floating ground max. slew rate
IC supply voltage (ICC16V or
VLATCH>1.85V or VCS>1.5V or VTIMER>3.5V or VBO5.5V or OTP)
IC supply current (VCC)
Start-up current (Before the device turns on,
VCC=VCCH-0.2V)
Quiescent current (Device on, VBurst=1V)
Operating current (Device on, VBurst=VFset)
Residual consumption (VCC>16V or VCC1.85V or VCS>1.5V or VTIMER>3.5V or VBO5.5V or OTP)
High-side floating-gate-driver supply (BST, SW)
BST pin leakage current (VBST=600V)
SW pin leakage current (VSW=582V)
Input bias current (VCS=0 to VCSlatch)
Leading-edge blanking
Frequency shift threshold
Latch-off threshold
Line voltage sensing (BO)
Threshold voltage
Clamp level
Current Hysteresis (VCC>5V, VBO=0.3V)
Latch function (LATCH)
Input bias current (VLATCH=0 to Vth)
LATCH threshold
Oscillator
Output duty cycle
Oscillation frequency
Dead-time
CT peak value
CT valley value
Voltage reference at Fset pin
PFC function (PFC)
Low saturation level (IPFC=1mA, VLATCH=2V)
Soft start function (SS)
Discharge resistance (VCS>VCSx)
Standby function (Burst)
Disable threshold
Hysteresis
Vhys
2.5
V
IClamp
6
mA
VClamp
15.3
V
Istart-up
250
300
µA
Iq
Iop
1.5
3
2
5
mA
mA
Ir
350
400
µA
10
10
1
ILKBST
ILKSW
ICS
tLEB
VCSx
VCSlatch
0.75
1.41
250
0.8
1.5
0.85
1.59
µA
µA
µA
ns
V
V
Vth
Vclamp
IHyst
1.2
5.1
9
1.25
5.5
12
1.3
5.8
15
V
V
µA
ILATCH
Vth
1.75
1.85
1
1.95
µA
V
48
50
300
350
3.8
0.9
2
52
600
400
2.08
%
kHz
ns
V
V
V
0.2
V
D
fosc
tD
VCFp
VCFv
VREF
1.92
VL
R
Vth
Vhys
120
1.18
1.23
100
Ω
1.28
HR1000A Rev. 1.02
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V
mV
4
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
ELECTRICAL CHARACTERISTICS (continued)
TJ=25°C, VCC=13V, CHG=CLG=1nF; CT=470pF, RFset=12kΩ, unless otherwise specified.
Parameter
Delayed shutdown (TIMER)
Charge current (VTIMER=1V, VCS=0.85V)
Threshold for forced operation at maximum
frequency
Shut down threshold
Restart threshold
Low-side gate driver (LG, referenced to GND)
Peak source current
Peak sink current
Sourcing resistor
Sinking resistor
Fall time
Rise time
UVLO saturation (VCC=0 to VCCH, Isink=2mA)
High side gate driver (HG, referenced to SW)
Peak source current
Peak sink current
Sourcing resistor
Sinking resistor
Fall time
Rise time
Thermal Shutdown
Thermal shutdown threshold
Thermal shutdown recovery threshold
Symbol
Min
Typ
Max
Unit
ICHARGE
80
130
180
µA
Vth1
1.88
2
2.08
V
Vth2
Vth3
3.3
0.25
3.5
0.3
3.7
0.35
V
V
Isourcepk
Isinkpk
Rsource
Rsink
tf
tr
1.5
2
1.1
A
A
Ω
Ω
ns
ns
V
Isourcepk
Isinkpk
Rsource
Rsink
tf
tr
4
2
20
20
1.5
2
A
A
Ω
Ω
4
2
20
20
ns
ns
150
120
°C
°C
HR1000A Rev. 1.02
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HR1000A – RESONANT HALF-BRIDGE CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS
Performance waveforms are generated using the evaluation board built with design example on
page 21. VAC=230V, Vout=19V, Iout=4.7A, TA=25°C, unless otherwise noted.
100
15.8
10.0
Operating @50kHz
15.7
15.6
10
Quiescent
ICC (mA)
Falling
1
Rising
15.5
15.4
1.0
15.3
Residual
15.2
0.1
15.1
Start-up
0.1
-50
0.01
0
5
10
15
20
0
50
100
15.0
150
14.9
-50
Current Sense Threshold
vs. TJ
12
11
5
9
8
VCC Falling
7
6
5
4
-50
0
50
100
150
BO THRESHOLD (V)
OCP THRESHOLD (V)
VCC Rising
1.5
1.0
0.5
-50
0
50
100
150
50
100
150
6
2.0
10
0
Clamp
4
3
2
Enable
1
0
-50
0
50
100
150
TEMPERATURE ( C)
20
17
2.0
1.1
1.9
1.05
1.8
1
1.7
0.95
14
11
8
5
-50
0
50
100
150
1.6
-50
0
50
100
150
0.9
-50
0
50
HR1000A Rev. 1.02
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100
150
6
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are generated using the evaluation board built with design example on
page 21. VAC=230V, Vout=19V, Iout=4.7A, TA=25°C, unless otherwise noted.
Oscillator Frequency vs.
Frequency-Set Resistance
1000
1.2
4.0
220pF
330pF
Fsw (kHz)
100
1
3.5
470pF
680pF
10
2.2nF
0.9
1nF
CT VOLTAGE (V)
1.1
Peak value
3.0
2.5
2.0
1.5
Valley value
1.0
0.5
0.8
-50
0
50
100
1
150
Current Mirror Ratio vs. TJ
10
0
-50
100
Reference Voltage vs. TJ
1.04
1.01
1.00
0.99
0
50
100
Delay Shutdown Charge
Current vs. TJ
160
140
120
100
80
-50
0
50
100
TEMPERATURE ( C)
150
2.2
2.1
2.0
1.9
1.8
1.7
-50
150
100
150
0
50
100
150
1.40
Restart
1.35
1.30
Disable
1.25
1.20
1.15
-50
0
50
100
150
OCP Delay Threshold vs. TJ
DELAY SHUTDOWN THRESHOLD (V)
0.98
-50
50
1.45
STANDBY THRESHOLD (V)
REFERENCE VOLTAGE (V)
CURRENT MIRROR RATIO (V)
1.02
0
Standby Threshold vs. TJ
2.3
1.03
180
1
4.0
3.5
3.0
2.5
Shut down
Force to Max Fsw
2.0
1.5
1.0
Restart
0.5
0
-50
0
50
100
150
TEMPERATURE ( C)
HR1000A Rev. 1.02
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2/24/2014
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HR1000A – RESONANT HALF-BRIDGE CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are generated using the evaluation board built with design example on
page 21. VAC=230V, Vout=19V, Iout=4.7A, TA=25°C, unless otherwise noted.
Efficiency
Steady State
Steady State
VOUT = 19V, IOUT = 4.7A
VOUT = 19V, IOUT = 0A
95
90
85
VSW
100V/div.
VSW
100V/div.
80
VLG
10V/div.
VLG
10V/div.
IR
1A/div.
75
IR
1A/div.
70
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
IOUT (A)
Steady State
Steady State
Start-up
VOUT = 19V, IOUT = 4.7A
VOUT = 19V, IOUT = 0A
VOUT = 19V, IOUT = 0A
VLG
5V/div.
VOUT_RIPPLE
/AC
100mV/div.
VOUT_RIPPLE
/AC
100mV/div.
VOUT
10V/div.
IR
2A/div.
Start-up
Shutdown
Shutdown
VOUT = 19V, IOUT = 4.7A
VOUT = 19V, IOUT = 0A
VOUT = 19V, IOUT = 4.7A
VLG
5V/div.
VLG
5V/div.
VLG
5V/div.
VOUT
10V/div.
IR
2A/div.
VOUT
10V/div.
IR
2A/div.
VOUT
10V/div.
IR
2A/div.
HR1000A Rev. 1.02
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2/24/2014
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HR1000A – RESONANT HALF-BRIDGE CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Performance waveforms are generated using the evaluation board built with design example on
page 21. VAC=230V, Vout=19V, Iout=4.7A, TA=25°C, unless otherwise noted.
SCP Entry
SCP Entry
SCP then Power-on
VOUT = 19V, IOUT = 0A
VOUT = 19V, IOUT = 4.7A
VOUT = 19V
VOUT
10V/div.
VOUT
10V/div.
VOUT
10V/div.
VLG
10V/div.
VLG
10V/div.
VLG
10V/div.
IR
2A/div.
IR
2A/div.
IR
2A/div.
HR1000A Rev. 1.02
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HR1000A – RESONANT HALF-BRIDGE CONTROLLER
PIN FUNCTIONS
Pin #
Name
1
SS
2
TIMER
3
CT
4
Fset
5
Burst
6
CS
Description
Soft-start. Connect an external capacitor with this pin to GND and a resistor to Fset pin to
set the maximum oscillator frequency and the time constant for the frequency shift during
start-up. An internal switch discharges the capacitor when the chip turns off (VCC < UVLO,
VCC > 16V, BO < 1.25V or > 5.5V, LATCH > 1.85V, CS >1.5V, TIMER > 2V, thermal
shutdown) to guarantee soft-start when the current sense pin voltage exceeds 0.8V, and as
long as it stays above 0.75V.
Period between over-current and shutdown. Connect a capacitor and a resistor from this
pin to GND to set both the maximum duration from an over-current condition before the IC
stops switching, and the delay before the IC resumes switching. Each time the CS pin
voltage exceeds 0.8V, an internal 130µA source charges the capacitor; an external resistor
slowly discharges this capacitor. If the pin voltage reaches 2V, the soft-start capacitor
discharges completely, pushing the switching frequency to its maximum value; the 130µA
source remains on. When the voltage exceeds 3.5V the IC stops switching and the internal
current source turns off so that the pin voltage decays. The IC enters soft-started when the
voltage drops below 0.3V. This allows the converter to work intermittently with very low
average input power under short-circuit conditions.
Time-Set. An internal current source programmed by the external network connected to pin
4 charges and discharges a capacitor connected to GND. Determines the converter’s
switching frequency.
Switching Frequency Set. Provides a precise 2V reference. A resistor connected from this
pin to GND defines a current that sets the minimum oscillator frequency. Connect the
phototransistor of an opto-coupler to this pin through a resistor to close the feedback loop
that modulates the oscillator frequency to regulate the converter output voltage. The value
of this resistor will set the maximum operating frequency. An R-C series connected from
this pin to GND sets frequency shift at start-up to prevent excessive energy inrush (softstart).
Burst-Mode Operation Threshold. The pin senses some voltage related to the feedback
control, which is compared to an internal reference (1.25V). If the voltage on the pin is
lower than the reference, the IC enters an idle state and reduces its quiescent current. The
chip resumes switching when the voltage exceeds the reference by 50mV. Soft-start is not
invoked. This function enables burst-mode operation when the load falls below a
programmed level, determined by connecting an appropriate resistor to the opto-coupler to
pin Fset (see block diagram). Tie the pin to Fset if burst-mode is not used.
Primary-Current Sense. Uses a sense resistor or a capacitive divider to sense the primary
current. The voltage signal requires an averaging filter because this input is not intended
for cycle-by-cycle control. As the voltage exceeds a 0.8V threshold (with 50mV hysteresis),
the soft-start capacitor on pin 1 discharges internally: The frequency increases, limiting the
power throughput. Under an output short circuit, this normally results in a nearly-constant
peak-primary current. A timer set on pin 2 limits the duration of this condition. If the current
continues to build up despite the frequency increase, a second comparator referenced at
1.5V latches the device off and brings its consumption up to about pre-start-up levels. The
information is latched, requiring cycling the IC supply voltage to restart: The latch is
removed as the VCC voltage drops below the UVLO threshold. Tie the pin to GND if the
function is not used.
HR1000A Rev. 1.02
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10
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
PIN FUNCTIONS (continued)
Pin #
Name
7
BO
Description
Input Voltage Sense. Connect to the high-voltage input bus through the tap of a resistor
divider to perform either AC or DC (in systems with PFC) brownout protection. A voltage
below 1.25V shuts down (without latching) the IC, lowers its consumption and discharges
the soft-start capacitor. The IC operation resumes (with soft-start) when the voltage
exceeds 1.25V. The comparator has current hysteresis: An internal 12µA current source is
ON as long as the applied voltage is below 1.25V, and is OFF if this value is exceeded.
Bypass the pin with a capacitor to GND to reduce noise pick-up. An internal Zener diode
top-limits the pin voltage. Activating the Zener diode causes the IC to shut down (without
latching). Bias the pin between 1.25V and 5.5V if the function is not used.
LATCH
IC Latch. Connects internally to a comparator that—when the pin voltage exceeds 1.85V—
shuts the IC down and brings its consumption to near pre-start-up levels. The latch is
removed as the VCC voltage goes below the UVLO threshold. Tie the pin to GND if the
function is not used.
9
PFC
Interface to the front-end PFC. This pin—normally high—stops the PFC controller for
protection purposes or during burst-mode operation. It goes low when the IC shuts down
from the following conditions: VCC > 16V, LATCH > 1.85V, CS > 1.5V, BO > 5.5V, thermal
shutdown and BURST < 1.25V. The pin also goes low when the voltage on TIMER
exceeds 2V, and goes back open as the voltage falls below 0.3V. During UVLO, it is open.
Leave the pin unconnected if not used.
10
GND
Ground. Current return for both the low-side gate-driver current and the IC bias current. Tie
all bias component ground connections to a trace to this pin. Keep separate from any
pulsed current return.
11
LG
Low-Side Gate Driver. The driver is capable of a minimum 0.5A source and a minimum 1A
sink-peak current to drive the lower MOSFET of the half-bridge leg. The pin is actively
pulled to GND during UVLO.
12
VCC
Supply Voltage. Supplies both the IC signal and the low-side gate driver. Sometimes a
small bypass capacitor (e.g., 0.1µF) can help provide a clean bias voltage for the IC signal.
13
N.C.
High-Voltage Spacer. Not internally connected—isolates the high-voltage pin and eases
compliance with safety regulations (creepage-distance) on the PCB.
14
SW
High-Side Switch Source. Current return for the high-side gate-drive current. Requires
careful layout to avoid large spikes below ground.
15
HG
High-Side Floating Gate-Driver. Capable of minimum 0.5A source and minimum 1A sinkpeak current to drive the upper MOSFET of the half-bridge leg. An internal resistor
connected to pin 14 (SW) ensures that the pin does not floating during UVLO.
16
BST
High-Side Gate Driver for Floating Voltage Supply. Connect a bootstrap capacitor between
this pin and pin 14 (SW)—fed by an internal bootstrap diode driven in-phase with the lowside gate-drive.
8
HR1000A Rev. 1.02
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11
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
BLOCK DIAGRAM
Figure 1: Functional Block Diagram
HR1000A Rev. 1.02
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12
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
FUNCTIONAL DESCRIPTION
Oscillator
The charge/discharge time of the CT capacitor
determines the oscillator frequency. The
voltage on the CT capacitor fluctuates between
the peak threshold and valley threshold to form
a triangle waveform. Figure 2 shows the
detailed waveform during steady state.
source-1 (IS-1) to charge the CT capacitor. Here,
the current mirror ratio inside the HR1000A is
1A/A. When a switching cycle starts, IS-1
charges the CT capacitor until the voltage
triggers the peak threshold voltage. Then the
discharge current source (IS-2) with twice the
source current of the Fset pin turns on.
Therefore, the CT capacitor discharges with the
source current of the Fset pin. When the
voltage on the CT capacitor drops to the valley
threshold voltage, the IS-2 turns off and then a
new switching cycle is enabled.
Based on the block diagram shown in Figure 3,
the Fset RC network functions as described:
Figure 2: CT Waveform and Gate Signal
The network connecting the Fset pin
charges/discharges the current on the CT
capacitor, as Figure 3 shows. The source
current of the Fset pin controls the current
1. Rfmin from the Fset pin to GND sets the
maximum resistance of external RC network
when the phototransistor is blocked,
therefore setting the Fset minimum source
current, which sets the minimum switching
frequency;
Figure 3: Oscillator Block Diagram
HR1000A Rev. 1.02
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13
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
2. Under normal operation, the phototransistor
modulates the current flow through Rfmax to
modulate the frequency for output voltage
regulation. When the phototransistor is
saturated, the current flow through Rfmax is
at its maximum, setting the frequency at its
maximum
3. A series RC circuit connected between Fset
and GND determines the frequency shift at
start-up. (Please see the soft-start section
for details.)
Based on the previous principles, the following
equations describe the minimum and maximum
frequency:
fmin =
fmax =
Burst pin drops below 1.25V, HR1000A will shut
down the HG and LG gate drive outputs,
leaving only the 2V reference voltage on the
Fset pin and the SS pin to retain the previous
state and minimize HR1000A’s power
consumption. When the voltage on the Burst
pin exceeds 1.25V by 50mV, HR1000A
resumes normal operation.
Based on the Burst-mode operating principle,
the Burst pin voltage must connect to the
feedback loop. Figure 4 shows a typical circuit
connect the Burst pin to the feedback signal for
narrow-input–voltage range applications:
1
3 ⋅ CT ⋅ Rfmin
1
3 ⋅ CT ⋅ (Rfmin || Rfmax )
Typically, the CT capacitance is between 0.1nF
and 1nF, so the values of Rfmin and Rfmax are:
Rfmin =
1
3 ⋅ CT ⋅ fmin
Rfmax =
Rfmin
fmax
−1
fmin
For the CT capacitance selection, here is a note
for low temperature and high switching
frequency application: when the temperature is
low, the source current capability of Fset pin
drops a little due to the property of internal
transistor circuit, which means there might be
not big enough current to charge/discharge the
large CT capacitor. So a small CT cap
(5.5V);
•
Latch pin HIGH (Latch>1.85V);
•
TIMER pin voltage exceeding
without dropping to 0.3V; and
•
over-temperature protection triggering.
input
burst-mode
over-voltage
2V
Shutdown the PFC to reduce power
consumption or to protect the system. Figure 7
shows the typical application circuit between
the HR1000A and the PFC controller
(MP44010/1 is a PFC Controller).
Figure 7: Communication Circuit between
HR1000A and PFC Controller
If this function is not used, PFC pin can float.
HR1000A Rev. 1.02
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2/24/2014
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15
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
Soft-Start Operation
For the resonant half-bridge converter, the
power delivered is inversely proportional to the
switching frequency. To achieve soft-start, start
the switching frequency with a high value until
the value is controlled by the closed loop.
The converter + HR1000A can easily achieve
soft-start using an external RC series circuit as
shown in Figure 8.
Rss =
Css =
Rfmin
fstart
−1
fmin
3 ⋅ 10-3
Rss
Select an initial frequency, fstart, at least 4×fmin.
Select CSS as a trade-off between the desired
soft-start operation and the OCP speed (see
the next section for details).
Current Sensing
Figure 9 shows the current sense block
diagram.
Figure 8: Soft-Start Block
When start-up begins, the SS voltage is 0V, so
the soft-start resistor (RSS) is in parallel to Rfmin:
Rfming and RSS determine the initial frequency as:
fstart =
1
3 ⋅ CT ⋅ (Rfmin ||Rss )
During start-up, the CSS charges until its voltage
reaches the reference–2V, and the current flow
through RSS drops to zero. This period takes
about 5×(RSS×CSS). During this period, the
switching frequency changes following an
exponential curve: the CSS charge initially
decays relatively quickly but the rate
progressively slows.
After this period ends, the output voltage is not
still close to the setting value, so the feedback
loop will take over start-up.
With soft-start, the input current increases
gradually until the output voltage reaches the
setting point with little overshoot.
Select the soft-start RC network as per the
equations below:
Figure 9: Current Sensing Block Diagram
There are two levels over-current protection.
The first level occurs when the CS voltage
exceeds 0.8V, the comparator triggers the
control logic to output a high-level control signal
that turns on the transistor connecting SS and
GND. Then the CSS voltage drop results a sharp
increase in oscillator frequency, and therefore
reduces the energy transferred to the output.
When the CS pin voltage drops back to
0.79V,the converter resumes normal operation
with the help of the 10mV hysteresis.
Generally, the CS pin voltage continues to rise
during a short circuit. The second level overcurrent protection triggers when the CS pin
voltage rises to 1.5V. Then the IC is latched at
very low consumption (residual consumption in
EC table).
For two-level protection, a very large CSS slows
the discharge to the point that the transformer
and the resonant inductor saturate and
damages the secondary diode.
HR1000A Rev. 1.02
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16
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
To design the lossless current sensing network,
consider these two conditions:
1. R1 is smaller than several hundred ohms.
The sensing network acts as a capacitive
current divider. Use the equations below:
C1 ≤
R2 =
Figure 10: Current Sensing with a Sense
Resistor
There are two types of current sensing methods:
one uses a sense resistor in series with the lowside MOSFET; the other uses a lossless
current-sensing network. The first method is
simple but causes some unnecessary power
consumption.
Calculate the sense resistor using the following
equation:
RS =
4
ICrpk
Where ICrpk is the desired peak current through
the primary MOSFET for the resonant capacitor
at low input voltage and full load.
Since the circuit require an RC filter between
the sensing resistor and CS pin, select an RC
time constant at around 10/fmin.
Figure 11: Current Sensing with Lossless
Network
Cr
100
0.8 ⋅ π
Cr
⋅ (1 +
)
ICrpk
C1
2. R1 is ~10kΩ. The sensing network acts to
divide the ripple voltage on Cr. Design for
this condition as per the equations below:
C1 ≤
R2 =
Cr
100
2
2
0.8 ⋅ π R1 + XC1
⋅
ICrpk
XCr
Calculating the reactance of C1 and Cr at the
frequency where the maximum peak resonant
current occurs. Empirically, the R2 and C2 time
constant is about 10/fmin.
Depending on the circuit, consider the
calculated value as a cut value that requires
adjustments based on experimental results to
meet the design target.
The OCP can limit the energy transferred from
the primary to the secondary during over-load
or short-circuit period. However, excessive
power consumption due to high continuous
currents can damage the secondary-side
windings and the rectifiers. The HR1000A
provides additional protection to reduce the
average power consumption during OCP: When
OCP triggers, the converter enters a hiccup-like
protection mode that operates intermittently.
Set the maximum over-load or short circuit
operating time (tOC) by selecting appropriate
CTimer and RTimer. During the first OCP level
when the CS voltage exceeds 0.8V, an internal
130µA current source turns on to charge CTimer.
When the voltage on CTimer reaches 2V, the CSS
voltage drops below the OCP comparator
output. This forces the switching frequency to
equal fstart to minimize the transferred energy.
tOC is the time for the voltage on CTimer to rise
HR1000A Rev. 1.02
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17
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
from 0V to 2V. However, there is no simple
relationship between tOC and CTimer. Select CTimer
based on experimental results (based on
experiments: CTimer may increase operating time
by 100ms).
Latch Operation
After the voltage on CTimer rises to 2V, the
130uA current source continues to charge it
until the voltage reaches the shutdown
threshold (3.5V). This period is approximately:
t OP = 10 4 ⋅ t Timer
tOC
tOP
tSTOP
Figure 13: Latch Function Block
tSS
VCC
SS
t
2V
t
ICr
CS 0.8V
t
TIMER 3.5V
t
2V
0.3V
Vout
t
PFC
t
Normal
operation
Over load /
Short circuit
Shutdown
Soft-start
t
Pmin
Figure 12: Delayed Shutdown and Soft-start Time
Sequence
During this period, the switching frequency
remains at fstart to limit the energy transferred.
When the shutdown threshold triggers, the gate
drive turns off and the 130µA current source
shuts down. Then RTimer slowly discharges CTimer.
This procedure lasts until the CTimer voltage
drops below 0.3V, then the IC restarts. This
time period is:
3.5
t OFF =RTimer ⋅ CTimer ⋅ ln
≈ 2.5RTimer ⋅ CTimer
0.3
The HR1000A provides a simple latch-off
function through the Latch pin. Applying an
external voltage >1.85V causes the IC to enter
a latched shutdown. After IC is latched, its
consumption drops, as shown by the residual
current in the EC table. Resetting the IC
requires dropping the VCC voltage below the
UVLO threshold.
Input Voltage Sensing
The HR1000A can stop when the input voltage
drops below a specified value, and then
restarted when the input voltage goes back to
normal. This function guarantees that the
resonant half-bridge converter always operates
within the specified input voltage range. The IC
senses voltage on BO through the tap of a
resistor divider connected to the rectified AC
voltage or the PFC output.
Figure 14 shows the line-sensing internal block
diagram.
HV Input bus
Shutdown
RH
Figure 12 shows the operation’s time sequence.
RL
5.5V
BO 7
VinOK
12μA
1.25V
HR1000A
Figure 14: Input Voltage Sensing Block
HR1000A Rev. 1.02
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18
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
The internal 12µA current source turns on when
the BO voltage drops below 1.25V, and turns
off when the BO voltage exceeds 1.25V. When
the BO voltage drops below 1.25V, the IC shuts
down the gate drive, and consumes very little
power as per the residual current in the EC
table. Calculate the input-voltage resistor
divider with the desired ON (VinON) and OFF
(VinOFF) input voltage as below:
RH =
VinON -VinOFF
12 ⋅ 10 −6
RL = RH ⋅
1.25
VinOFF − 1.25
For additional protection, when the BO voltage
exceeds the internal 5.5V clamp voltage, the IC
will shutdown. When the BO voltage is between
1.25V and 5.5V, the IC will restart.
High-Side Gate Driver
The external BST capacitor provides energy to
the high-side gate driver. An integrated
bootstrap diode charges this capacitor through
VCC. This diode simplifies the external driving
circuit for the high-side switch, allowing the BST
capacitor to charge when the low side MOSFET
is on.
Figure 15: High-Side Gate Driver
Low-Side Gate Drive
The LG pin provides the gate driver signal for
the low-side MOSFET. The maximum absolute
rating table shows that the maximum LG pin
voltage is 16V. Under some conditions, a large
voltage spike occurs on the LG pin due to
oscillations from the long gate-driver wire, the
MOSFET parasitic capacitance, and the small
gate-driver resistor. This voltage spike is
dangerous to the LG pin, so add a 15V Zener
diode close to the LG and GND pins.
To provide enough gate driver energy and
considering the BST capacitor charge time, use
a 100nF-to-1μF capacitor for the BST capacitor.
Figure 16: Low-Side Gate Driver
HR1000A Rev. 1.02
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19
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
Layout Guideline
PCB layout is critical to the circuit normal
operation, EMI performance, surge and thermal.
So designer must pay attention to the layout
guide as follows:
1) The loop of the main power flow should be as
short as possible, and the wire should be as
wide as possible.
2) Separate the power GND from the signal
GND, try to connect the two GND at the
minus of bulky capacitor.
3) The peripheral components from pin 1 to pin
8 shall be placed as close as possible to the
corresponding pin.
4) The feedback wire from opto-coupler shall be
rooted as close as possible to the IC and be
far away from hot spot, like SW, HG etc.
Vbus
AC
input
C14
Q4
PGND
L6
Vcc
12
LG 11
GND 10
9
PFC
VCC
N.C. 13
SW 14
HG 15
BST 16
Q3
C22
C23
High current
loop
C24
T1
SGND
HR1000A
8 LATCH
3 CT
4 Fset
5 Burst
6 CS
7 BO
1 SS
2 TIMER
Vbus
C4
R21+R22
D13
C26
C25
R27
C27
C15
R26
C21
R34
R32
Parts from pin 1 to pin 8
should be placed as close
as possible with short wire
R23
R26
D14
PC817
C3
R35
Feedback root from PC817 to IC
should be short and be farm away
from high voltage swing spot
Figure 17: Key Notes for Layout Guideline
HR1000A Rev. 1.02
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20
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
Design Example
A 90W adatptor
specifications:
is
Input AC voltage
Output voltage
Output current
designed
with
90-265VAC
19V
4.7A
beow
Figure 18 shows the detailed application
schematic. The typical performance and circuit
waveforms have been shown in the Typical
Performance Characteristics section.
Figure 18: Design Example for 19V/4.7A Output
HR1000A Rev. 1.02
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21
HR1000A – RESONANT HALF-BRIDGE CONTROLLER
FLOW CHART
START
VCC capacitor is charged
through pull-up resistor
N
VCC>10.5V
Y
Soft Start
N
Normal Operation
switching frequency
is modulated by IFset
Latched
Shutdown
OCP
OCP
OTP
Brown-out
UVLO
Burst
Mode
Monitor LATCH
Monitor CS
Monitor TIMER
Monitor Thermal
Monitor BO
Monitor VCC
Monitor Burst
LATCH>1.85V
N
Y
Y
1. Latch off the
switching pulse
2. Soft start
capacitor fully
discharged
3. PFC pin pulled
low
N
CS>0.8V
1. Increase the
switching
frequency
2. Soft start
capacitor
begin to
discharge
3. TIMER
capacitor is
charged by an
internal 150uA
current source
VCC2V
Y
1. Stop the
switching pulse
2. Soft start
capacitor fully
discharged
3. PFC pin pulled
low
1. Switching
frequency is
pushed to
maximum value
2. Soft start
capacitor fully
discharge
3. TIMER
capacitor is
charged by an
internal 150uA
current source
4 PFC pin pulled
low
N
VCC
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