MP1251DS-LF

MP1251/MP1252 SMBus Voltage Source Monolithic Power Systems General Description PRELIMINARY Features The MP1251 and MP1252 are voltage sources with SMBus interfaces. These ICs have a D/A converter that outputs a voltage based on an internal reference. The MP1251 output voltage has 32 voltage steps from 0.0V to 2.0V. The MP1252 output voltage has 32 voltage steps from 0.0V to 1.9V. The MP1251 and MP1252 have three additional outputs based on the unused three lower bits on the SMBus interface. These outputs can be used for additional controls. D/A converter. Series/Synchronous SMBus interface 32 step output voltage control Three outputs from unused SMBus data bits. 2% Internal Reference Applications Ideal for brightness control of CCFL in notebook applications Ordering Information Part Number ∗ Package Temperature MP1251DS SOIC8 -40°C to +85°C MP1252DS SOIC8 -40°C to +85°C ∗ For Tape & Reel use suffix - Z (i.e., MP1251DS-Z) Figure 1: Block Diagram SMBC SMBus INPUT FROM CPU SMBD ADJ 5 BIT DAC IN SMBus INTERFACE 5V L0 L1 LSB TO LSB+2 OUTPUTS BANDGAP REFERENCE GND MP1251/2 Rev 1.7_03/06/03 L2 www.monolithicpower.com 1 MP1251/MP1252 SMBus Voltage Source Monolithic Power Systems PRELIMINARY Absolute Maximum Ratings Recommended Operation Conditions VIN Logic Inputs Junction Temperature Storage Temp VIN Operating Temperature 7.0V -0.3V to VIN +0.3V 150Deg°C -55Deg°C to 150Deg°C 4.5V to 5.5V -40 to +85°C Thermal Characteristics Thermal Resistance SOIC8 105°C/W Electrical Characteristics (Unless otherwise specified TA=25°C) Parameters Symbol Conditions Min Typ Max Units Dimming D/A Output (ADJ- Floating) Maximum Level (MP1251) Minimum Level (MP1251) VIN=5V, Data=00000xxx VIN=5V, Data=11111xxx 1.925 0.0 2.0 0.05 2.075 0.1 V V Maximum Level (MP1252) Minimum Level (MP1252) VIN=5V, Data=00000xxx VIN=5V, Data=11111xxx 1.825 0.0 1.9 0.05 1.975 0.1 V V Power-on Reset Default Setting Time D/A output levels 3.5 10 32 V µS Supply Voltage VIN current – Active 150 200 300 µA Note: VADJ (DATA [7:3]) = (1- ( DATA [7:3] / 31))* Maximum Level Pin Description SMBC 1 8 IN SMBD 2 7 L0 ADJ 3 6 L1 GND 4 5 L2 Table 1: Pin Designators Pin # 1 2 3 4 5 6 7 8 Pin Name SMBC SMBD ADJ GND L2 L1 L0 IN MP1251/2 Rev 1.7_03/06/03 Pin Function SMBus Clock Input/Output SMBus Data Input/Output The output of the brightness D/A converter. Ground Output of data bus bit D2 Output of data bus bit D1 Output of data bus bit D0 Supply Voltage www.monolithicpower.com 2 MP1251/MP1252 SMBus Voltage Source Monolithic Power Systems PRELIMINARY Two-Wire Bus Register Description The register map between the SMBus interface and the SMBus Host: Register Map Address SMBus Protocol: Read or Write Byte Input/Output: Byte-bit flags mapped as follows: # Bits 8 Name A7 - A0 R/W W Value 01011000 (58h) R 01011001 (59h) R/W W Value 10101010 (AAh) R 00000000 (00h) Description 1. Bits A7 – A1 are the base address. 2. A0 is the read selection bit. A0 is zero for write. 3. The host outputs both write and read addresses. Index # Bits 8 Name B7 - B0 Description 1. The host outputs the write index. 2. The MP1251 or MP1252 outputs the read index. Brightness # Bits 8 Name D7 - D0 R/W R/W Default 00000000 Description 1. Bits D7 – D3 contain the brightness level settings. 2. Only D7 – D3 are used to step the 32 levels. 3. When D7 – D0 = 1111 1xxx, the MP1251 or MP1252 outputs the minimum voltage. When D7 – D0 = 0000 0xxx, the outputs are at a maximum level. 4. D2 – D0 are outputted as L2 – L0 for the customer use. 5. The host outputs the write brightness. 6. The MP1251 or MP1252 outputs the read brightness. Note: VADJ (DATA [7:3]) = (1- ( DATA [7:3] / 31))* Maximum Level MP1251/2 Rev 1.7_03/06/03 www.monolithicpower.com 3 MP1251/MP1252 SMBus Voltage Source Monolithic Power Systems PRELIMINARY Communication Protocol The MP1251 or MP1252 uses “Write Byte Protocol” and “Read Byte Protocol” to communicate with the host. The “Write Byte Protocol” can be used by the host to write to the Data Register, while the “Read Byte Protocol” is used to read data from the Data Register. The base address for the SMBus is 58hex. [ ] MP1251 or MP1252 to Master [ ] Master to MP1251 or MP1252 Two Wire Read Protocols ADDRESS S 7 0101100 Start Condition DATA BYTE INDEX 0 1 A 0000000 0 A Brightness A P Stop Condition Read A = Acknowledge Two Wire Write Protocols Write D/A Output ADDRESS S 7 0101100 Start Condition DATA BYTE INDEX 0 0 A 1010101 0 A Brightness A P Stop Condition Read A = Acknowledge MP1251/2 Rev 1.7_03/06/03 www.monolithicpower.com 4 MP1251/MP1252 SMBus Voltage Source Monolithic Power Systems PRELIMINARY Packaging SOIC8 PIN 1 IDENT. 0.229(5.820) 0.244(6.200) NOTE 3 0.150(3.810) 0.157(4.000) 0.0075(0.191) 0.0098(0.249) SEE DETAIL "A" 0.011(0.280) x 45o 0.020(0.508) 0.013(0.330) 0.020(0.508) 0.050(1.270)BSC NOTE 4 0.189(4.800) 0.197(5.000) 0.053(1.350) 0.068(1.730) 0o-8o 0.049(1.250) 0.060(1.524) 0.016(0.410) 0.050(1.270) DETAIL "A" SEATING PLANE 0.001(0.030) 0.004(0.101) NOTE: 1) Control dimension is in inches. Dimension in bracket is millimeters. 2) The length of the package does not include mold flash. Mold flash shall not exceed 0.006in. (0.15mm) per side. With the mold flash included, over-all length of the package is 0.2087in. (5.3mm) max. 3) The width of the package does not include mold flash. Mold flash shall not exceed 0.10in. (0.25mm) per side. With the mold flash included, over-all width of the package is 0.177in. (4.5mm) max. NOTICE: MPS believes the information in this document to be accurate and reliable. However, it is subject to change without notice. Please contact the factory for current specifications. No responsibility is assumed by MPS for its use or fit to any application, nor for infringement of patent or other rights of third parties. MP1251/2 Rev 1.7 03/06/03 © 2003 MPS, Inc. Monolithic Power Systems, Inc. 983 University Ave, Building D, Los Gatos, CA 95032 USA Tel: 408-395-2802 ♦ Fax: 408-395-2812 ♦ Web: www.monolithicpower.com 5