MP1482
2A, 18V Synchronous Rectified
Step-Down Converter
The Future of Analog IC Technology
FEATURES
DESCRIPTION
The MP1482 is a monolithic synchronous buck
regulator. The device integrates two 130mΩ
MOSFETs, and provides 2A of continuous load
current over a wide input voltage of 4.75V to
18V. Current mode control provides fast
transient response and cycle-by-cycle current
limit.
An adjustable soft-start prevents inrush current
at turn-on, and in shutdown mode the supply
current drops to 1µA.
This device, available in an 8-pin SOIC
package, provides a very compact solution with
minimal external components.
2A Output Current
Wide 4.75V to 18V Operating Input Range
Integrated 130mΩ Power MOSFET Switches
Output Adjustable from 0.923V to 15V
Up to 93% Efficiency
Programmable Soft-Start
Stable with Low ESR Ceramic Output Capacitors
Fixed 340kHz Frequency
Cycle-by-Cycle Over Current Protection
Input Under Voltage Lockout
8–Pin SOIC
APPLICATIONS
Distributed Power Systems
Networking Systems
FPGA, DSP, ASIC Power Supplies
Green Electronics/ Appliances
Notebook Computers
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
Efficiency vs
Load Current
INPUT
100
VOUT = 3.3V
95
7
90
1
IN
BS
3
SW
EN
MP1482
8
SS
GND
4
FB
COMP
6
5
EFFICIENCY (%)
2
85
VOUT = 2.5V
80
75
70
65
60
55
50
0
0.5
1.0
1.5
2.0
LOAD CURRENT (A)
MP1482 Rev. 1.31
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2.5
1
MP1482 – 2A, 18V SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number
MP1482DS*
Package
SOIC8
Top Marking
MP1482DS
Free Air Temperature (TA)
-40C to +85C
* For Tape & Reel, add suffix –Z (e.g. MP1482DS–Z);
For RoHS Compliant Packaging, add suffix –LF (e.g. MP1482DS–LF–Z)
PACKAGE REFERENCE
TOP VIEW
BS
1
8
SS
IN
2
7
EN
SW
3
6
COMP
GND
4
5
FB
SOIC8
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
Supply Voltage VIN ........................-0.3V to +20V
Switch Node Voltage VSW ............................ 21V
Boost Voltage VBS ..........VSW – 0.3V to VSW + 6V
All Other Pins ..................................-0.3V to +6V
Junction Temperature ...............................150°C
Continuous Power Dissipation
(TA = +25°C)(2)
SOIC8……………………………………….1.38W
Lead Temperature ....................................260°C
Storage Temperature .............. -65°C to +150°C
SOIC8..................................... 90 ...... 45... C/W
Recommended Operating Conditions
(3)
Input Voltage VIN ............................4.75V to 18V
Output Voltage VOUT .....................0.923V to 15V
Operating Junct. Temp (TJ)........-40°C to +125°C
(4)
θJA
θJC
Notes:
1) Exceeding these ratings may damage the device
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any
ambient
temperature
is
calculated
by
PD(MAX)=(TJ(MAX)-TA)/ θJA. Exceeding the maximum
allowable power dissipation will cause excessive die
temperature, and the regulator will go into thermal shutdown.
Internal thermal shutdown circuitry protects the device from
permanent damage..
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer board.
MP1482 Rev. 1.31
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2
MP1482 – 2A, 18V SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameter
Symbol Condition
Shutdown Supply Current
Supply Current
Min
VEN = 0V
VEN = 2.0V; VFB = 1.0V
Feedback Voltage
VFB
Feedback Overvoltage Threshold
Error Amplifier Voltage Gain (5)
AEA
Error Amplifier Transconductance
GEA
(5)
High-Side Switch On Resistance
Low-Side Switch On Resistance (5)
High-Side Switch Leakage Current
Upper Switch Current Limit
Lower Switch Current Limit
COMP to Current Sense
Transconductance
Oscillation Frequency
Short Circuit Oscillation Frequency
Maximum Duty Cycle
Minimum On Time (5)
EN Shutdown Threshold Voltage
EN Shutdown Threshold Voltage
Hysteresis
EN Lockout Threshold Voltage
EN Lockout Hysterisis
Input Under Voltage Lockout
Threshold
Input Under Voltage Lockout
Threshold Hysteresis
Soft-Start Current
Soft-Start Period
Thermal Shutdown (5)
4.75V VIN 18V
0.900
IC = 10μA
RDS(ON)1
RDS(ON)2
VEN = 0V, VSW = 0V
Minimum Duty Cycle
From Drain to Source
2.4
305
VFB = 0V
VFB = 1.0V
VEN Rising
Max
Units
1
1.3
3.0
1.5
μA
mA
0.923
0.946
V
1.1
400
V
V/V
800
μA/V
130
130
3.4
1.1
mΩ
mΩ
μA
A
A
3.5
A/V
10
GCS
Fosc1
Fosc2
DMAX
Typ
1.1
340
100
90
220
1.5
375
2.0
210
VIN Rising
VSS = 0V
CSS = 0.1μF
kHz
kHz
%
ns
V
mV
2.2
2.5
210
2.7
V
mV
3.80
4.10
4.40
V
210
mV
6
15
160
μA
ms
°C
Note:
5) Guaranteed by design, not tested.
MP1482 Rev. 1.31
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3
MP1482 – 2A, 18V SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
PIN FUNCTIONS
SOIC8
Name Description
Pin #
1
2
3
4
5
6
7
8
High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel MOSFET
switch. Connect a 0.01μF or greater capacitor from SW to BS to power the high side switch.
Power Input. IN supplies the power to the IC, as well as the step-down converter switches.
IN
Drive IN with a 4.75V to 18V power source. Bypass IN to GND with a suitably large capacitor to
eliminate noise on the input to the IC. See Input Capacitor.
Power Switching Output. SW is the switching node that supplies power to the output. Connect
SW the output LC filter from SW to the output load. Note that a capacitor is required from SW to BS
to power the high-side switch.
GND Ground.
Feedback Input. FB senses the output voltage to regulate that voltage. Drive FB with a resistive
FB
voltage divider from the output voltage. The feedback threshold is 0.923V. See Setting the
Output Voltage.
Compensation Node. COMP is used to compensate the regulation control loop. Connect a
series RC network from COMP to GND to compensate the regulation control loop. In some
COMP
cases, an additional capacitor from COMP to GND is required. See Compensation
Components.
Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on the
EN
regulator, drive it low to turn it off. Pull up with 100kΩ resistor for automatic startup.
Soft-Start Control Input. SS controls the soft start period. Connect a capacitor from SS to GND
SS
to set the soft-start period. A 0.1μF capacitor sets the soft-start period to 15ms. To disable the
soft-start feature, leave SS unconnected.
BS
MP1482 Rev. 1.31
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MP1482 – 2A, 18V SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VO = 3.3V, L = 10µH, C1 = 10µF, C2 = 22µF, TA = +25°C, unless otherwise noted.
VOUT
20mV/div.
IL
1A/div.
VEN
5V/div.
VEN
5V/div.
VOUT
1V/div.
VOUT
2V/div.
IL
1A/div.
IL
1A/div.
VSW
10V/div.
VSW
10V/div.
Heavy Load Operation
Medium Load Operation
Light Load Operation
1A Load
No Load
VIN, AC
200mV/div.
VO, AC
20mV/div.
VO, AC
20mV/div.
IL
1A/div.
VSW
10V/div.
VIN, AC
20mV/div.
VO, AC
20mV/div.
IL
1A/div.
IL
1A/div.
VSW
10V/div.
VSW
10V/div.
Short Circuit
Recovery
Short Circuit
Protection
IL
2A/div.
VSW
10V/div.
2A Load
VIN, AC
200mV/div.
VOUT
2V/div.
VIN = 12V, VOUT = 3.3V
IOUT = 1A (Resistance Load)
VIN = 12V, VOUT = 3.3V
IOUT = 1A (Resistance Load)
VIN = 12V, VOUT = 3.3V
IOUT = 0A, IIN= 8.2mA
VIN
20mV/div.
Shutdown through Enable
Startup through Enable
Steady State Test
VOUT
2V/div.
Load Transient
VOUT
200mV/div.
IL
1A/div.
IL
2A/div.
ILOAD
1A/div.
MP1482 Rev. 1.31
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5
MP1482 – 2A, 18V SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
OPERATION
FUNCTIONAL DESCRIPTION
The MP1482 is a synchronous rectified,
current-mode, step-down regulator. It regulates
input voltages from 4.75V to 18V down to an
output voltage as low as 0.923V, and supplies
up to 2A of load current.
The MP1482 uses current-mode control to
regulate the output voltage. The output voltage
is measured at FB through a resistive voltage
divider and amplified through the internal
transconductance error amplifier. The voltage at
the COMP pin is compared to the switch current
measured internally to control the output
voltage.
The converter uses internal N-Channel
MOSFET switches to step-down the input
voltage to the regulated output voltage. Since
the high side MOSFET requires a gate voltage
greater than the input voltage, a boost capacitor
connected between SW and BS is needed to
drive the high side gate. The boost capacitor is
charged from the internal 5V rail when SW is low.
When the MP1482 FB pin exceeds 20% of the
nominal regulation voltage of 0.923V, the over
voltage comparator is tripped and the COMP
pin and the SS pin are discharged to GND,
forcing the high-side switch off.
+
CURRENT
SENSE
AMPLIFIER
OVP
1.1V
-OSCILLATOR
+
FB
340KHz
0.3V
RAMP
5V
BS
-+
--
+
0.923V
+
--
CLK
-SS
IN
+
ERROR
AMPLIFIER
S
Q
R
Q
SW
CURRENT
COMPARATOR
COMP
--
EN
2.5V
+
GND
EN OK
1.2V
LOCKOUT
COMPARATOR
OVP
IN < 4.1V
IN
+
INTERNAL
REGULATORS
1.5V
--
SHUTDOWN
COMPARATOR
Figure 1—Functional Block Diagram
MP1482 Rev. 1.31
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6
MP1482 – 2A, 18V SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
APPLICATIONS INFORMATION
COMPONENT SELECTION
Setting the Output Voltage
The output voltage is set using a resistive
voltage divider from the output voltage to FB pin.
The voltage divider divides the output voltage
down to the feedback voltage by the ratio:
VFB VOUT
Where VFB is the feedback voltage and VOUT is
the output voltage.
Thus the output voltage is:
R1 R2
R2
R2 can be as high as 100kΩ, but a typical value
is 10kΩ. Using the typical value for R2, R1 is
determined by:
R1 10.83 ( VOUT 0.923 ) (kΩ)
For example, for a 3.3V output voltage, R2 is
10kΩ, and R1 is 26.1kΩ.
Inductor
The inductor is required to supply constant
current to the output load while being driven by
the switched input voltage. A larger value
inductor will result in less ripple current that will
result in lower output ripple voltage. However,
the larger value inductor will have a larger
physical size, higher series resistance, and/or
lower saturation current. A good rule for
determining the inductance to use is to allow
the peak-to-peak ripple current in the inductor
to be approximately 30% of the maximum
switch current limit. Also, make sure that the
peak inductor current is below the maximum
switch current limit. The inductance value can
be calculated by:
L
VOUT
V
1 OUT
f S I L
VIN
ILP ILOAD
VOUT
V
1 OUT
2 f S L
VIN
Where ILOAD is the load current.
R2
R1 R2
VOUT 0.923
Choose an inductor that will not saturate under
the maximum inductor peak current. The peak
inductor current can be calculated by:
Where VOUT is the output voltage, VIN is the
input voltage, fS is the switching frequency, and
ΔIL is the peak-to-peak inductor ripple current.
The choice of which style inductor to use mainly
depends on the price vs. size requirements and
any EMI requirements.
Optional Schottky Diode
During the transition between high-side switch
and low-side switch, the body diode of the lowside power MOSFET conducts the inductor
current. The forward voltage of this body diode
is high. An optional Schottky diode may be
paralleled between the SW pin and GND pin to
improve overall efficiency. Table 1 lists example
Schottky diodes and their Manufacturers.
Table 1—Diode Selection Guide
Part Number
Voltage/Current
Rating
B130
SK13
30V, 1A
30V, 1A
MBRS130
30V, 1A
Vendor
Diodes, Inc.
Diodes, Inc.
International
Rectifier
Input Capacitor
The input current to the step-down converter is
discontinuous, therefore a capacitor is required
to supply the AC current to the step-down
converter while maintaining the DC input
voltage. Use low ESR capacitors for the best
performance. Ceramic capacitors are preferred,
but tantalum or low-ESR electrolytic capacitors
may also suffice. Choose X5R or X7R
dielectrics when using ceramic capacitors.
Since the input capacitor (C1) absorbs the input
switching current it requires an adequate ripple
current rating. The RMS current in the input
capacitor can be estimated by:
I C1 ILOAD
VOUT VOUT
1
VIN
VIN
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MP1482 – 2A, 18V SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
The worst-case condition occurs at VIN = 2VOUT,
where IC1 = ILOAD/2. For simplification, choose
the input capacitor whose RMS current rating
greater than half of the maximum load current.
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP1482 can be optimized for a wide range of
capacitance and ESR values.
The input capacitor can be electrolytic, tantalum
or ceramic. When using electrolytic or tantalum
capacitors, a small, high quality ceramic
capacitor, i.e. 0.1μF, should be placed as close
to the IC as possible. When using ceramic
capacitors, make sure that they have enough
capacitance to provide sufficient charge to
prevent excessive voltage ripple at input. The
input voltage ripple for low ESR capacitors can
be estimated by:
Compensation Components
MP1482 employs current mode control for easy
compensation and fast transient response. The
system stability and transient response are
controlled through the COMP pin. COMP pin is
the output of the internal transconductance
error amplifier. A series capacitor-resistor
combination sets a pole-zero combination to
control the characteristics of the control system.
VIN
ILOAD
V
OUT
C1 fS
VIN
V
1 OUT
VIN
Where C1 is the input capacitance value.
Output Capacitor
The output capacitor is required to maintain the
DC output voltage. Ceramic, tantalum, or low
ESR electrolytic capacitors are recommended.
Low ESR capacitors are preferred to keep the
output voltage ripple low. The output voltage
ripple can be estimated by:
VOUT
VOUT
V
1 OUT
fS L
VIN
1
R ESR
8 f S C2
Where C2 is the output capacitance value and
RESR is the equivalent series resistance (ESR)
value of the output capacitor.
In the case of ceramic capacitors, the
impedance at the switching frequency is
dominated by the capacitance. The output
voltage ripple is mainly caused by the
capacitance. For simplification, the output
voltage ripple can be estimated by:
ΔVOUT
V
1 OUT
VIN
L C2
VOUT
8 fS
2
In the case of tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the
output ripple can be approximated to:
ΔVOUT
V
V
OUT 1 OUT
fS L
VIN
R ESR
The DC gain of the voltage feedback loop is
given by:
A VDC R LOAD G CS A EA
VFB
VOUT
Where AVEA is the error amplifier voltage gain;
GCS is the current sense transconductance and
RLOAD is the load resistor value.
The system has two poles of importance. One
is due to the compensation capacitor (C3) and
the output resistor of the error amplifier, and the
other is due to the output capacitor and the load
resistor. These poles are located at:
fP1
GEA
2 C3 A VEA
fP2
1
2 C2 R LOAD
Where GEA is the error amplifier transconductance.
The system has one zero of importance, due to the
compensation capacitor (C3) and the compensation
resistor (R3). This zero is located at:
f Z1
1
2 C3 R3
The system may have another zero of
importance, if the output capacitor has a large
capacitance and/or a high ESR value. The zero,
due to the ESR and capacitance of the output
capacitor, is located at:
fESR
1
2 C2 R ESR
MP1482 Rev. 1.31
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MP1482 – 2A, 18V SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
In this case (as shown in Figure 2), a third pole
set by the compensation capacitor (C6) and the
compensation resistor (R3) is used to
compensate the effect of the ESR zero on the
loop gain. This pole is located at:
fP 3
To optimize the compensation components, the
following procedure can be used.
1. Choose the compensation resistor (R3) to set
the desired crossover frequency.
Determine the R3 value by the following
equation:
2 C2 fC VOUT 2 C2 0.1 fS VOUT
GEA GCS
VFB
GEA GCS
VFB
Where fC is the desired crossover frequency
which is typically below one tenth of the
switching frequency.
2. Choose the compensation capacitor (C3) to
achieve the desired phase margin. For
applications with typical inductor values, setting
the compensation zero, fZ1, below one-forth of
the crossover frequency provides sufficient
phase margin.
Determine the C3 value by the following equation:
C3
f
1
S
2 C2 R ESR
2
1
2 C6 R3
The goal of compensation design is to shape
the converter transfer function to get a desired
loop gain. The system crossover frequency
where the feedback loop has the unity gain is
important. Lower crossover frequencies result
in slower line and load transient responses,
while higher crossover frequencies could cause
system instability. A good rule of thumb is to set
the crossover frequency below one-tenth of the
switching frequency.
R3
3. Determine if the second compensation
capacitor (C6) is required. It is required if the
ESR zero of the output capacitor is located at
less than half of the switching frequency, or the
following relationship is valid:
If this is the case, then add the second
compensation capacitor (C6) to set the pole fP3
at the location of the ESR zero. Determine the
C6 value by the equation:
C6
C2 R ESR
R3
External Bootstrap Diode
An external bootstrap diode may enhance the
efficiency of the regulator, and it will be a must
if the applicable condition is:
VOUT is 5V or 3.3V, and duty cycle is high:
D=
VOUT
>65%
VIN
In these cases, an external BST diode is
recommended from the output of the voltage
regulator to BST pin, as shown in Figure.2
External BST Diode
IN4148
BST
MP1482
SW
CBST
L
+
COUT
5V or 3.3V
Figure 2—Add Optional External Bootstrap
Diode to Enhance Efficiency
The recommended external BST diode is
IN4148, and the BST cap is 0.1~1µF.
4
2 R3 f C
Where R3 is the compensation resistor.
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MP1482 – 2A, 18V SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUIT
INPUT
2
7
1
IN
BS
3
SW
EN
MP1482
8
SS
GND
4
FB
COMP
5
6
Figure 3—MP1482 with 3.3V Output, 22µF/6.3V Ceramic Output Capacitor
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MP1482 – 2A, 18V SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
PCB LAYOUT GUIDE
PCB layout is very important to achieve stable
operation. It is highly recommended to duplicate
EVB layout for optimum performance.
2)
Bypass ceramic capacitors are suggested
to be put close to the Vin Pin.
3)
Ensure all feedback connections are short
and direct. Place the feedback resistors
and compensation components as close to
the chip as possible.
4)
Route SW away from sensitive analog
areas such as FB.
5)
Connect IN, SW, and especially GND
respectively to a large copper area to cool
the chip to improve thermal performance
and long-term reliability.
If change is necessary, please follow these
guidelines and take Figure 4 for reference.
1) Keep the path of switching current short and
minimize the loop area formed by input cap,
high-side MOSFET and low-side MOSFET.
C5
INPUT
4.75V to 18V
R4
2
7
8
C1
1
IN
EN
BS
SW
MP1482
SS
GND
4
FB
COMP
OUTPUT
R1
5
6
C3
C4
L1
3
D1
(optional)
R2
C2
R3
MP1482 Typical Application Circuit
FB 5
EN 7
COMP 6
3 SW
C3
2 IN
C4
SS 8
R4
R3
PGND
R1
R2
SGND
R1
C5
4 GND
1 BS
PGND
D1
C2
C1
L1
Top Layer
Bottom Layer
Figure 4—MP1482 Typical Application Circuit and PCB Layout Guide
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11
MP1482 – 2A, 18V SYNCHRONOUS RECTIFIED, STEP-DOWN CONVERTER
PACKAGE INFORMATION
SOIC8
0.189(4.80)
0.197(5.00)
0.050(1.27)
0.024(0.61)
8
5
0.063(1.60)
0.150(3.80)
0.157(4.00)
PIN 1 ID
1
0.228(5.80)
0.244(6.20)
0.213(5.40)
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
SEATING PLANE
0.004(0.10)
0.010(0.25)
0.013(0.33)
0.020(0.51)
0.0075(0.19)
0.0098(0.25)
SEE DETAIL "A"
0.050(1.27)
BSC
SIDE VIEW
FRONT VIEW
0.010(0.25)
x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0o-8o
0.016(0.41)
0.050(1.27)
DETAIL "A"
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP1482 Rev. 1.31
www.MonolithicPower.com
7/9/2012
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
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