MP1484
3A, 18V, 340KHz Synchronous Rectified
Step-Down Converter
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP1484 is a monolithic synchronous buck
regulator. The device integrates top and bottom
85mȍ MOSFETS that provide 3A of continuous
load current over a wide operating input voltage
of 4.75V to 18V. Current mode control provides
fast transient response and cycle-by-cycle
current limit.
x
x
x
x
x
x
x
x
x
x
x
An adjustable soft-start prevents inrush current
at turn-on and in shutdown mode, the supply
current drops below 1μA.
The MP1484 is PIN compatible to the MP1482
2A/18V/Synchronous Step-Down Converter.
3A Continuous Output Current
Wide 4.75V to 18V Operating Input Range
Integrated 85mȍ Power MOSFET Switches
Output Adjustable from 0.925V to 20V
Up to 95% Efficiency
Programmable Soft-Start
Stable with Low ESR Ceramic Output Capacitors
Fixed 340KHz Frequency
Cycle-by-Cycle Over Current Protection
Input Under Voltage Lockout
Thermally Enhanced 8-Pin SOIC Package
APPLICATIONS
x
x
x
x
FPGA, ASIC, DSP Power Supplies
LCD TV
Green Electronics/Appliances
Notebook Computers
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
Efficiency vs
Load Current
100
95
7
8
EN
SS
GND
4
1
BS
SW
FB
COMP
6
90
3
5
EFFICIENCY (%)
2
IN
VIN = 5V
VIN = 12V
85
80
75
70
65
60
55
50
0.1
MP1484 Rev. 0.9
10/23/2008
1.0
LOAD CURRENT (A)
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1
MP1484 – 3A, 18V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
ABSOLUTE MAXIMUM RATINGS (1)
PACKAGE REFERENCE
Supply Voltage VIN ....................... –0.3V to +24V
Switch Voltage VSW ................. –1V to VIN + 0.3V
Boost Voltage VBS ..........VSW – 0.3V to VSW + 6V
All Other Pins................................. –0.3V to +6V
Junction Temperature...............................150°C
Lead Temperature ....................................260°C
Storage Temperature .............–65°C to +150°C
TOP VIEW
BS
1
8
SS
IN
2
7
EN
SW
3
6
COMP
GND
4
5
FB
Recommended Operating Conditions
Input Voltage VIN ............................ 4.75V to 18V
Output Voltage VOUT .................... 0.925V to 20V
Ambient Operating Temp .............. –20°C to +85°C
EXPOSED PAD
ON BACKSIDE
CONNECT
TO GND PIN
Thermal Resistance
Part Number*
MP1484EN
*
(2)
Package
Temperature
SOIC8N
–20°C to +85°C
(Exposed Pad)
For Tape & Reel, add suffix –Z (e.g. MP1484EN -Z)
For Lead Free, add suffix –LF (e.g. MP1484EN - LF-Z)
(3)
șJA
șJC
SOIC8N(Exposed Pad) .......... 50 ...... 10... qC/W
Notes:
1) Exceeding these ratings may damage the device.
2) The device is not guaranteed to function outside of its
operating conditions.
3) Measured on approximately 1” square of 1 oz copper.
ELECTRICAL CHARACTERISTICS
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameter
Symbol Condition
Shutdown Supply Current
Supply Current
Feedback Voltage
VEN = 0V
VEN = 2.0V, VFB = 1.0V
VFB
Feedback Overvoltage Threshold
Error Amplifier Voltage Gain (4)
AEA
Error Amplifier Transconductance
GEA
High-Side/Low-Side Switch OnResistance (4)
High-Side Switch Leakage Current
Upper Switch Current Limit
Lower Switch Current Limit
COMP to Current Sense
Transconductance
Oscillation Frequency
Short Circuit Oscillation Frequency
Maximum Duty Cycle
Minimum On Time (4)
EN Shutdown Threshold Voltage
EN Shutdown Threshold Voltage
Hysterisis
MP1484 Rev. 0.9
10/23/2008
Min
4.75V d VIN d 18V
0.900
'IC = r10ȝA
VEN = 0V, VSW = 0V
Minimum Duty Cycle
From Drain to Source
3.8
GCS
Fosc1
Fosc2
DMAX
TON
Typ
Max
Units
0.3
1.3
3.0
1.5
ȝA
mA
0.925
0.950
V
1.1
400
V
V/V
820
ȝA/V
85
mȍ
0
5.3
0.9
10
5.2
300
VFB = 0V
VFB = 1.0V
VEN Rising
1.1
340
110
90
220
1.5
220
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ȝA
A
A
A/V
380
2.0
KHz
KHz
%
ns
V
mV
2
MP1484 – 3A, 18V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TA = +25°C, unless otherwise noted.
Parameter
Symbol Condition
EN Lockout Threshold Voltage
EN Lockout Hysterisis
Input Under Voltage Lockout
Threshold
Input Under Voltage Lockout
Threshold Hysteresis
Soft-Start Current
Soft-Start Period
Thermal Shutdown (4)
VIN Rising
VSS = 0V
CSS = 0.1ȝF
Min
Typ
Max
Units
2.2
2.5
210
2.7
V
mV
3.80
4.05
4.40
V
210
mV
6
15
160
ȝA
ms
°C
Note:
4) Guaranteed by design, not tested.
PIN FUNCTIONS
Pin #
Name
1
BS
2
IN
3
SW
4
GND
5
FB
6
COMP
7
EN
8
SS
MP1484 Rev. 0.9
10/23/2008
Description
High-Side Gate Drive Boost Input. BS supplies the drive for the high-side N-Channel MOSFET
switch. Connect a 0.01ȝF or greater capacitor from SW to BS to power the high side switch.
Power Input. IN supplies the power to the IC, as well as the step-down converter switches.
Drive IN with a 4.75V to 18V power source. See Input Capacitor.
Power Switching Output. SW is the switching node that supplies power to the output. Connect
the output LC filter from SW to the output load. Note that a capacitor is required from SW to
BS to power the high-side switch.
Ground (Connect the exposed pad to Pin 4).
Feedback Input. FB senses the output voltage and regulates it. Drive FB with a resistive
voltage divider connected to it from the output voltage. The feedback threshold is 0.925V. See
Setting the Output Voltage.
Compensation Node. COMP is used to compensate the regulation control loop. Connect a
series RC network from COMP to GND. In some cases, an additional capacitor from COMP to
GND is required. See Compensation Components.
Enable Input. EN is a digital input that turns the regulator on or off. Drive EN high to turn on
the regulator; low to turn it off. Attach to IN with a 100kȍ pull up resistor for automatic startup.
Soft-Start Control Input. SS controls the soft-start period. Connect a capacitor from SS to GND
to set the soft-start period. A 0.1ȝF capacitor sets the soft-start period to 15ms. To disable the
soft-start feature, leave SS unconnected.
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MP1484 – 3A, 18V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
C1 = 4.7μF, C2 = 2 x 10μF, L= 10μH, CSS= 0.1μF, TA = +25°C, unless otherwise noted.
MP1484 Rev. 0.9
10/23/2008
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MP1484 – 3A, 18V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
OPERATION
FUNCTIONAL DESCRIPTION
The MP1484 regulates input voltages from
4.75V to 18V down to an output voltage as low
as 0.925V, and supplies up to 3A of load
current.
The MP1484 uses current-mode control to
regulate the output voltage. The output voltage
is measured at FB through a resistive voltage
divider and amplified through the internal
transconductance error amplifier. The voltage at
the COMP pin is compared to the switch current
(measured internally) to control the output
voltage.
The converter uses internal N-Channel
MOSFET switches to step-down the input
voltage to the regulated output voltage. Since
the high side MOSFET requires a gate voltage
greater than the input voltage, a boost capacitor
connected between SW and BS is needed to
drive the high side gate. The boost capacitor is
charged from the internal 5V rail when SW is low.
When the FB pin voltage exceeds 20% of the
nominal regulation value of 0.925V, the over
voltage comparator is tripped and the COMP
pin and the SS pin are discharged to GND,
forcing the high-side switch off.
+
CURRENT
SENSE
AMPLIFIER
OVP
1.1V
-OSCILLATOR
+
FB
340KHz
0.3V
RAMP
BS
----
+
0.925V
5V
--
CLK
+
SS
IN
+
+
ERROR
AMPLIFIER
S
Q
R
Q
SW
CURRENT
COMPARATOR
COMP
--
EN
2.5V
+
GND
EN OK
OVP
1.2V
IN < 4.05V
LOCKOUT
COMPARATOR
IN
+
INTERNAL
REGULATORS
1.5V
--
SHUTDOWN
COMPARATOR
Figure 1—Functional Block Diagram
MP1484 Rev. 0.9
10/23/2008
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MP1484 – 3A, 18V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
APPLICATIONS INFORMATION
The inductance value can be calculated by:
COMPONENT SELECTION
Setting the Output Voltage
The output voltage is set using a resistive
voltage divider connected from the output
voltage to FB. The voltage divider divides the
output voltage down to the feedback voltage by
the ratio:
VFB
VOUT
R2
R1 R2
0.925 u
R1 R2
R2
·
¸¸
¹
Where VOUT is the output voltage, VIN is the
input voltage, fS is the switching frequency, and
ǻIL is the peak-to-peak inductor ripple current.
ILP
R2 can be as high as 100kȍ, but a typical value
is 10kȍ. Using the typical value for R2, R1 is
determined by:
R1 10.81 u ( VOUT 0.925 ) (k)
For example, for a 3.3V output voltage, R2 is
10k, and R1 is 26.1k. Table 1 lists
recommended resistance values of R1 and R2
for standard output voltages.
Table 1—Recommended Resistance Values
VOUT
R1
R2
1.8V
2.5V
3.3V
5V
12V
9.53k
16.9k
26.1k
44.2k
121k
10k
10k
10k
10k
10k
Inductor
The inductor is required to supply constant
current to the load while being driven by the
switched input voltage. A larger value inductor
will result in less ripple current that will in turn
result in lower output ripple voltage. However,
the larger value inductor will have a larger
physical size, higher series resistance, and/or
lower saturation current. A good rule for
determining inductance is to allow the peak-topeak ripple current to be approximately 30% of
the maximum switch current limit. Also, make
sure that the peak inductor current is below the
maximum switch current limit.
MP1484 Rev. 0.9
10/23/2008
§
VOUT
V
u ¨1 OUT
f S u 'IL ¨©
VIN
Choose an inductor that will not saturate under
the maximum inductor peak current, calculated
by:
Thus the output voltage is:
VOUT
L
ILOAD
§
VOUT
V
u ¨¨1 OUT
2 u fS u L ©
VIN
·
¸¸
¹
Where ILOAD is the load current.
The choice of which style inductor to use mainly
depends on the price vs. size requirements and
any EMI constraints.
Optional Schottky Diode
During the transition between the high-side
switch and low-side switch, the body diode of
the low-side power MOSFET conducts the
inductor current. The forward voltage of this
body diode is high. An optional Schottky diode
may be paralleled between the SW pin and
GND pin to improve overall efficiency. Table 2
lists example Schottky diodes and their
Manufacturers.
Table 2—Diode Selection Guide
Part Number
Voltage/Current
Rating
B130
SK13
30V, 1A
30V, 1A
MBRS130
30V, 1A
Vendor
Diodes, Inc.
Diodes, Inc.
International
Rectifier
Input Capacitor
The input current to the step-down converter is
discontinuous, therefore a capacitor is required
to supply the AC current while maintaining the
DC input voltage. Use low ESR capacitors for
the best performance. Ceramic capacitors are
preferred, but tantalum or low-ESR electrolytic
capacitors will also suffice. Choose X5R or
X7R dielectrics when using ceramic capacitors.
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MP1484 – 3A, 18V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
Since the input capacitor (C1) absorbs the input
switching current, it requires an adequate ripple
current rating. The RMS current in the input
capacitor can be estimated by:
I C1
ILOAD u
VOUT §¨ VOUT ·¸
u 1
VIN ¨©
VIN ¸¹
When using tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the
output ripple can be approximated to:
VOUT §
V
·
u ¨1 OUT ¸¸ u R ESR
f S u L ¨©
VIN ¹
ǻVOUT
The worst-case condition occurs at VIN = 2VOUT,
where IC1 = ILOAD/2. For simplification, use an
input capacitor with a RMS current rating
greater than half of the maximum load current.
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MP1484 can be optimized for a wide range of
capacitance and ESR values.
The input capacitor can be electrolytic, tantalum
or ceramic. When using electrolytic or tantalum
capacitors, a small, high quality ceramic
capacitor, i.e. 0.1ȝF, should be placed as close
to the IC as possible. When using ceramic
capacitors, make sure that they have enough
capacitance to provide sufficient charge to
prevent excessive voltage ripple at input. The
input voltage ripple for low ESR capacitors can
be estimated by:
Compensation Components
MP1484 employs current mode control for easy
compensation and fast transient response. The
system stability and transient response are
controlled through the COMP pin. COMP is the
output of the internal transconductance error
amplifier.
A
series
capacitor-resistor
combination sets a pole-zero combination to
govern the characteristics of the control system.
'VIN
§
ILOAD
V
V
u OUT u ¨¨1 OUT
C1 u fS
VIN ©
VIN
·
¸¸
¹
The DC gain of the voltage feedback loop is
given by:
A VDC
R LOAD u G CS u A EA u
Where C1 is the input capacitance value.
Output Capacitor
The output capacitor (C2) is required to
maintain the DC output voltage. Ceramic,
tantalum, or low ESR electrolytic capacitors are
recommended. Under typical application
conditions ˈ a minimum ceramic capacitor
value of 20 ȝF is recommended on the output.
Low ESR capacitors are preferred to keep the
output voltage ripple low. The output voltage
ripple can be estimated by:
'VOUT
VOUT §
V
u ¨¨1 OUT
fS u L ©
VIN
·
· §
1
¸
¸¸ u ¨ R ESR
¨
8 u f S u C2 ¸¹
¹ ©
Where C2 is the output capacitance value and
RESR is the equivalent series resistance (ESR)
value of the output capacitor.
VFB
VOUT
Where VFB is the feedback voltage (0.925V),
AVEA is the error amplifier voltage gain, GCS is
the current sense transconductance and RLOAD
is the load resistor value.
The system has two poles of importance. One
is due to the compensation capacitor (C3) and
the output resistor of the error amplifier, and the
other is due to the output capacitor and the load
resistor. These poles are located at:
fP1
fP2
GEA
2S u C3 u A VEA
1
2S u C2 u R LOAD
Where GEA is the error amplifier transconductance.
When using ceramic capacitors, the impedance
at the switching frequency is dominated by the
capacitance which is the main cause for the
output voltage ripple. For simplification, the
output voltage ripple can be estimated by:
ǻVOUT
MP1484 Rev. 0.9
10/23/2008
§
V
u ¨¨1 OUT
VIN
u L u C2 ©
VOUT
8 u fS
2
·
¸¸
¹
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7
MP1484 – 3A, 18V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
The system has one zero of importance, due to the
compensation capacitor (C3) and the compensation
resistor (R3). This zero is located at:
f Z1
1
2S u C3 u R3
The system may have another zero of
importance, if the output capacitor has a large
capacitance and/or a high ESR value. The zero,
due to the ESR and capacitance of the output
capacitor, is located at:
fESR
1
2S u C2 u R ESR
In this case, a third pole set by
compensation capacitor (C6) and
compensation resistor (R3) is used
compensate the effect of the ESR zero on
loop gain. This pole is located at:
fP 3
the
the
to
the
1
2S u C6 u R3
The goal of compensation design is to shape
the converter transfer function to get a desired
loop gain. The system crossover frequency
where the feedback loop has the unity gain is
important. Lower crossover frequencies result
in slower line and load transient responses,
while higher crossover frequencies could cause
system instability. A good standard is to set the
crossover frequency below one-tenth of the
switching frequency.
To optimize the compensation components, the
following procedure can be used.
1. Choose the compensation resistor (R3) to set
the desired crossover frequency.
2. Choose the compensation capacitor (C3) to
achieve the desired phase margin. For
applications with typical inductor values, setting
the compensation zero (fZ1) below one-forth of
the crossover frequency provides sufficient
phase margin.
Determine C3 by the following equation:
C3 !
Where R3 is the compensation resistor.
3. Determine if the second compensation
capacitor (C6) is required. It is required if the
ESR zero of the output capacitor is located at
less than half of the switching frequency, or the
following relationship is valid:
f
1
S
2S u C2 u R ESR
2
If this is the case, then add the second
compensation capacitor (C6) to set the pole fP3
at the location of the ESR zero. Determine C6
by the equation:
C6
R3
Where fC is the desired crossover frequency
which is typically below one tenth of the
switching frequency.
C2 u R ESR
R3
External Bootstrap Diode
An external bootstrap diode may enhance the
efficiency of the regulator, the applicable
conditions of external BS diode are:
z VOUT is 5V or 3.3V; and
z
Duty cycle is high: D=
VOUT
>65%
VIN
In these cases, an external BS diode is
recommended from the output of the voltage
regulator to BS pin, as shown in Fig.2
Determine R3 by the following equation:
2S u C2 u fC VOUT 2S u C2 u 0.1 u fS VOUT
u
u
GEA u GCS
VFB
GEA u GCS
VFB
4
2S u R3 u f C
External BST Diode
IN4148
BS
MP1484
SW
CBST
L
5V or 3.3V
COUT
Figure 2—Add Optional External Bootstrap
Diode to Enhance Efficiency
The recommended external BS diode is IN4148,
and the BS cap is 0.1~1μF.
MP1484 Rev. 0.9
10/23/2008
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MP1484 – 3A, 18V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUIT
2
7
8
IN
EN
SS
GND
4
1
BS
SW
FB
COMP
3
5
6
Figure 3—MP1484 with 3.3V Output, 2X10ȝF Ceramic Output Capacitor
MP1484 Rev. 0.9
10/23/2008
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MP1484 – 3A, 18V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
PCB LAYOUT GUIDE
PCB layout is very important to achieve stable
operation. It is highly recommended to duplicate
EVB layout for optimum performance.
If change is necessary, please follow these
guidelines and take Figure4 for reference.
1) Keep the path of switching current short and
minimize the loop area formed by Input cap,
high-side MOSFET and low-side MOSFET.
2)
Bypass ceramic capacitors are suggested
to be put close to the Vin Pin.
3)
Ensure all feedback connections are short
and direct. Place the feedback resistors
and compensation components as close to
the chip as possible.
4)
Rout SW away from sensitive analog areas
such as FB.
5)
Connect IN, SW, and especially GND
respectively to a large copper area to cool
the chip to improve thermal performance
and long-term reliability.
C5
INPUT
4.75V to 18V
R4
2
7
8
C1
1
IN
BS
SW
EN
MP1484
SS
GND
4
FB
COMP
OUTPUT
R1
5
6
C3
C4
L1
3
D1
(optional)
R2
C2
R3
3 SW
FB 5
EN 7
COMP 6
2 IN
4 GND
SS 8
1 BS
MP1484 Typical Application Circuit
Top Layer
Bottom Layer
Figure 4—MP1484 Typical Application Circuit and PCB Layout Guide
MP1484 Rev. 0.9
10/23/2008
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MP1484 – 3A, 18V, 340KHz SYNCHRONOUS RECTIFIED STEP-DOWN CONVERTER
PACKAGE INFORMATION
SOIC8N (EXPOSED PAD)
0.189(4.80)
0.197(5.00)
8
0.124(3.15)
0.136(3.45)
5
0.150(3.80)
0.157(4.00)
PIN 1 ID
1
0.228(5.80)
0.244(6.20)
0.089(2.26)
0.101(2.56)
4
TOP VIEW
BOTTOM VIEW
SEE DETAIL "A"
0.013(0.33)
0.020(0.51)
0.051(1.30)
0.067(1.70)
SEATING PLANE
0.000(0.00)
0.006(0.15)
0.0075(0.19)
0.0098(0.25)
SIDE VIEW
0.050(1.27)
BSC
FRONT VIEW
0.010(0.25)
x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0.050(1.27)
0.024(0.61)
0o-8o
0.016(0.41)
0.050(1.27)
0.063(1.60)
DETAIL "A"
0.103(2.62)
0.138(3.51)
RECOMMENDED LAND PATTERN
0.213(5.40)
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP1484 Rev. 0.9
10/23/2008
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