MP18021A
100V, 2.5A, High Frequency
Half-Bridge Gate Driver
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP18021A is a high-frequency, 100V, half
bridge, N-channel power MOSFET driver. Its low
side and high side driver channels are
independently controlled and matched with a time
delay of less than 5ns. Under-voltage lockout on
both high side and low side supplies force their
outputs low in case of insufficient supply. The
integrated bootstrap diode reduces external
component count.
Drives N-Channel MOSFET Half Bridge
100V VBST Voltage Range
On-Chip Bootstrap Diode
Typical 16ns Propagation Delay Time
Less Than 5ns Gate Drive Matching
Drives 1nf Load with 12ns/9ns Rise/Fall
Times with 12V VDD
TTL Compatible Input
Less Than 150A Quiescent Current
UVLO for Both High Side and Low Side
In SOIC8E and QFN8 (3×3mm) Packages
APPLICATIONS
Telecom Half Bridge Power Supplies
Avionics DC-DC Converters
Two-Switch Forward Converters
Active Clamp Forward Converters
All MPS parts are lead-free, halogen free, and adhere to the RoHS
directive. For MPS green status, please visit MPS website under Quality
Assurance.
“MPS” and “The Future of Analog IC Technology” are Registered
Trademarks of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
+12V
100V
SECONDARY
SIDE
CIRCUIT
VDD
BST
PWM
CONTROLLER
INL
CONTROL
INH
DRIVE
HI
DRVH
DRIVE
LO
DRVL
SW
MP18021A
VSS
ISOLATION
AND
FEEDBACK
MP18021A Rev. 1.53
www.MonolithicPower.com
10/20/2015
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2015 MPS. All Rights Reserved.
1
MP18021A―100V, 2.5A, HIGH FREQUENCY HALF-BRIDGE GATE DRIVER
ORDERING INFORMATION
Part Number
Package
SOIC8E
QFN8 (3x3mm)
MP18021HN-A*
MP18021HQ-A**
Top Marking
MP18021A
ACP
* For Tape & Reel, add suffix –Z (e.g. MP18021HN–A–Z);
For RoHS compliant packaging, add suffix –LF (e.g. MP18021HN–A–LF–Z)
** For Tape & Reel, add suffix –Z (e.g. MP18021HQ–A–Z);
For RoHS compliant packaging, add suffix –LF (e.g. MP18021HQ–A–LF–Z)
PACKAGE REFERENCE
TOP VIEW
TOP VIEW
VDD
1
8
DRVL
VDD 1
8 DRVL
BST
2
7
VSS
BST 2
7 VSS
DRVH
3
6
INL
DRVH 3
6 INL
SW
4
5
INH
SW 4
5 INH
EXPOSED PAD
ON BACKSIDE
SOIC8EP
QFN8
ABSOLUTE MAXIMUM RATINGS (1)
Recommended Operating Conditions
Supply Voltage (VDD).....................-0.3V to +20V
SW Voltage (VSW) .......................-5.0V to +105V
BST Voltage (VBST) .....................-0.3V to +120V
BST to SW ....................................-0.3V to +18V
DRVH to SW ............. -0.3V to (BST-SW) + 0.3V
DRVL to VSS ...................-0.3V to (VDD + 0.3V)
All Other Pins .....................-0.3V to (VDD + 0.3V)
(2)
Continuous Power Dissipation (TA =25°C)
SOIC8E...................................................... 2.6W
QFN8 (3x3mm) .......................................... 2.5W
(2)
Continuous Power Dissipation (TA=100°C)
SOIC8E……………………………. ………0.52W
QFN8 (3x3mm)….........................…………0.5W
Junction Temperature ...............................150C
Lead Temperature ....................................260C
Storage Temperature............... -65°C to +150C
Supply Voltage (VDD) ....................... 9.0V to 18V
SW Voltage (VSW) .......................-1.0V to +100V
SW slew rate .....................................
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