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MP20142DGT-LF-Z

MP20142DGT-LF-Z

  • 厂商:

    MPS(美国芯源)

  • 封装:

    VFDFN8_EP

  • 描述:

    IC REG LDO ADJ 0.2A

  • 数据手册
  • 价格&库存
MP20142DGT-LF-Z 数据手册
MP20142 The Future of Analog IC Technology Dual Channel, 200mA Linear Regulator With Programmable Output Voltage and Output Discharge DESCRIPTION FEATURES The MP20142 is a dual-channel, low noise, low dropout and high PSRR linear regulator with programmable output voltage. The output voltage of MP20142 ranges from 1.2V to 3.3V in 100mV increments and 2.5% accuracy by operating from a +2.5V to +5.5V input. The different output voltage options can be programmed by setting the voltage of P1 and P2 to VDD, GND or floating. There are 9 different voltage settings in one chip. Each output channel can supply up to 200mA of load current. • • • • • • • • • • The MP20142 uses two internal P-channel MOSFETs as the pass devices, which consumes 150µA supply current when both channels are enabled at no load condition. The EN1 and EN2 pins control each output respectively. When both channels shutdown simultaneously, the chip turns off and consumes nearly zero operation current which is suitable for battery-power devices. The MP20142 also features current limiting, output discharge and over temperature protection. Programmable Output Voltage Up to 200mA Output Current (Each LDO) 60mV Dropout at 100mA Load Dual Shutdown Pins Control Each Output 75dB PSRR at 1kHz 7µVRMS Low Noise Outputs Current Limiting and Thermal Protection Short Circuit Protection Two LDOs in TQFN8 (2mm×2mm) Package Output Load Discharge when Disabled APPLICATIONS • • • • • Cellular Phones Battery-powered Equipment Laptop, Notebook, and Palmtop Computers Hand-held Equipment Wireless LAN “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. It is available in a TQFN8 (2mm×2mm) package. TYPICAL APPLICATION MP20142 Rev.0.9 7/12/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 1 MP20142 –DUAL-CHANNEL, 200mA LDO WITH PROGRAMMABLE OUTPUT VOLTAGE ORDERING INFORMATION* Part Number* Package Top Marking Free Air Temperature (TA) MP20142DGT-LF-Z TQFN8 (2mm×2mm) AAY -40°C to +85°C ORDERING GUIDE* MP20142DGT-LF-Z Package Type GT: TQFN (2mm x 2mm) * For RoHS Compliant Packaging, add suffix - LF (e.g. MP20142DGT-LF); For Tape and Reel, add suffix -Z (e.g. MP20142DGT-LF-Z). PACKAGE REFERENCE TOP VIEW 1 8 VOUT1 EN1 2 7 VOUT2 P2 3 6 GND P1 4 5 EN2 GND VIN ABSOLUTE MAXIMUM RATINGS (1) Recommended Operating Conditions Supply Input Voltage .................................... 6V All Other Pins ............................................ 5.5V (2) Power Dissipation, PD @ TA =25°C, TQFN8 ...................................................... 1.5W Storage Temperature Range ..... -65°C to 150°C Lead Temperature (Soldering, 10sec) .....260°C Thermal Resistance ESD Susceptibility HBM (Human Body Mode) .......................... 2kV MM (Machine Mode) ................................. 200V MP20142 Rev.0.9 7/12/2010 (3) Supply Input Voltage ..................... 2.5V to 5.5 V Operating Junct. Temp (TJ) ......-40°C to +125°C (4) TQFN8............................... θJA 80 θJC 16 °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7 4-layer board. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 2 MP20142 –DUAL-CHANNEL, 200mA LDO WITH PROGRAMMABLE OUTPUT VOLTAGE PROGRAMMABLE OUTPUT VOLTAGE SETTING MP20142 Rev.0.9 7/12/2010 P1 State P2 State VOUT1 VOUT2 L L L H H H Open Open Open L H Open L H Open L H Open 1.5V 1.5V 1.8V 2.6V 2.8V 2.8V 3.0V 3.0V 3.3V 1.8V 2.8V 3.0V 3.0V 3.0V 3.3V 3.0V 3.3V 3.3V www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 3 MP20142 –DUAL-CHANNEL, 200mA LDO WITH PROGRAMMABLE OUTPUT VOLTAGE ELECTRICAL CHARACTERISTICS VIN = (VOUT+0.4V) or +2.5V, whichever is greater. CIN=COUT1=COUT2=1uF, EN1=EN2=VIN Typical Value at TA = 25°C for each LDO, unless otherwise noted. Parameter Symbol Output Voltage Accuracy Maximum Output Current Current Limit ∆VOUT IMAX ILIM Quiescent Current IG Shutdown Supply Current Dropout Voltage (5) IGSD VDROP Line Regulation(6) ∆VLINE Load Regulation(7) ∆VLOAD EN Logic High EN Logic Low EN Input Bias Current Thermal Shutdown Temperature Thermal Shutdown Hysteresis VIH VIL ISD TSD ∆TSD Output Voltage Noise VNOISE Output Voltage AC PSRR Output Voltage Discharge Resistance in Shutdown Condition Min ILOAD=1mA Continuous Short circuit current limit No Load (Single Channel) No Load (Dual Channel) EN1 = EN2 = GND IOUT = 100mA -2.5 200 VIN=(VOUT+0.4V) or 2.5V to 5.5V, IOUT=1mA VOUT > 1.5V VOUT ≤ 1.5V VIN = 2.5V to 5.5V VIN = 2.5V to 5.5V EN = GND or VIN P1/P2 Termination bias for setting High, Low, Open States VIN=2.5V to 5.5V High state bias current Low state bias current Open state Max Units 2.5 1 120 % mA mA µA µA µA mV 0.1 %/V 1.2 1.8 140 10 % % V V nA °C °C 7 µVRMS 75 dB 75 dB 660 90 150 0.01 60 - 1.6 0.4 100 10Hz to 30kHz, COUT=1µF, ILOAD=1mA 100Hz, COUT = 1µF,ILOAD = 200mA (Single Channel loaded) 1kHz , COUT = 1µF,ILOAD = 200mA (Single Channel loaded) VIN=5V, EN1=EN2=GND Typ 20 100 Ω 5 µA -8 0.7 V Notes: 5) Dropout Voltage is defined as the input to output differential when the output voltage drops 100mV below its nominal value. 6) Line Regulation = VOUT ⎡ V ⎣ ⎤ IN(MAX ) ⎦ − VOUT ⎡ V ⎣ ⎤ IN(MIN) ⎦ ⎡V − VIN(MIN) ⎤ × VOUT(NOM) ⎣ IN(MAX ) ⎦ 7) Load Regulation = VOUT ⎡I ⎤ ⎣ OUT (MAX ) ⎦ − VOUT ⎡I VOUT (NOM) MP20142 Rev.0.9 7/12/2010 ⎤ ⎣ OUT(MIN) ⎦ × 100(% / V) × 100(%) www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 4 MP20142 –DUAL-CHANNEL, 200mA LDO WITH PROGRAMMABLE OUTPUT VOLTAGE PIN FUNCTIONS Pin # Name 1 2 3 4 5 6 7 8 VIN EN1 P2 P1 EN2 GND VOUT2 VOUT1 MP20142 Rev.0.9 7/12/2010 Description Supply Input Pin Channel 1 Enable (Active High). Do Not Float This Pin. Programming input 2. The state of P2 selects one of nine output voltage options. Programming input 1. The state of P1 selects one of nine output voltage options. Channel 2 Enable (Active High). Do Not Float This Pin. Common Ground Channel 2 Output Voltage Channel 1 Output Voltage www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 5 MP20142 –DUAL-CHANNEL, 200mA LDO WITH PROGRAMMABLE OUTPUT VOLTAGE TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.7V, P1 High, P2 Open (VOUT1=2.8V, VOUT2=3.3V), CIN = COUT1= COUT2=1µF, EN1=EN2= VIN TA = +25ºC, unless otherwise noted. 1200 Ground Pin Current vs. Input Voltage Ground Pin Current vs. Temperature 180 1200 Dropout Voltage vs. Output Current 160 1000 1000 800 800 600 600 400 400 200 200 140 120 100 Channel 1 80 60 40 Both Channels Loaded 0 3.5 4 4.5 5 Both Channels Loaded 0 -40 -20 5.5 0 20 40 60 Channel 2 20 0 80 100 0 50 100 150 200 INPUT VOLTAGE(V) Dropout Voltage vs. Temperature 1.5 180 Enable Threshold vs. Input Voltage (Channel 1) 160 1.5 Channel 1 1.4 1.3 Channel 2 1.1 1.0 0.9 60 0.8 40 0.7 20 0 -40 -20 0.6 0 20 40 60 0.5 80 100 EN High Threshold 1.2 VEN(V) VEN(V) 100 80 EN High Threshold 1.2 Channel 1 120 Channel 2 1.4 1.3 140 Enable Threshold vs. Input Voltage (Channel 2) 1.1 1.0 0.9 0.8 0.7 EN Low Threshold 3.5 4 4.5 5 EN Low Threshold 0.6 5.5 0.5 3.5 4 INPUT VOLTAGE(V) 1.5 1.4 1.5 Channel 1, VIN=3.7V 1.2 EN High Threshold 0.9 0.8 0.7 0.6 0.5 -40 -20 EN Low Threshold 0 20 40 60 80 100 1.2 1.1 1.0 5.5 800 Channel 2 700 1.3 EN VOLTAGE(V) EN VOLTAGE(V) 1.3 1.1 1.0 Channel 2, VIN=3.7V 1.4 5 Cuurent Limit vs. Input Voltage Enable Threshold vs. Temperature (Channel 2) Enable Threshold vs. Temperature (Channel 1) 4.5 INPUT VOLTAGE(V) 600 EN High Threshold Channel 1 500 0.9 0.8 EN Low Threshold 0.7 400 300 0.6 0.5 -40 -20 0 20 40 60 80 100 200 3 3.5 4 4.5 5 5.5 INPUT VOLTAGE(V) MP20142 Rev.0.9 7/12/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 6 MP20142 –DUAL-CHANNEL, 200mA LDO WITH PROGRAMMABLE OUTPUT VOLTAGE TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 3.7V, P1 High, P2 Open (VOUT1=2.8V, VOUT2=3.3V), CIN = COUT1= COUT2= 1µF, EN1=EN2= VIN TA = +25ºC, unless otherwise noted. 800 700 VIN=3.7V Channel 2 600 Channel 1 500 400 300 200 -40 -20 0 20 40 60 80 100 Line Regulation 0.20% VIN=3.7V 0.15% 0.10% 0.05% Channel 2 0.00% -0.05% -0.10% Channel 1 -0.15% -0.20% 3 3.5 4 4.5 5 5.5 OUTPUT VOLTAGE ACCURACY(%) Load Regulation OUTPUT VOLOTAGE ACCURACY(%) Current Limit vs. Temperature 0.20% 0.15% 0.10% 0.00% -0.05% -0.10% Channel 1 -0.15% -0.20% 3.0 INPUT VOLTAGE(V) OUTPUT VOLTAGE ACCURACY(%) Output Voltage Accuracy PSRR VIN=3.7V, IOUT=1mA 0.10 80 60 0.00 40 5.5 100 (For Both Channels) Channel 1 10 Unstable Region Channel 2 Channel 2 Channel 2 1 20 IOUT=200mA, 0 Single Channel loaded -0.10 -0.15 -40 -20 3.5 4.0 4.5 5.0 INPUT VOLTAGE(V) Channel 1 0.05 -0.05 IOUT=1mA COUT ESR Stability vs. Ouput Current 100 0.15 Channel 2 0.05% 0 20 40 60 80 100 -20 10 100 Channel 1 Stable Region 0.1 1k 10k 100k 1M 10M FREQUENCY (Hz) 0 50 100 150 200 Channel to Channel Isolation vs. Frequency 60 50 40 30 20 10 0 -10 10 100 1k 10k 100k 1M 10M FREQUENCY (Hz) MP20142 Rev.0.9 7/12/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 7 MP20142 –DUAL-CHANNEL, 200mA LDO WITH PROGRAMMABLE OUTPUT VOLTAGE TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 3.7V, P1 High, P2 Open (VOUT1=2.8V, VOUT2=3.3V), CIN = COUT1= COUT2= 1µF, EN1=EN2= VIN TA = +25ºC, unless otherwise noted. Input Power Up Input Power Down Input Power Up VIN=3.7V, No Load VIN=3.7V, No Load VIN=3.7V, IOUT1=IOUT2=200mA with Resistive Load VIN 2V/div VIN 2V/div VIN 2V/div VOUT1 2V/div VOUT1 2V/div VOUT1 2V/div IOUT1 200mA/div VOUT2 2V/div VOUT2 2V/div VOUT2 2V/div IOUT1/IOUT2 200mA/div IOUT1/IOUT2 200mA/div 200ms/div IOUT2 200mA/div 200ms/div 200ms/div Input Power Down EN Start Up EN Shut Down VIN=3.7V, IOUT1=IOUT2=200mA with Resistive Load VIN=3.7V, IOUT1=IOUT2=200mA with Resistive Load VIN=3.7V, IOUT1=IOUT2=200mA with Resistive Load VIN 2V/div VOUT1 2V/div IOUT1 200mA/div VOUT2 2V/div IOUT2 200mA/div 200ms/div EN 2V/div EN 2V/div VOUT1 2V/div VOUT1 2V/div IOUT1 200mA/div VOUT2 2V/div IOUT1 200mA/div VOUT2 2V/div IOUT2 200mA/div IOUT2 200mA/div Line Transient (Ch1) Line Transient (Ch2) Load Transient (Ch1) VIN=3.7V to 4.7V, IOUT1=200mA with Resistive Load VIN=3.7V to 4.7V, IOUT2=200mA with Resistive Load VIN=3.7V, IOUT1=1mA to 200mA with Resistive Load VIN 1V/div VIN 1V/div VOUT1 (AC) 10mV/div VOUT2 (AC) 10mV/div IOUT1 200mA/div IOUT2 200mA/div MP20142 Rev.0.9 7/12/2010 VOUT1 (AC) 100mV/div IOUT1 200mA/div www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 8 MP20142 –DUAL-CHANNEL, 200mA LDO WITH PROGRAMMABLE OUTPUT VOLTAGE TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 3.7V, P1 High, P2 Open (VOUT1=2.8V, VOUT2=3.3V), CIN = COUT1= COUT2= 1µF, EN1=EN2= VIN TA = +25ºC, unless otherwise noted. Load Transient (Ch2) OCP Start Up OCP Start Up VIN=3.7V, IOUT2=1mA to 200mA with Resistive Load VIN=3.7V, Short VOUT1 to GND before Start Up VIN=3.7V, Short VOUT2 to GND before Start Up VOUT1 (AC) 100mV/div IOUT1 200mA/div VIN 2V/div VOUT2 2V/div VIN 2V/div VOUT1 2V/div VOUT1 2V/div VOUT2 2V/div 100ms/div OCP Recovery OCP Recovery VIN=3.7V, Remove the Over Current Condition of Channel 1 VIN=3.7V, Remove the Over Current Condition of Channel 2 VIN 2V/div VIN 2V/div VOUT2 2V/div VOUT1 2V/div VOUT1 2V/div VOUT2 2V/div 40ms/div MP20142 Rev.0.9 7/12/2010 100ms/div 20ms/div www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 9 MP20142 –DUAL-CHANNEL, 200mA LDO WITH PROGRAMMABLE OUTPUT VOLTAGE FUNCTION BLOCK DIAGRAM Figure1—Function Block Diagram MP20142 Rev.0.9 7/12/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 10 MP20142 –DUAL-CHANNEL, 200mA LDO WITH PROGRAMMABLE OUTPUT VOLTAGE OPERATION The MP20142 integrates two low noise, low dropout, low quiescent current and high PSRR linear regulators. It is intended for use in devices that require very low voltage, low quiescent current power such as wireless LAN, battery-powered equipment and hand-held equipment. Output voltages are optional ranging from 1.2V to 3.3V, and each channel can supply current up to 200mA. The part uses internal P-channel MOSFETs as the pass elements and features internal thermal shutdown and internal current limit. Dropout Voltage Dropout voltage is the minimum input to output differential voltage required for the regulator to maintain an output voltage within 100mV of its nominal value. Because the P-channel MOSFETs pass element behaves as a lowvalue resistor, the dropout voltage of MP20142 is very low. Shutdown The MP20142 has two EN pins to control each channel respectively. And each channel can be switched ON or OFF by a logic input at the EN pin. A high voltage at this pin will turn the device on. When the EN pin is low, the regulator output is off. The EN pin should be tied to VIN to keep the regulator output always on if the application does not require the shutdown feature. Do not float the EN pins. Current Limit The MP20142 includes two independent current limit structures which monitor and control each P-channel MOSFET’s gate voltage limiting the guaranteed maximum output current to 660mA. Thermal Protection Thermal protection turns off the P-channel MOSFETs when the junction temperature exceeds +140ºC, allowing the IC to cool. When the IC’s junction temperature drops by 10ºC, the P-channel MOSFETs will be turned on again. Thermal protection limits total power dissipation in the MP20142. For reliable operation, the junction temperature should be limited to 125 ºC maximum. Internal P-Channel Pass Device The MP20142 features dual typical 0.6Ω Pchannel MOSFET pass devices. It provides several advantages over similar designs using PNP pass transistors, including longer battery life. Output Discharge The part involves a discharge function that provides a resistive discharge path for the external output capacitor. The function will be active when the part is disabled and it will be done in a very limited time. MP20142 Rev.0.9 7/12/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 11 MP20142 –DUAL-CHANNEL, 200mA LDO WITH PROGRAMMABLE OUTPUT VOLTAGE APPLICATION INFORMATION Output Voltage The output voltage of MP20142 is programmable with setting different states of P1 PIN and P2 PIN. The setting rule is as the following table: Input Capacitor Selection Using a capacitor whose value is >0.47µF on the MP20142 input and the amount of capacitance can be increased without limit. P1 State P2 State VOUT1 VOUT2 Input capacitor of larger value will help improve line transient response with the drawback of increased size. Ceramic capacitors are preferred, but tantalum capacitors may also sufficient. L L L H H H Open Open Open L H Open L H Open L H Open 1.5V 1.5V 1.8V 2.6V 2.8V 2.8V 3.0V 3.0V 3.3V 1.8V 2.8V 3.0V 3.0V 3.0V 3.3V 3.0V 3.3V 3.3V Output Capacitor Selection The MP20142 is designed specifically to work with very low ESR ceramic output capacitor in space-saving and performance consideration. A ceramic capacitor in the range of 0.47µF and 10µF, and with ESR lower than 1Ω is suitable for the MP20142 application circuit. Output capacitor of larger values will help to improve load transient response and reduce noise with the drawback of increased size. Table 1 Programmable Output Voltage Setting For example, when P1 and P2 are both open, output voltage of channel 1 is 3.3V, and the output voltage of channel 2 is 3.3V. Power Dissipation The power dissipation for any package depends on the thermal resistance of the case and circuit board, the temperature difference between the junction and ambient air, and the rate of airflow. The power dissipation across the device can be represented by the equation: P = (VIN - VOUT) ×IOUT The allowable power dissipation can calculated using the following equation: P(MAX) = (TJunction - TAmbient) / θJA be Where (TJunction - TAmbient) is the temperature difference between the junction and the surrounding environment, θJA is the thermal resistance from the junction to the ambient environment. Connect the GND pin of MP20142 to ground using a large pad or ground plane helps to channel heat away. MP20142 Rev.0.9 7/12/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 12 MP20142 –DUAL-CHANNEL, 200mA LDO WITH PROGRAMMABLE OUTPUT VOLTAGE PACKAGE INFORMATION TQFN8 (2mm×2mm) PIN 1 ID MARKING 1.90 2.10 0.25 0.45 0.18 0.30 1.90 2.10 PIN 1 ID INDEX AREA PIN 1 ID SEE DETAIL A 0.45 0.65 8 1 1.05 1.25 0.50 BSC 5 TOP VIEW 4 BOTTOM VIEW 0.70 0.80 PIN 1 ID OPTION A 0.30x45º TYP. PIN 1 ID OPTION B R0.20 TYP. 0.20 REF 0.00 0.05 SIDE VIEW DETAIL A NOTE: 1.90 0.70 0.60 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX. 4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION WCCD-3. 5) DRAWING IS NOT TO SCALE. 0.25 1.20 0.50 RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP20142 Rev.0.9 7/12/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 13
MP20142DGT-LF-Z 价格&库存

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MP20142DGT-LF-Z
  •  国内价格 香港价格
  • 5000+4.503875000+0.54592

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