MP2329CGG-Z

MP2329C 24V, 6.5A, Low IQ, Synchronous Buck Converter with Forced Continuous Conduction Mode (CCM) DESCRIPTION FEATURES The MP2329C is a fully integrated, highfrequency, synchronous, rectified, step-down, switch-mode converter. The MP2329C offers a super-compact solution that achieves 6.5A of continuous output current and 7.5A of peak output current over a wide input supply range.      The MP2329C operates at high efficiency over a wide output current load range based on MPS’s proprietary switching loss reduction technique and internal low RDS(ON) power MOSFETs.           Adaptive constant-on-time (COT) control mode provides fast transient response and eases loop stabilization. The DC auto-tune loop combined with the remote differential sense provides good load and line regulation. Full protection features include over-current protection (OCP), over-voltage protection (OVP), under-voltage protection (UVP), and thermal shutdown. The converter requires a minimal number of external components and is available in a QFN11 (2mmx2mm) package.   Wide 4.5V to 24V Operating Input Range 105μA Low Quiescent Current 6.5A Continuous Output Current 7.5A Peak Output Current Adaptive Constant-on-Time (COT) Control for Fast Transient DC Auto-Tune Loop Low RDS(ON) Internal Power MOSFETs Forced PWM Operation Power Good (PG) Indication Fixed 700kHz Switching Frequency Stable with POSCAP and Ceramic Caps 1% Reference Voltage Internal Soft Start (SS) Output Discharge OCP, OVP, UVP, and Thermal Shutdown with Auto-Retry Available in a QFN-11 (2mmx2mm) Package The MPL-AL6050 Inductor Series Matches Best Performance APPLICATIONS      Security Cameras Portable Device, XDSL Device Digital Set-Top Boxes Flat-Panel Television and Monitors General Purposes All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are trademarks of Monolithic Power Systems, Inc. or its subsidiaries. TYPICAL APPLICATION Efficiency VOUT = 3.3V, L = 3.3µH, DCR = 9mΩ 100 EFFICIENCY(%) 95 90 85 80 75 70 Vin=5V Vin=12V Vin=19V Vin=24V 65 60 55 50 0 1 2 3 4 5 LOAD CURRENT(A) MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 6 7 1 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER ORDERING INFORMATION Part Number* MP2329CGG Package QFN-11 (2mmx2mm) Top Marking See Below MSL Rating 1 * For Tape & Reel, add suffix –Z (e.g.: MP2329CGG–Z). TOP MARKING HB: Product code of MP2329CGG Y: Year code LLL: Lot number PACKAGE REFERENCE TOP VIEW EN FB 11 10 VIN AGND 9 VCC 8 1 7 6 2 3 PGND 4 PGND PGND BST SW 5 PG QFN-11 (2mmx2mm) MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 2 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER PIN FUNCTIONS PIN # Name 1 VIN 2-4 5 PGND PG 6 SW 7 BST 8 VCC 9 AGND 10 FB 11 EN Description Supply voltage. VIN supplies power to the internal MOSFET and regulator. The MP2329C operates from a +4.5V to +24V input rail. An input capacitor is needed to decouple the input rail. Connect VIN with wide PCB traces and multiple vias. Apply at least two layers to this input trace. Power ground. Connect PGND with wide PCB traces and multiple vias. Power good output. The output of PG is an open drain. Switch output. Connect SW to the inductor and bootstrap capacitor. SW is driven up to VIN by the high-side switch during the on time of the PWM duty cycle. The inductor current drives SW negative during the off time. The on resistance of the low-side switch and the internal diode fixes the negative voltage. Connect SW with wide and short PCB traces. Try to minimize the area of the SW pattern. Bootstrap. Connect a capacitor between SW and BST to form a floating supply across the high-side switch driver. Internal 3V3 VCC LDO output. VCC powers the driver and control circuits. Decouple VCC with a minimum 1µF ceramic capacitor as close to VCC as possible. X7R or X5R grade dielectric ceramic capacitors are recommended for their stable temperature characteristics. Signal logic ground. AGND is the Kelvin connection to PGND. Feedback. An external resistor divider from the output to GND tapped to FB sets the output voltage. Place the resistor divider as close to FB as possible. Avoid vias on the FB traces and VSEN trace. Keep the VSEN trace far away from the SW node. Buck enable pin. EN is a digital input that turns the buck regulator on or off. When the power supply of the control circuit is ready, drive EN high to turn on the buck regulator. Drive EN low to turn off the buck regulator. Connect EN to VIN through a resistive voltage divider for automatic start-up. Do not make the EN voltage higher than 4.5V at any time. Do not float EN. ABSOLUTE MAXIMUM RATINGS (1) Supply voltage (VIN) ...................................... 26V VSW (DC)................................... -1V to VIN + 0.3V VSW (25ns) ............................-3.6V to VIN + 4V (2) VBST.....................................................VSW + 4.5V All other pins ............................... -0.3V to + 4.5V Continuous power dissipation (TA = +25°C) (3)(5) QFN-11 (2mmx2mm) ................................. 3.6W Junction temperature ................................ 150°C Lead temperature...................................... 260°C Storage temperature .................-65°C to +150°C ESD Rating Human-body model (HBM) ........................1.8KV Charged-device model (CDM) ......................2KV Recommended Operating Conditions (4) Supply voltage (VIN) ......................... 4.5V to 24V Output voltage (VOUT) ....................... 0.6V to 13V Operating junction temp. (TJ). ...-40°C to +125°C Thermal Resistance θJA θJC QFN-11 (2mmx2mm) EV2329C-G-00A (5)................. 34 ........ 9 .... °C/W JESD51-7 (6) ........................... 80 ....... 16 ... °C/W NOTES: 1) Exceeding these ratings may damage the device. 2) Measured by using differential oscilloscope probe. 3) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on EV2329C-G-00A, 4-layer PCB, 64mmx64mm. 6) The value of θJA given in this table is only valid for comparison with other packages and cannot be used for design purposes. These values were calculated in accordance with JESD51-7 and simulated on a specified JEDEC board. They do not represent the performance obtained in an actual application. MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 3 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER ELECTRICAL CHARACTERISTICS VIN = 12V, TJ = -40°C to +125°C (7), typical value is tested at TJ = 25°C, unless otherwise noted. Parameters Symbol Condition Supply Current Supply current (quiescent) IIN VEN = 3.3V, VFB = 0.62V Supply current (shutdown) IIN VEN = 0V MOSFET High-side switch on resistance HSRDS-ON Low-side switch on resistance LSRDS-ON Switch leakage SWLKG VEN = 0V, VSW = 0V Current Limit Low-side valley current limit ILIMIT_LS Negative current limit INEG VOUT = 3.3V, Lo = 2.2μH Switching Frequency and Minimum Off Timer Switching frequency FS VIN = 12V, VOUT = 3.3V (8) Minimum on time TON_Min (8) Minimum off time TOFF_Min Over-Voltage and Under-Voltage Protection (OVP, UVP) OVP threshold VOVP VFB UVP-1 threshold VUVP VFB UVP-1 hold off timer(8) TOC VOUT = 60% VREF UVP-2 threshold VUVP VFB Reference and Soft Start (REF, SS) REF voltage VREF (8) Soft start time TSS Enable and UVLO (EN, UVLO) Enable rising threshold VEN_Rising Enable hysteresis VEN_HYS Enable input current IEN VEN = 3.3V VCC UVLO threshold rising VCCVth_R VCC UVLO threshold hysteresis VCCHYS VIN UVLO threshold rising VINVTH_R VIN UVLO threshold hysteresis VINHYS VCC Regulator VCC voltage VCC VCC load regulation VCC_Reg IVCC = 5mA Thermal Protection Thermal shutdown (8) TSD Thermal shutdown hysteresis (8) TSD_HYS Min Typ Max Units 105 145 2 μA μA 36 12 0 5 mΩ mΩ μA 6 -2 7.5 -1.5 9 -1 A A 600 700 50 200 800 kHz ns ns 125% 70% 135% 80% 45% 130% 75% 32 50% 55% VREF VREF us VREF 590 1.1 600 1.7 610 2.3 mV ms 1.15 1.25 150 3.3 3.3 420 4.35 550 1.35 V mV μA V mV V V 3.65 5 3.85 3.1 4.2 3.45 150 25 3.5 4.48 V % °C °C NOTES: 7) Not tested in production. Guaranteed by over-temperature correlation. 8) Guarantee by engineering sample characterization. MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 4 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER TYPICAL CHARACTERISTICS VIN = 19V, VOUT = 3.3V, L = 3.3µH, TA = +25°C, unless otherwise noted. Efficiency Efficiency VOUT = 3.3V, L = 3.3µH, DCR = 9mΩ 100 100 95 95 90 90 EFFICIENCY(%) EFFICIENCY(%) VOUT = 5V, L = 3.3µH, DCR = 9mΩ 85 80 75 70 65 Vin=7V Vin=12V Vin=19V Vin=24V 60 55 1 2 3 4 5 LOAD CURRENT(A) 6 80 75 70 55 50 7 0 Efficiency 95 95 90 90 EFFICIENCY(%) EFFICIENCY(%) 100 85 80 75 70 Vin=5V Vin=12V Vin=19V Vin=24V 65 60 55 2 3 4 5 LOAD CURRENT(A) 6 75 70 65 Vin=5V Vin=12V Vin=19V Vin=24V 55 50 7 0 1 2 3 4 5 LOAD CURRENT(A) 6 7 Efficiency VOUT = 1.2V, L = 1.5µH, DCR = 6.6mΩ VOUT = 1V, L = 1.5µH, DCR = 6.6mΩ 100 100 90 90 EFFICIENCY(%) EFFICIENCY(%) 7 80 Efficiency 80 70 60 Vin=5V Vin=12V Vin=19V Vin=24V 50 40 1 6 85 60 50 0 2 3 4 5 LOAD CURRENT(A) VOUT = 1.8V, L = 2.2µH, DCR = 11.4mΩ 100 1 1 Efficiency VOUT = 2.5V, L = 2.2µH, DCR = 11.4mΩ 0 Vin=5V Vin=12V Vin=19V Vin=24V 65 60 50 0 85 2 3 4 5 LOAD CURRENT(A) 6 80 70 60 Vin=5V Vin=12V Vin=19V Vin=24V 50 7 40 0 1 2 3 4 5 LOAD CURRENT(A) MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 6 7 5 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER TYPICAL CHARACTERISTICS (continued) VIN = 19V, VOUT = 3.3V, L = 3.3µH, TA = +25°C, unless otherwise noted. Line Regulation 0.4 0.4 0.2 0.2 LINE REGULATION(%) LOAD REGULATION(%) Load Regulation 0 -0.2 -0.4 Vin=5V Vin=12V Vin=19V Vin=24V -0.6 -0.8 0 1 2 3 4 5 LOAD CURRENT(A) 6 0 -0.2 -0.4 -0.8 7 4 9 14 19 24 INPUT VOLTAGE(V) Enabled Supply Current vs. Input Voltage Disabled Supply Current vs. Input Voltage VEN = 3.3V, VFB = 0.62V VEN = 0V 130 70 DISABLED SUPPLY CURRENT (nA) ENABLED SUPPLY CURRENT (µA) Io=0A Io=3A Io=6.5A -0.6 120 110 100 90 80 4 9 14 19 INPUT VOLTAGE(V) 60 50 40 30 20 10 0 12 24 Case Temperature Rise vs. Load Current 14 16 18 20 INPUT VOLTAGE (V) 22 24 Input Voltage Threshold vs. Temperature VIN = 19V, VOUT = 3.3V 5 45 40 35 30 25 20 15 10 5 0 2 3 4 5 LOAD CURRENT(A) 6 7 INPUT VOLTAGE THRESHOLD (V) CASE TEMPERATURE RISE (Ԩ) 50 4.5 4 3.5 3 Rising Threshold 2.5 Falling Threshold 2 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (℃) MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 6 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER TYPICAL CHARACTERISTICS (continued) VIN = 19V, VOUT = 3.3V, L = 3.3µH, TA = +25°C, unless otherwise noted. FB Voltage vs. Temperature 1.6 650 1.5 640 630 1.4 1.3 1.2 1.1 1 Rising Threshold 0.9 Falling Threshold 0.8 FB VOLTAGE (mV) EN THRESHOLD (V) EN Threshold vs. Temperature 620 610 600 590 580 570 560 550 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (℃) -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (℃) VALLEY CURRENT LIMIT (A) Valley Current Limit vs. Temperature 10 9.5 9 8.5 8 7.5 7 6.5 6 5.5 5 4.5 4 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (℃) MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 7 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS VIN = 19V, VOUT = 3.3V, L = 3.3µH, TA = +25°C, unless otherwise noted. Input/Output Ripple Input/Output Ripple IOUT = 0A IOUT = 6.5A CH1: VOUT/AC 200mV/div. CH1: VOUT/AC 20mV/div. CH2: VIN/AC 20mV/div. CH2: CH3: Vsw 10V/div. VIN/AC 200mV/div. CH3: Vsw 10V/div. CH4: IL 2A/div. CH4: IL 5A/div. 1μs/div. 1μs/div. Start-Up through Input Voltage Start-Up through Input Voltage IOUT = 0A IOUT = 6.5A CH1: VOUT 2V/div. CH1: VOUT 2V/div. CH2: VPG 5V/div. CH2: VPG 5V/div. R1: VIN 10V/div. CH3: Vsw 10V/div. R1: VIN 10V/div. CH3: Vsw 10V/div. CH4: IL 10A/div. CH4: IL 2A/div. 1ms/div. 1ms/div. Shutdown through Input Voltage Shutdown through Input Voltage IOUT = 0A IOUT = 6.5A CH1: VOUT 2V/div. CH1: VOUT 2V/div. CH2: VPG 5V/div. CH2: VPG 5V/div. R1: VIN 10V/div. CH3: Vsw 10V/div. R1: VIN 10V/div. CH3: Vsw 10V/div. CH4: IL 10A/div. CH4: IL 2A/div. 10ms/div. 500μs/div. MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 8 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 19V, VOUT = 3.3V, L = 3.3µH, TA = +25°C, unless otherwise noted. Start-Up through Enable Start-Up through Enable IOUT = 0A IOUT = 6.5A CH1: VOUT 2V/div. CH1: VOUT 2V/div. CH2: VPG 5V/div. CH2: VPG 5V/div. R1: VEN 5V/div. CH3: Vsw 10V/div. R1: VEN 5V/div. CH3: Vsw 10V/div. CH4: IL 2A/div. CH4: IL 10A/div. 1ms/div. 1ms/div. Shutdown through Enable Shutdown through Enable IOUT = 0A IOUT = 6.5A CH1: VOUT 2V/div. CH1: VOUT 2V/div. CH2: VPG 5V/div. R1: VEN 5V/div. CH3: Vsw 10V/div. CH2: VPG 5V/div. R1: VEN 5V/div. CH3: Vsw 10V/div. CH4: IL 2A/div. CH4: IL 10A/div. 5ms/div. 20μs/div. Short-Circuit Entry Short-Circuit Recovery IOUT = 0A IOUT = 0A CH1: VOUT 2V/div. CH1: VOUT 2V/div. CH2: VPG 5V/div. CH2: VPG 5V/div. CH3: Vsw 10V/div. CH3: Vsw 10V/div. CH4: IL 5A/div. CH4: IL 5A/div. 5ms/div. 5ms/div. MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 9 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 19V, VOUT = 3.3V, L = 3.3µH, TA = +25°C, unless otherwise noted. Load Transient IOUT = 3 - 6.5A, slew rate is 2.5A/µs by CCDH E-load CH1: VOUT/AC 50mV/div. CH4: IOUT 5A/div. 100μs/div. MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 10 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER BLOCK DIAGRAM EN VCC AGND VIN VIN Soft-Start BST BSTREG POR & Reference VIN SW FB FB On Time One Shot REF Min off time Control Logic SW SW DC Error Correction + + Output Discharge PGND Vref FB PG SW OC Limit REF 130% Vref OVP Fault logic 50% Vref UVP-2 75% Vref UVP-1 FB Figure 1: Functional Block Diagram MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 11 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER OPERATION Pulse-Width Modulation (PWM) Operation The MP2329C is a fully integrated, synchronous, rectified, step-down, switch-mode converter. Constant-on-time (COT) control is employed to provide fast transient response and easy loop stabilization. At the beginning of each cycle, the high-side MOSFET (HS-FET) is turned on when the feedback voltage (VFB) is below the reference voltage (VREF), which indicates an insufficient output voltage. The on period is determined by the output voltage and input voltage to make the switching frequency fairly constant over the input voltage range. The MP2329C operates in forced continuous conduction mode (CCM). The LS-FET turns on when the HS-FET is in its off state to minimize conduction loss. There is a dead short between the input and GND if both the HS-FET and LSFET are turned on at the same time. This is called a shoot-through. To prevent a shootthrough, a dead time is generated internally between the HS-FET off and LS-FET on, or LSFET off and HS-FET on. Internal compensation is applied for COT control to provide a more stable operation, even when ceramic capacitors are used as output capacitors. This internal compensation improves jitter performance without affecting the line or load regulation. Large Duty Cycle Operation When VIN is below 7V and VOUT is above 4.2V, the MP2329C reduces switching frequency to about 280kHz to support large-duty operation. If VOUT is below 3.9V, the MP2329C returns to the normal switching frequency. Jitter and FB Ramp Jitter occurs in both PWM and skip mode when noise in the VFB ripple propagates a delay to the HS-FET driver (see Figure 2 and Figure 3). Jitter can affect system stability with noise immunity proportional to the steepness of VFB’s downward slope. Therefore, the jitter in DCM is usually larger than that in CCM. However, VFB ripple does not affect noise immunity directly. VNOISE V S L O PE1 VFB VREF HS D river J itter Figure 2: Jitter in PWM Mode VNOISE VS LOPE 2 V FB V REF HS D river Jitter Figure 3: Jitter in Skip Mode Operating with External Ramp Compensation The MP2329C is able to support ceramic output capacitors without an external ramp, typically. However, in some cases, the internal ramp may not be enough to stabilize the system, or the jitter is too large. In these cases, external ramp compensation is needed. Refer to the Setting the Output Voltage with External Compensation section on page xx for design steps using external ramp compensation. Configuring the EN Control The enable pin (EN) is used to enable or disable the entire chip. Pull EN high to turn on the regulator. Pull EN low to turn off the regulator. Do not float EN. For automatic start-up, EN can be pulled up to the input voltage through a resistive voltage divider. Choose the values of the pull-up resistor (RUP from VIN to EN) and the pull-down resistor (RDOWN from EN to GND) to determine the automatic start-up voltage with Equation (1): VINSTART  1.25  RUP  RDOWN (V) RDOWN (1) For example, when RUP = 150kΩ and RDOWN = 51kΩ, VIN-START is 4.92V. The EN voltage must not exceed the 4.5V maximum value to avoid damaging the internal circuit. MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 12 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER Power Good (PG) The power good pin (PG) indicates whether the output voltage is in the normal range compared to the internal reference voltage. PG is an open-drain structure and requires an external pull-up supply. During power-up, the PG output is pulled low. This indicates to the system to remain off and keep the load on the output to a minimum. This helps reduce inrush current during start-up. When the output voltage is higher than 95% and lower than 115% of internal reference voltage and the soft start is finished, the PG signal is pulled high. When the output voltage is lower than 90% after the soft start finishes, the PG signal remains low. When the output voltage is higher than 115% of the internal reference, PG is switched low. The PG signal rises high again after the output voltage drops below 105% of the internal VREF. The PG output is pulled low when the EN under-voltage lockout (UVLO), input UVLO, over-current protection (OCP), or over-temperature protection (OTP) is triggered. Soft Start (SS) The MP2329C employs a soft start (SS) mechanism to ensure a smooth output during power-up. When EN rises high, the internal VREF ramps up gradually, and the output voltage ramps up smoothly as well. Once VREF reaches the target value, the soft start finishes, and the device enters steady-state operation. If the output is pre-biased to a certain voltage during start-up, the IC disables the switching of both the high-side and low-side switches until the voltage on the internal reference exceeds the sensed output voltage at the FB node. Over-Current Limit The MP2329C has a cycle-by-cycle overcurrent limiting control. The current-limit circuit employs a valley current-sensing algorithm. The MP2329C uses the RDS(ON) of the LS-FET as a current-sensing element. If the magnitude of the current-sense signal is above the current-limit threshold, the PWM is not allowed to initiate a new cycle, even if FB is lower than REF. Figure 4 shows the detailed operation of the valleycurrent limit. Valley_ILim FB REF PWM FB9A. MPS inductors are optimized and tested for use with our complete line of integrated circuits. Table 2 lists our power inductor recommendations. Select a part number based on your design requirements. Table 2: Power Inductor Selection Part Number Inductor Value Manufacturer Select family series (MPL-AL) MPL-AL6050-1R5 MPL-AL6050-2R2 MPL-AL6050-3R3 1.5µH to 3.3µH 1.5μH 2.2μH 3.3μH MPS 3. Place the decoupling capacitor as close to VCC and GND as possible. 4. Keep the switching node SW short and away from the feedback network. 5. Keep the BST voltage path as short as possible. 6. Keep the VIN and GND pads connected with large coppers to achieve better thermal performance. 7. Add several vias close to the VIN and GND pads to help with thermal dissipation. MPS MPS MPS Visit MonolithicPower.com under Products > Inductors for more information. PCB Layout Guideline Efficient PCB layout is critical for stable operation. For best results, refer to Figure 10 and follow the guidelines below. A four-layer layout is recommended for better thermal performance. 1. Place the high-current paths (GND, VIN, SW) very close to the device with short, direct, and wide traces. 2. Place the input capacitors as close to VIN and GND as possible. MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 17 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER 0402 EN FB 11 10 VIN 0805 0402 0402 0402 9 0402 8 1 7 0603 6 2 PGND 3 0603 AGND VCC 4 PGND PGND BST SW 5 PG 0402 Optional VCC Inductor 7mm*6.6mm 0805 0805 Figure 8: Recommended Layout MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 18 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER Design Example Table 3 shows a design example when ceramic capacitors are applied. Table 3: Design Example 8V to 24V VIN 3.3V VOUT 6.5A IOUT The detailed application schematics are shown in Figure 9 through Figure 15. The typical performance and waveforms are shown in the Typical Characteristics section. For more devices applications, please refer to the related evaluation board datasheet. MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 19 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER TYPICAL APPLICATION CIRCUITS (10) Figure 9: VIN = 19V, VOUT = 5V/6.5A Figure 10: VIN = 19V, VOUT = 3.3V/6.5A Figure 11: VIN = 19V, VOUT = 2.5V/6.5A MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 20 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER TYPICAL APPLICATION CIRCUITS (10) (continued) Figure 12: VIN = 19V, VOUT = 1.8V/6.5A Figure 13: VIN = 19V, VOUT = 1.5V/6.5A Figure 14: VIN = 19V, VOUT = 1.2V/6.5A MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 21 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER TYPICAL APPLICATION CIRCUITS (10) (continued) Figure 15: VIN = 19V, VOUT = 1V/6.5A NOTE: 10) The EN resistor divider sets the VIN threshold to 7.5V. For 5V input applications, change the EN resistor accordingly. MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 22 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER PACKAGE INFORMATION QFN-11 (2mmx2mm) PIN 1 ID MARKING PIN 1 ID INDEX AREA BOTTOM VIEW TOP VIEW SIDE VIEW NOTE: 1) LAND PATTERNS OF PIN1 AND PIN6 HAVE THE SAME LENGTH AND WIDTH 2) ALL DIMENSIONS ARE IN MILLIMETERS. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETERS MAX. 4) JEDEC REFERENCE IS MO-220, VARIATION VCCD. 5) DRAWING IS NOT TO SCALE. RECOMMENDED LAND PATTERN MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 23 MP2329C − 24V, 6.5A, SYNCHRONOUS BUCK CONVERTER CARRIER INFORMATION 1 Pin1 1 ABCD 1 1 ABCD ABCD ABCD Feed Direction  Part Number MP2329CGG–Z Package Description QFN-11 (2mmx2mm) Quantity/Reel Quantity/Tube Reel Diameter Carrier Tape Width Carrier Tape Pitch 5000 N/A 13in. 12mm 8mm NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP2329C Rev. 1.01 www.MonolithicPower.com 4/7/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 24 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Monolithic Power Systems (MPS): MP2329CGG-Z MP2329CGG-P