MP2451DJ-LF-Z

MP8768 8A, 28V, 600KHz Step-Down Converter with Synchronizable Gate Driver The Future of Analog IC Technology DESCRIPTION FEATURES The MP8768 is a high frequency synchronous rectified step-down switch mode converter with a built in internal high side power MOSFET. It offers a very compact solution to achieve 8A continuous output current over a wide input supply range with excellent load and line regulation. The MP8768 has very high efficiency over a wide output load range. • • • • • • • • • • • Current mode operation provides fast transient response and eases loop stabilization. Full protection features include OCP and thermal shut down. The MP8768 requires a minimum number of readily available standard external components and is available in a space saving 3mm x 4mm 14-pin QFN package. Wide 4.5V to 28V Operating Input Range 8A Output Current 50mΩ Internal High side Power MOSFET Fixed 600KHz switching frequency Sync from 300KHz to 2MHz External Clock Internal Compensation Power Good Output Integrated Bootstrap Diode OCP Protection and Thermal Shutdown Output Adjustable from 0.8V Available in 3mm x 4mm 14-pin QFN package. APPLICATIONS • • • • • • Notebook Systems and I/O Power Networking Systems Digital Set Top Boxes Personal Video Recorders Flat Panel Television and Monitors Distributed Power Systems “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION MP8768 Rev. 1.0 12/12/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET ABSOLUTE MAXIMUM RATINGS (1) PACKAGE REFERENCE Supply Voltage VIN .......................................30V VSW ...................... –0.3V (-5V for < 10ns) to 31V VBS ......................................................VSW + 6V All Other Pins................................ –0.3V to +6V Junction Temperature.............................. 150°C Lead Temperature ................................... 260°C Storage Temperature.............. –65°C to +150°C TOP VIEW FB 1 14 GND PG 2 13 BG EN/SYNC 3 12 VCC IN 4 11 BST IN 5 10 SW IN 6 9 SW AAM 7 8 SW Recommended Operating Conditions (2) Supply Voltage VIN ...........................4.5V to 28V Operating Temperature ............ –40°C to +85°C EXPOSED PAD ON BACKSIDE CONNECT TO GND Refer PCB Layout example in Application Section Thermal Resistance (3) θJA θJC 3x4 QFN14 .............................48 ...... 11 ...°C/W Part Number* Package MP8768DL 3x4 QFN14 Temperature Top Marking –40°C to +85°C 8768 Notes: 1) Exceeding these ratings may damage the device. 2) The device is not guaranteed to function outside of its operating conditions. 3) Measured on JESD51-7, 4-layer PCB. * For Tape & Reel, add suffix –Z (eg. MP8768DL–Z) For RoHS compliant packaging, add suffix –LF (eg. MP8768DL–LF–Z) ELECTRICAL CHARACTERISTICS VIN = 12V, TA = +25°C, unless otherwise noted. Parameters Supply Current (Shutdown) Symbol IIN Condition VEN = 0V Supply Current (Quiescent) (4) Switch On Resistance Switch Leakage (4) Current Limit Oscillator Frequency Fold-back Frequency IIN VEN = 2V, VFB = 1V Min SW RDS-ON SW LKG ILIMIT FSW FFB VFB = 700mV VFB = 0V Maximum Duty Cycle DMAX VFB = 700mV 85 Sync Frequency Range FSYNC 4.5V ≤ VIN ≤ 28V 0.3 Feedback Voltage Feedback Current EN/SYNC Input Low Voltage VFB IFB ENVIL EN/SYNC Input High Voltage ENVIH EN Input Current IEN EN Turn Off Delay Power Good Threshold Rising Power Good Threshold Falling MP8768 Rev. 1.0 12/12/2013 ENTd-Off PGVth_Hi PGVth_Lo VEN = 0V, VSW = 0V 9.5 400 788 VFB = 800mV Typ Max Units 0 1.0 μA 1 50 0 1.2 600 0.25 800 mA mΩ μA A KHz fSW 90 808 10 2 VEN = 2V VEN = 0V 10 % 2 MHz 828 50 0.4 mV nA V V 2 0 5 0.9 0.7 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. μA μs VFB VFB 2 MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET ELECTRICAL CHARACTERISTICS (continued) VIN = 12V, TA = +25°C, unless otherwise noted. Parameters Symbol Condition Min Typ Max PGTd Power Good Sink Current Capability PGVOL Sink 4mA 0.4 V PGLKG VPG = 3.3V 10 nA 4.3 V Power Good Leakage Current Under Voltage Lockout Threshold Rising Under Voltage Lockout Threshold Hysteresis VCC Regulator VCC Load Regulation (4) Gate Drive Sink Impedance (4) Gate Drive Source Impedance Thermal Shutdown 20 Units Power Good Delay 3.9 VCC 4.5 Icc=20mA RSINK RSOURCE TSD 4.1 μs 880 mV 5 5 1 4 150 V % Ω Ω °C Note: 4) Guaranteed by design. PIN FUNCTIONS Pin # Name 1 Description Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets the output voltage. To prevent current limit run away during a short circuit fault condition the frequency fold-back comparator lowers the oscillator frequency when the FB voltage is below 400mV. Power good output, the output of this pin is an open drain and is low if the output voltage is lower than 10% of the nominal voltage. There is a 20µs delay to pull PG if the output voltage is lower than 10% of regulation value. FB PG 2 EN=1 to enable the MP8768. External clock can be applied to EN pin for changing switching frequency. For automatic start-up, connect EN pin to VIN with 100KΩ resistor. Supply Voltage. The MP8768 operates from a +4.5V to +28V input rail. C1 is needed to decouple the input rail. Use wide PCB traces and multiple vias to make the connection. Tie to ground forces the MP8768 in synchronous Mode. Tie to a voltage set by a resistor divider forces the MP8768 into non-synchronous mode when load is small. Switch Output. Use wide PCB traces and multiple vias to make the connection. Bootstrap. A capacitor connected between SW and BS pins is required to form a floating supply across the high-side switch driver. Bias Supply. Decouple with 1µF capacitor. Low Side Gate Drive output. 3 EN/SYNC 4,5,6 IN 7 AAM 8,9,10 SW 11 BST 12 13 VCC BG 14 GND Exposed Pad MP8768 Rev. 1.0 12/12/2013 System Ground. This pin is the reference ground of the regulated output voltage. For this reason care must be taken in PCB layout. Connect exposed pad to GND plane for optimal thermal performance. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 3 MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET TYPICAL PERFORMANCE CHARACTERISTICS VIN = 12V, VOUT = 3.3V, L = 1.5µH, TA = +25ºC, unless otherwise noted. Enable Supply Current vs. Input Voltage Disable Supply Current vs. Input Voltage 0.15 940 5.4 920 5.2 0.10 900 5.0 VCC (V) 880 0.05 860 840 25 15 20 INPUT VOLTAGE (V) 10 30 -0.05 OUTPUT VOLTAGE (V) PEAK CURRENT (A) 8 6 4 2 40 60 80 DUTY CYCLE (%) 100 NORMALIZED OUTPUT VOLTAGE (%) IOUT=4A 10 Minimum on time Limit 1 0.1 60 IOUT=8A 0 5 10 15 20 25 INPUT VOLTAGE (V) 5 10 15 20 25 INPUT VOLTAGE (V) 30 30 0.60 0.40 0.20 0 -0.20 -0.40 -0.60 0 2 4 6 8 LOAD CURRENT (A) 10 Case Temperature Rise vs. Output Current 50 40 0.00 IOUT=4A -0.05 30 20 -0.10 -0.15 0 Load Regulation Dmax Limit Line Regulation 0.05 4.0 30 100 10 20 5 10 15 20 25 INPUT VOLTAGE (V) Operating Range 12 0 0 NORMALIZED OUTPUT VOLTAGE (%) 5 0 Peak Current vs. Duty Cycle 0.10 4.6 4.2 800 0 4.8 4.4 0.00 820 780 VCC Regulator Line Regulation 10 0 3 6 9 12 15 18 21 24 27 30 INPUT VOLTAGE (V) MP8768 Rev. 1.0 12/12/2013 0 0 2 4 6 8 OUTPUT CURRENT (A) 10 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4 MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 12V, VOUT = 3.3V, L = 1.5µH, TA = +25ºC, unless otherwise noted. Short Entry Short Recovery Enable Startup without Load VOUT 2V/div MP8768 Rev. 1.0 12/12/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 5 MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET BLOCK DIAGRAM IN + - VCC Regulator VCC RSEN Current Sense Amplifer Boost Regulator PGOOD MN3 Oscillator BS HS Driver + - PG Comparator SW C1 Reference EN/SYNC 1MEG FB C1 1pF 50pF R1 Control Logic Latches Comparator Timing ControL 400K + + - LS Driver Error Amplifier SDRV GND AAM Figure 1—Functional Block Diagram MP8768 Rev. 1.0 12/12/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 6 MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET OPERATION The MP8768 is a high frequency synchronous rectified step-down switch mode converter with a built in internal high side power MOSFET. It offers a very compact solution to achieve 8A continuous output current over a wide input supply range with excellent load and line regulation. The MP8768 operates in a fixed frequency, peak current control mode to regulate the output voltage. A PWM cycle is initiated by the internal clock. The integrated high-side power MOSFET is turned on and remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle starts. If, in 90% of one PWM period, the current in the power MOSFET does not reach the COMP set current value, the power MOSFET will be forced to turn off. Error Amplifier The error amplifier compares the FB pin voltage with the internal 0.8V reference (REF) and outputs a current proportional to the difference between the two. This output current is then used to charge or discharge the internal compensation network to form the COMP voltage, which is used to control the power MOSFET current. The optimized internal compensation network minimizes the external component counts and simplifies the control loop design. Internal Regulator Most of the internal circuitries are powered from the 5V internal regulator. This regulator takes the VIN input and operates in the full VIN range. When VIN is greater than 5.0V, the output of the regulator is in full regulation. When VIN is lower than 5.0V, the output decreases. Since this internal regulator provides the bias current for the bottom gate driver that requires significant amount of current depending upon the external MOSFET selection, a 1uF ceramic capacitor for decoupling purpose is required. Enable/Sync Control The MP8768 has a dedicated Enable/Sync control pin (EN/SYNC). By pulling it high or low, the IC can be enabled and disabled by EN. Tie EN to VIN for automatic start up. To disable the part, EN must be pulled low for at least 5µs. MP8768 Rev. 1.0 12/12/2013 The MP8768 can be synchronized to external clock range from 300KHz up to 2MHz through the EN/SYNC pin. The internal clock rising edge is synchronized to the external clock rising edge. Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) is implemented to protect the chip from operating at insufficient supply voltage. The MP8768 UVLO comparator monitors the output voltage of the internal regulator, VCC. The UVLO rising threshold is about 4.0V while its falling threshold is a consistent 3.2V. Internal Soft-Start The soft-start is implemented to prevent the converter output voltage from overshooting during startup. When the chip starts, the internal circuitry generates a soft-start voltage (SS) ramping up from 0V to 1.2V. When it is lower than the internal reference (REF), SS overrides REF so the error amplifier uses SS as the reference. When SS is higher than REF, REF regains control. Over-Current-Protection and Hiccup The MP8768 has cycle-by-cycle over current limit when the inductor current peak value exceeds the set current limit threshold. Meanwhile, output voltage starts to drop until FB is below the UnderVoltage (UV) threshold, typically 30% below the reference. Once a UV is triggered, the MP8768 enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is dead-short to ground. The average short circuit current is greatly reduced to alleviate the thermal issue and to protect the regulator. The MP8768 exits the hiccup mode once the over current condition is removed. Thermal Shutdown Thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. When the silicon die temperature is higher than 150°C, it shuts down the whole chip. When the temperature is lower than its lower threshold, typically 140°C, the chip is enabled again. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 7 MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET Floating Driver and Bootstrap Charging The floating power MOSFET driver is powered by an external bootstrap capacitor. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 2.2V with a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally (Figure 2). In DCM mode at light load condition, as long as VIN is 3V higher than VOUT, BST capacitor C4 will have enough voltage which is provided by VIN through D1, M3, C4, L1 and C2. If (VIN-VSW) is more than 5V, U2 will regulate M3 to maintain a 5V BST voltage across C4. SW Figure 2—Internal Bootstrap Charging Circuit Startup and Shutdown If both VIN and EN are higher than their appropriate thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitries. Three events can shut down the chip: EN low, VIN low and thermal shutdown. In the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. MP8768 Rev. 1.0 12/12/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 8 MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET APPLICATION INFORMATION Setting the Output Voltage The external resistor divider R1 and R2 is used to set the output voltage (see the schematic on front page). The feedback resistor R1 also sets the feedback loop bandwidth with the internal compensation capacitor (see Typical Application on page 1). Choose R1 to be around 31.6kΩ for optimal transient response. R2 is then given by: R2 = R1 VOUT −1 0.808V The T-type network is highly recommended when Vo is low, as Figure 3 shows. FB 1 R1 Rt VOUT R2 Figure 3— T-type Network Table 1 lists the recommended T-type resistors value for common output voltages. Table 1—Resistor Selection for Common Output Voltages VOUT (V) R1 (kΩ) R2 (kΩ) Rt (kΩ) 1.05 1.2 1.5 1.8 2.5 3.3 5 10 (1%) 10 (1%) 10 (1%) 10 (1%) 31.6 (1%) 31.6 (1%) 31.6 (1%) 33.2 (1%) 20.5 (1%) 11.8 (1%) 8.2 (1%) 14.7 (1%) 10 (1%) 6.04 (1%) 80.6 (1%) 80.6 (1%) 80.6 (1%) 80.6 (1%) 0 0 0 Selecting the Inductor A 1µH to 10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor DC resistance should be less than 15mΩ. For most designs, the inductance value can be derived from the following equation. L= VOUT × ( VIN − VOUT ) VIN × ΔIL × f OSC Choose inductor current to be approximately 30% if the maximum load current, 8A. The maximum inductor peak current is: IL(MAX ) = ILOAD + ΔIL 2 Under light load conditions below 100mA, larger inductance is recommended for improved efficiency. Synchronous MOSFET The external synchronous MOSFET is used to supply current to the inductor when the internal high-side switch is off. It reduces the power loss significantly when compared against a Schottky rectifier. Table 2 lists example synchronous MOSFETs and manufacturers. Table 2—Synchronous MOSFET Selection Guide Part No. Manufacture FDS6670AS Si7112 Si7114 AM4874 Fairchild Vishay Vishay Analog Power Selecting the Input Capacitor The input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the AC current to the step-down converter while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, a 22µF capacitor is sufficient. Since the input capacitor (C1) absorbs the input switching current it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated by: I C1 = ILOAD × VOUT ⎛⎜ VOUT × 1− VIN ⎜⎝ VIN ⎞ ⎟ ⎟ ⎠ The worse case condition occurs at VIN = 2VOUT, where: IC1 = ILOAD 2 Where ΔIL is the inductor ripple current. MP8768 Rev. 1.0 12/12/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 9 MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET For simplification, choose the input capacitor whose RMS current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, a small, high quality ceramic capacitor, i.e. 0.1μF, should be placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated by: ΔVIN = ⎛ ILOAD V V × OUT × ⎜⎜1 − OUT fS × C1 VIN ⎝ VIN ⎞ ⎟⎟ ⎠ Selecting the Output Capacitor The output capacitor (C2) is required to maintain the DC output voltage. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by: ΔVOUT ⎛ V V = OUT × ⎜⎜1 − OUT fS × L ⎝ VIN ⎞ ⎞ ⎛ 1 ⎟ ⎟⎟ × ⎜ R ESR + ⎜ 8 × f S × C2 ⎟⎠ ⎠ ⎝ Where L is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. In the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. The output voltage ripple is mainly caused by the capacitance. For simplification, the output voltage ripple can be estimated by: ΔVOUT = ⎞ ⎛ V × ⎜⎜1 − OUT ⎟⎟ VIN ⎠ × L × C2 ⎝ VOUT 8 × fS 2 In the case of tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to: ΔVOUT = VOUT ⎛ V × ⎜ 1 − OUT f S × L ⎜⎝ VIN ⎞ ⎟⎟ × R ESR ⎠ The characteristics of the output capacitor also affect the stability of the regulation system. The MP8768 can be optimized for a wide range of capacitance and ESR values. External Bootstrap Diode An external bootstrap diode may enhance the efficiency of the regulator, the applicable conditions of external BST diode are: z VOUT is 5V or 3.3V; and z Duty cycle is high: D= VOUT >65% VIN In these cases, an external BST diode is recommended from the output of the voltage regulator to BST pin, as shown in Figure 4 External BST Diode IN4148 BST MP8768 SW CBST L + COUT 5V or 3.3V Figure 4—Add Optional External Bootstrap Diode to Enhance Efficiency The recommended external BST diode is IN4148, and the BST cap is 0.1~1µF. Reference Design and PCB Layout Figure 5 and Table 3 shows the reference design. Figure 5—Reference Design Circuit MP8768 Rev. 1.0 12/12/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 10 MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET Table 3—BOM of Reference Design Qty Ref Value Description 2 2 2 0 1 C1A, C1B C2A, C2B C3, C4 C5 C6 4.7µF 47µF 1µF NS 82pF Ceramic Cap, 50V, X7R Ceramic Cap, 10V, X5R Ceramic Cap, 16V, X7R 1 1 2 0 1 1 R1 R2 R3, R5 R4, R6, R8 R7 L1 31.6k 10k 100k NS 10 1.5uH 1 M1 1 U1 Film Res., 5% 10mΩ DCR, 14A MOSFET, N-CH, 30V, 11.5mΩ Step-Down Converter Package Manufacturer Part Number 1210 1210 0603 Murata Murata Murata GRM32ER71H475KA88L GRM32ER61A476KE20L GRM188R71C105KA12D Ceramic Cap, 50V, COG 0603 Murata GRM1885C1H820JA01D Film Res., 1% Film Res., 1% Film Res., 5% 0603 0603 0603 Yageo Yageo Any RC0603FR-0731K6L RC0603FR-0710KL 0603 SMD Any Wurth 744311150 SO8 Fairchild FDS6670AS QFN14 MPS MP8768DL Also PCB layout is very important to achieve stable operation. Please follow these guidelines and take Figure 5 and 6 for references. 1) 2) 3) Route SW away from sensitive analog areas such as FB. 5) Connect IN, SW, and especially GND respectively to a large copper area to improve chip thermal performance and longterm reliability. It is suggested to add snubber circuit across the high side MOSFET (VIN pin and SW pin) so as to reduce SW spikes. MP8768 Rev. 1.0 12/12/2013 SGND R1 R9 R5 C5 FB 1 14 GND 2 13 BG PG R4 R3 Keep the connection of low-side MOSFET between SW pin and input power ground as short and wide as possible. 4) 6) R2 Keep the path of switching current short and minimize the loop area formed by Input cap, high-side and low-side MOSFETs. Place the feedback resistors and compensation components as close to the chip as possible. R6 C6 EN 3 C1A 2 4 C3 11 BST R7 IN 5 10 SW C4 IN 6 9 SW AAM 7 8 SW IN C1B 12 VCC R8 8 7 6 5 3 4 M1 PGND 1 2 C2A C2B Top Layer www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 11 MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET SGND Bottom Layer Figure 6—Reference PCB Layout MP8768 Rev. 1.0 12/12/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 12 MP8768 – 8A, 28V, SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFET PACKAGE INFORMATION 3MM X 4MM QFN14 2.90 3.10 1.60 1.80 0.30 0.50 PIN 1 ID SEE DETAIL A PIN 1 ID MARKING 1 14 0.18 0.30 3.20 3.40 3.90 4.10 PIN 1 ID INDEX AREA 0.50 BSC 7 8 TOP VIEW BOTTOM VIEW 0.80 1.00 0.20 REF PIN 1 ID OPTION A 0.30x45º TYP. PIN 1 ID OPTION B R0.20 TYP. 0.00 0.05 SIDE VIEW DETAIL A 2.90 0.70 NOTE: 1.70 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX. 4) JEDEC REFERENCE IS MO-229, VARIATION VGED-3. 5) DRAWING IS NOT TO SCALE. 0.25 3.30 0.50 RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP8768 Rev. 1.0 12/12/2013 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 13