MP2695
2
I C-Controlled, Single-Cell
Switching Charger with JEITA Profile
DESCRIPTION
FEATURES
The MP2695 is a highly integrated, flexible,
switch-mode battery charging management
device designed for a single-cell Li-ion and Lipolymer battery used in a wide range of portable
applications.
•
•
•
•
The MP2695 integrates three battery-charging
phases: pre-charge, constant-current, and
constant-voltage charge. This device also
manages the input power source by input current
limit regulation and minimum input voltage
regulation.
•
Using an I2C interface, the host can flexibly
program the charge parameters. The device
operating status can also be read in the registers.
Safety features include input over-voltage
protection, battery under-voltage protection,
thermal shutdown, and JEITA battery
temperature monitoring.
The MP2695 is available in a 21-pin QFN
(3mmx3mm) package.
•
•
•
•
•
•
4.0V to 11V Operation Voltage Range
Up to 16V Sustainable Input Voltage
500mA to 3.6A Programmable Charge Current
3.6V to 4.45V Programmable Charge
Regulation Voltage with ±0.5% Accuracy
100mA to 3A Programmable Input Current
Limit with ±10% Accuracy
Minimum Input Voltage Loop for Maximum
Adapter Power Tracking
Ultra-Low 25μA Battery Discharge Current in
Idle Mode
Comprehensive Safety Features:
o Fully-Customizable JEITA Profile with
Programmable Temperature Threshold
o Charge Safety Timer
o Input Over-Voltage Protection
o Thermal Shutdown
Analog Voltage Output IB Pin for Battery
Current Monitor
Status and Fault Monitoring
Available in a Small QFN-21 (3mmx3mm)
Package
APPLICATIONS
•
•
Bluetooth Speakers
Mobile Devices
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive.
For MPS green status, please visit the MPS website under Quality
Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are
registered trademarks of Monolithic Power Systems, Inc. or its subsidiaries.
MP2695 Rev. 1.1
5/21/2021
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1
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
TYPICAL APPLICATION
SMID
CMID
PMID
BST
CBST
USB
L1
IN
MP2695
CIN
RS1
SW
CBATT
CSP
BATT
RT1
VRNTC
RT2
NTC
INT
HOST
SCL
VCC
SDA
IB
AGND
MP2695 Rev. 1.1
5/21/2021
CVCC
PGND
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2
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
ORDERING INFORMATION
Part Number*
MP2695GQ-0000**
EVKT-MP2695
Package
QFN21 (3mmx3mm)
Evaluation Kit
Top Marking
See Below
* For Tape & Reel, add suffix -Z (e.g. MP2695GQ-xxxx-Z).
** “xxxx” is the register setting option. The factory default is “0000.” This content can be viewed in the I2C register
map. Please contact an MPS FAE to obtain a value for “xxxx.”
TOP MARKING
BHX: Product code of MP2695GQ
Y: Year code
LLL: Lot number
EVALUATION KIT EVKT-MP2695
EVKT-MP2695 kit contents (items below can be ordered separately):
#
Part Number
1
EV2695-Q-00A
2
EVKT-USBI2C-02 bag
3
Online resources
Item
Quantity
MP2695 evaluation board
Includes one USB to I2C communication interface,
one USB cable, and one ribbon cable
Include datasheet, user guide, product brief, and GUI
1
1
1
Order directly from MonolithicPower.com or our distributors.
Input Power
Supply
Input
GUI
USB Cable
USB to I2C
Communication
Interface
Ribbon Cable
EV2695-Q-00A
Output
Load
Figure 1: EVKT-MP2695 Evaluation Kit Set-Up
MP2695 Rev. 1.1
5/21/2021
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3
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
PACKAGE REFERENCE
TOP VIEW
BST VRNTC VCC NTC
21
PGND
20
19
18
IB
SDA
17
16
15
SCL
14
INT
13
N/C
12
N/C
11
AGND
1
SW
2
PMID
3
SMID
4
5
6
7
8
N/C
N/C
IN
IN
9
10
CSP BATT
QFN-21 (3mmx3mm)
MP2695 Rev. 1.1
5/21/2021
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4
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
PIN FUNCTIONS
Pin #
1
2
Name
PGND
SW
I/O
Power
Power
3
PMID
Power
4
5, 6,
12, 13
7, 8
9
10
11
SMID
Power
N/C
-
IN
CSP
BATT
AGND
Power
I
I
Power
14
INT
O
15
16
SCL
SDA
I
I/O
17
IB
O
18
NTC
I
19
VCC
Power
20
VRNTC
Power
21
BST
Power
MP2695 Rev. 1.1
5/21/2021
Description
Power ground.
Switching output node. Connect SW to the inductor.
High-side switching MOSFET drain. Bypass PMID with ceramic capacitors
from PMID to PGND as close to the IC as possible.
Connected to the drain of Q1 and Q2. Short SMID to PMID on the PCB.
No connection. Must be left open.
Power input of the IC. Place ceramic capacitors from IN to PGND.
Battery charge current-sense positive input.
Battery positive terminal.
Analog ground. Short to PGND on the PCB.
Open-drain interrupt output. Connect INT to the logic rail through a 10kΩ
resistor.
I2C interface clock. Connect SCL to the logic rail through a 10kΩ resistor.
I2C interface data. Connect SDA to the logic rail through a 10kΩ resistor.
Battery current indicator. The IB voltage (VIB) indicates the charge current to
the battery.
Temperature-sense input. Connect NTC to a negative temperature coefficient
thermistor. Program the temperature window with a resistor divider from
VRNTC to NTC to GND. Programmable JEITA thresholds are supported.
Internal circuit and the switch driver power supply. Bypass to AGND with
a ceramic capacitor as close to the IC as possible.
Reference voltage output for powering up NTC.
Bootstrap. Connect a 470nF bootstrap capacitor between BST and SW to
form a floating supply across the high-side power switch driver.
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5
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (4)
IN, PMID SMID to PGND ............. -0.3V to +16V
SW to PGND .................. -0.3V (-2V for 20ns) to
.......................................... +14V (16V for 20ns)
BST to PGND………. ................ SW to SW + 5V
All other pins to AGND ................... -0.3V to +5V
Continuous power dissipation (TA = 25°C) (2)
..................................................................2.5W
Junction temperature…............................ 150°C
Lead temperature (solder) ....................... 260°C
Storage temperature….………. -65°C to +150°C
QFN-21 (3mmx3mm) ........... 50 ........ 12 ... °C/W
Recommended Operating Conditions (3)
Supply voltage (VIN) .......................... 4V to 11V
IIN ......................................................... Up to 3A
ICC ..................................................... Up to 3.6A
VBATT ................................................. Up to 4.5V
Operating junction temp (TJ) .... -40°C to +125°C
MP2695 Rev. 1.1
5/21/2021
ESD Ratings
Human body model (HBM) (5) .................. 2000V
Charged device model (CDM) (6) ............... 250V
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX) - TA) / θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its operating
conditions.
4) Measured on JESD51-7, 4-layer PCB.
5) Per ANSI/ESDA/JEDEC JS-001.
6) Per ANSI/ESDA/JEDEC JS-002.
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6
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
ELECTRICAL CHARACTERISTICS
VIN = 5.0V, VBATT = 3.5V, RS1 = 10mΩ, TA = 25°C, unless otherwise noted.
Parameters
Quiescent Current
Battery discharge current in idle
mode
Input quiescent current without
switching
Input quiescent current when
switching
Power On/Off
IN operating range
Input under-voltage lockout
Input under-voltage lockout
hysteresis
Symbol Condition
IBATT_IDLE Idle mode
IIN_Q
IIN_QSW
VIN_OP
VIN_UV
VHDRM
VCC LDO output voltage
VCC under-voltage lockout
VCC under-voltage lockout
hysteresis
Power Path
IN to PMID FET (Q1) on
resistance
High-side FET (Q2) on
resistance
Low-side FET (Q3) on
resistance
Peak current limit for high-side
FET
VVCC
VCC_UV
MP2695 Rev. 1.1
5/21/2021
VIN > VIN_UVLO,
VIN > VBATT + VHDRM,
charge disabled
VIN > VIN_UVLO,
VIN > VBATT + VHDRM, charge
enabled,
BATT float
Converter switching
VIN falling
VIN rising
VIN falling
VIN = 5V, IVCC = 30mA
VCC rising
Typ
Max
Units
25
36
μA
0.6
1
mA
1
4
2.95
VIN rising
Input vs. battery headroom
Switching frequency
Min
3.10
mA
11
3.25
305
10
3.3
1.9
200
80
3.55
2.1
V
V
mV
310
3.8
2.3
mV
mV
V
V
80
mV
RON_Q1
25
mΩ
RON_HS
15
mΩ
RON_LS
14
mΩ
6.5
1.3
720
1200
A
A
kHz
kHz
IHS_PK
fSW
CC charge mode
Pre-charge mode
SW_FREQ = 700kHz
SW_FREQ = 1200kHz
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7
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
ELECTRICAL CHARACTERISTICS (continued)
VIN = 5.0V, VBATT = 3.5V, RS1 = 10mΩ, TA = 25°C, unless otherwise noted.
Parameters
Charge Mode
Symbol Condition
Charge voltage regulation
Fast charge current
Charge termination current
Recharge threshold below
VBATT_REG
Pre-charge to fast charge
threshold
Pre-charge to fast charge
hysteresis
Pre-charge current
Safety timer for charging cycle
Input Regulation
Input minimum voltage
regulation
Input current limit
Protection
Battery over-voltage threshold
BATT over-voltage hysteresis
IN over-voltage protection
Min
Typ
Max
Units
3.6
3.582
4.080
4.179
4.279
4.328
4.378
4.428
2.7
1.35
0.41
40
100
3.6
4.1
4.2
4.3
4.35
4.40
4.45
3
1.5
0.5
100
200
4.45
3.618
4.120
4.221
4.321
4.372
4.422
4.472
3.4
1.7
0.6
160
300
V
V
V
V
V
V
V
V
A
A
A
mA
mA
VBATT falling
100
200
320
mV
VBATT_PRE VBATT rising
2.9
3.0
3.1
V
VBATT_REG
ICC
ITERM
VRECH
IPRE
VIN_MIN
IIN_LIM
BATT_REG range (7)
BATT_REG[2:0] = 3.6V
BATT_REG[2:0] = 4.1V
BATT_REG[2:0] = 4.2V
BATT_REG[2:0] = 4.3V
BATT_REG[2:0] = 4.35V
BATT_REG[2:0] = 4.4V
BATT_REG[2:0] = 4.45V
ICC[4:0] = 3A
ICC[4:0] = 1.5A
ICC[4:0] = 0.5A
ITERM[1:0] = 100mA
ITERM[1:0] = 200mA
VBATT falling
290
mV
IPRE[1:0] = 150mA, VBATT = 1.8V
IPRE[1:0] = 350mA, VBATT = 1.8V
150
350
20
mA
mA
hours
VINMIN[2:0] = 4.5V
VINMIN[2:0] = 4.65V
IINLIM[2:0] = 3A
IINLIM[2:0] = 1.5A
IINLIM[2:0] = 0.5A
VBATT_OVP
VIN_OVP
VIN rising, VIN_OVP = 6V
VIN rising, VIN_OVP = 11V
IN over-voltage protection
VIN falling
hysteresis
Thermal Shutdown And Temperature Control
Thermal shutdown rising
TJ_SHDN TJ rising
threshold (7)
(7)
Thermal shutdown hysteresis
MP2695 Rev. 1.1
5/21/2021
4.41
4.56
2.7
1.3
0.4
4.51
4.66
2.85
1.4
0.45
4.61
4.76
3
1.5
0.5
V
V
A
A
A
102
104
1.5
6
11
106
%
%
V
V
5.8
10.6
6.2
11.4
300
mV
150
°C
20
°C
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8
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
ELECTRICAL CHARACTERISTICS (continued)
VIN = 5.0V, VBATT = 3.5V, RS1 = 10mΩ, TA = 25°C, unless otherwise noted.
Parameters
VRNTC voltage
NTC low-temp rising threshold
Symbol Condition
VVRNTC VIN = 5V, IVRNTC = 100μA
As percentage of VVRNTC,
VCOLD
VCOLD[1:0] = 72%
NTC low-temp rising threshold
hysteresis
NTC cool-temp rising threshold
Typ
3.5
Max
Units
V
72
73.1
74.3
%
As percentage of VVRNTC
VCOOL
NTC cool-temp rising threshold
hysteresis
NTC warm-temp falling
threshold
NTC warm-temp falling
threshold hysteresis
VWARM
NTC hot-temp falling threshold
VHOT
NTC hot-temp falling threshold
hysteresis
I2C Interface
Input high threshold level
Input low threshold level
Output low threshold level
I2C clock frequency
Battery Current Indicator
IB voltage output
Min
As percentage of VVRNTC,
VCOOL[1:0] = 60%
1.6
59.7
As percentage of VVRNTC
As percentage of VVRNTC,
VWARM[1:0] = 40%
62.2
1.6
39.4
As percentage of VVRNTC
As percentage of VVRNTC,
VHOT[1:0] = 36%
61
%
40.6
%
42
1.6
35.3
As percentage of VVRNTC
36.6
1.3
ICC = 1A in charge mode
0.33
fSCL
0.35
%
%
37.9
1.6
SDA and SCL
SDA and SCL
ISINK = 5mA
%
%
%
0.4
0.3
400
V
V
V
kHz
0.37
V
Note:
7) Guaranteed by design.
MP2695 Rev. 1.1
5/21/2021
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9
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
TYPICAL CHARACTERISTICS
IBATT_LKG at BATT = 5V vs.
Temperature
VBATT_REG = 4.2V vs. Temperature
100
4.3
VBATT_REG (V)
BATT_LKG (μA)
80
60
40
20
4.25
4.2
4.15
4.1
0
-50
0
50
-50
100
0
50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
ICC = 3A vs. Temperature
ITERM = 100mA vs. Temperature
160
3300
140
120
ITERM (mA)
ICC (mA)
3150
3000
100
80
60
40
2850
20
0
2700
-50
0
50
-50
100
0
50
100
TEMPERATURE (°C)
TEMPERATURE (°C)
IIN_LIM = 3A vs. Temperature
VIN_MIN = 4.65V vs. Temperature
4.75
4.7
3250
VIN_MIN (V)
IIN_LIM (mA)
3400
3100
2950
2800
4.65
4.6
4.55
2650
2500
4.5
-50
0
50
TEMPERATURE (°C)
MP2695 Rev. 1.1
5/21/2021
100
-50
0
50
100
TEMPERATURE (°C)
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10
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
TYPICAL PERFORMANCE CHARACTERISTICS
Constant Current Charge Efficiency
Constant Voltage Charge Efficiency
VIN = 5V, ICHG = 2.5A
VIN = 5V, VBATT = 4.2V
100%
100%
96%
96%
EFFICIENCY
EFFICIENCY
TA = 25°C, RS1 = 10mΩ, L1 = 1μH/6.5mΩ, battery simulator load, unless otherwise noted.
92%
88%
84%
92%
88%
84%
80%
2.9
3.3
3.7
80%
4.1
0
VBATT(V)
0.5
1
1.5
2
2.5
IBATT(A)
Constant Voltage Charge
Efficiency
Battery Charge Curve
VIN = 9V, VBATT = 4.2V
VIN = 5V
100%
CH2: VIN
2V/div.
EFFICIENCY
96%
92%
CH4: IBATT
1A/div.
88%
CH1: VBATT
1V/div.
84%
CH3: VSW
5V/div.
80%
0
0.5
1
1.5
2
2.5
3
3.5
4
IBATT (A)
4s/div.
Battery Charge Curve
Pre-Charge Steady State
VIN = 9V, ICC = 2.5A, VBATT-REG = 4.2V
VIN = 5V, VBATT = 1.5V, IPRE = 150mA
CH1: VIN
2V/div.
CH2: VBATT
2V/div.
CH2: VIN
2V/div.
CH4: IBATT
1A/div.
CH1:
VBATT
1V/div.
CH4: IL
1A/div.
CH3: VSW
5V/div.
CH3: VSW
10V/div.
4s/div.
MP2695 Rev. 1.1
5/21/2021
1μs/div.
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11
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
TA = 25°C, RS1 = 10mΩ, L1 = 1μH/6.5mΩ, battery simulator load, unless otherwise noted.
CC Charge Steady State
CV Charge Steady State
VIN = 5V, VBATT = 3.5V, ICC = 2A
VIN = 5V, VBATT = 4.2V
CH1: VIN
2V/div.
CH2: VBATT
2V/div.
CH1: VIN
2V/div.
CH2: VBATT
2V/div.
CH4: IL
1A/div.
CH4: IL
1A/div.
CH3: VSW
5V/div.
CH3: VSW
5V/div.
1μs/div.
1μs/div.
Power On, CC Charge Mode
Power Off, CC Charge Mode
VIN = 5V, VBATT = 3.5V, ICC = 3A
VIN = 5V, VBATT = 3.5V, ICC = 3A
CH2: VBATT
2V/div.
CH1: VIN
2V/div.
CH2: VBATT
2V/div.
CH1: VIN
2V/div.
CH4: ICHG
2A/div.
CH4: ICHG
2A/div.
CH3: VSW
5V/div.
CH3: VSW
5V/div.
2ms/div.
MP2695 Rev. 1.1
5/21/2021
2ms/div.
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12
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
FUNCTIONAL BLOCK DIAGRAM
SMID PMID
Charge
Pump
K2 x IIN
BST
A4
VIN
SW
A2
Q1
Q2
Q3
Driver
VIN
Detect
Current
Sense
CSP
A1
BATT
PWM
Signal
K1 x ICHG
PGND
A3
LDO
Mode
Control
VCC
VRNTC
PWM Controller
LDO
NTC
VBATT
AGND
Control Logic &
Mode Selection
K1 x ICHG
INT
JEITA
IB
SDA
SCL
Thermal
Protection
BATT_REG
GMV
VBATT
IPRE / ICHG
GMI
K1 x ICHG
IINDPM
GMINI
K2 x IIN
I2C
Setting
K3 x VIN
GMINV
VINDPM
Figure 2: Functional Block Diagram
MP2695 Rev. 1.1
5/21/2021
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13
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
OPERATION
Introduction
The MP2695 is an I2C-controlled switching
charger. The IC supports a precision Li-ion or Lipolymer charging system for single-cell
applications. When no input is present, the IC
operates at a low current to reduce power
consumption from the battery.
VCC Power Supply
VCC provides power for the internal bias circuit
and the low-side switch driver. VCC is powered by
whichever voltage is highest between PMID and
BATT. When the VCC voltage rises above the
VVCC_UV threshold, the I2C interface is ready for
communication, and all the registers reset to the
default value. When the device is switching, VCC
can provide up to 30mA for the external load.
Table 1: Charge Current vs. Battery Voltage
(RS1 = 10mΩ)
Battery
Voltage
BATT < 3V
BATT > 3V
Charge
Current
IPRE[1:0]
ICC[4:0]
Default
Value
150mA
1A
CHG_STAT
01
10
The charge current can be scaled by
implementing different current-sense resistor
values. The fast-charge current (ICC) can be
calculated with Equation (1):
ICC =
ICC[4 : 0] * 10m Ω
RS1
(1)
The pre-charge current (IPRE) can be calculated
with Equation (2):
IPRE =
IPRE[4 : 0] * 10m Ω
RS1
(2)
Battery Charging Profile
The IC can run a charging cycle autonomously
without host involvement. The host can also
control the charge operations and parameters via
the registers.
Note that the soldering tin for the current-sense
resistor has resistance that must be compensated
for.
A new charge cycle can start when the following
conditions are met:
During the entire charging process, the actual
charge current may be less than the register
setting due to other loop regulations, such as the
input current limit or the input voltage limit.
•
VIN is above VIN_UV
•
VIN is below VIN_OVP
•
VIN is above VBATT + VHDRM
•
NTC voltage is in the proper range (if
NTC_STOP is set to 1)
•
•
No charge timer fault
•
•
Charging is enabled (CHG_EN = 1)
•
No battery over-voltage
After the charge cycle has completed, unplug and
re-insert VIN or toggle the CHG_EN bit to start a
new charge cycle.
Charge Termination
Charging terminates if the following conditions
occur:
•
The charge current is below the termination
threshold for 20ms
The IC works in a constant-voltage charge
loop
The IC is not in the input current loop or input
voltage loop
After termination, the status register CHG_STAT
is set to 11, and an INT pulse is generated.
Battery Voltage
Charge Cycle
The IC checks the battery voltage (VBATT) to
provide three main charging phases: pre-charge,
constant-current (CC) charge, and constantvoltage (CV) charge (see Figure 3).
The IC regulates the voltage drop on the currentsense resistor (RS1) for the battery pre-charge
and constant-current charge current. Table 1
shows the default value for a 10mΩ resistor.
MP2695 Rev. 1.1
5/21/2021
VBATT_REG
ICC
Charge Current
VBATT_PRE
IPRE
ITERM
Pre-Charge
CC Fast Charge
Constant Voltage Charge
Safety Timer
Figure 3: Battery Charge Profile
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MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
Automatic Recharge
When the battery is fully charged and charging is
terminated, the battery may be discharged
because of system consumption or self-discharge.
When VBATT is discharged below the recharge
threshold (VBATT_REG - 200mV), the IC starts a new
charging cycle automatically if the input power is
valid. The timer resets when the auto-recharge
cycle begins.
Safety Timer
The IC provides a safety timer to prevent extended
charging cycles caused by abnormal battery
conditions. The safety timer feature can be
disabled via the I2C.
The safety timer resets at the beginning of each
new charging cycle. Two actions can restart the
safety timer: starting a new charge cycle or
toggling EN_TIMER.
If the safety timer expires before the charge is
complete, then an INT pulse is generated, the
charge cycle stops, and CHG_FAULT[1:0]
becomes 11 (signaling a safety timer expiration).
To clear this fault, unplug and reinsert VIN once
the safety timer expires.
Input Voltage Based and Input Current Based
Power Management
The IC features both input current and input
voltage
based
power
management
by
continuously monitoring the input current and
input voltage.
When the input current reaches the limit set by
IINLIM[2:0], the charge current tapers off to keep
the input current from increasing further.
the voltage at the NTC pins. The NTC function can
be disabled by setting EN_NTC = 0.
When NTC_STOP is set to 1, the NTC voltage
should be within the VHOT to VCOLD range for both
charge operations. The IC resumes switching
when the NTC voltage returns to within the VHOT to
VHOT range.
When NTC_STOP is set to 0, the IC only
generates an interrupt (INT) signal and reports the
NTC pin status if the NTC_FAULT[2:0] bits have
any changes.
The JEITA profile is supported when the
JEITA_DIS bit is set to 0.
At a cool temperature (VCOLD to VCOOL) range, the
charge current is reduced according to the
JEITA_ISET[1:0] setting (see Figure 4).
Charge Current %
100%
JEITA_ISET = 1
50%
JEITA_ISET = 0
14.3%
COLD
COOL
WARM
HOT
Temperature
Figure 4: JEITA Profile – Charge Current
At a warm temperature (VWARM to VHOT) range, the
charge voltage is reduced according to the
JEITA_VSET[1:0] setting (see Figure 5).
Charge Voltage
VBATT
VBATT - 100mV
If the preset input current limit is higher than the
rating of the adapter, the backup input voltage
based power management also works to prevent
the input source from being overloaded. When the
input voltage falls below the input voltage
regulation threshold (set by VINMIN[2:0]) due to a
heavy load, the charge current is also reduced to
keep the input voltage from dropping further.
An INT pulse generates once the device enters a
VINPPM or IINPPM condition.
Thermistor Qualification
VRNTC is driven to match the VCC voltage when
the IC is in charge mode. The IC continuously
monitors the battery’s temperature by measuring
MP2695 Rev. 1.1
5/21/2021
JEITA_VSET = 0
VBATT - 200mV
JEITA_VSET = 1
COLD
COOL
WARM
HOT
Figure 5: JEITA Profile – Charge Voltage
The HOT and COLD thresholds have two options
in the register. The WARM and COOL thresholds
have four options in the register, which offers
accurate and flexible JEITA control.
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15
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
Interrupt (INT) to Host
A 50μs interrupt (INT) pulse is generated on the
open drain (INT pin) if any of the following events
occur:
A good input source is detected
The status register 05h changes
The fault resister 06h changes
Battery Over-Voltage Protection (OVP)
If VBATT exceeds 104% of VBATT_REG, then the IC
stops charging, BATT_OVP is set to 1, and an INT
pulse is generated. An 800μA current source
discharges the battery until it returns to the normal
range.
Battery over-voltage protection (OVP) can be
disabled by setting BATT_OVP_DIS to 1.
Input Over-Voltage Protection (OVP)
If IN senses a voltage above the VIN_OVP
threshold, then the DC/DC converter shuts down.
The input OVP threshold can be 6V, 11V, or set
via VIN_OVP.
Thermal Shutdown
The IC monitors the internal junction temperature
to maximize power delivery and avoid overheating
the chip. If the IC’s junction temperature exceeds
the threshold value (typically 150°C), then the
converter shuts down. If the junction temperature
drops to about 120°C, the MP2695 resumes
normal operation.
Battery Current Analog Output
The IC has an IB pin to monitor the real-time
battery current. The IB voltage (VIB) is a fraction of
the battery current. It indicates the current flowing
into of the battery.
If using a 10mΩ current-sense resistor in charge
mode, the IB voltage (VIB) can be calculated with
Equation (3):
VIB = ICHG x 0.36(V)
The IC operates as a slave device, receiving
control inputs from the master device (e.g. a
micro-controller). SCL is driven by the master
device. The I2C interface supports both standard
mode (up to 100 kbit/s) and fast mode (up to 400
kbit/s).
All transactions begin with a start (S) command
and are terminated by a stop (P) command. Start
and stop commands are generated by the master.
A start command is defined as a high to low
transition on SDA while SCL is high. A stop
command is defined as a low to high transition on
SDA while SCL is high. Figure 6 shows the start
and stop commands.
SDA
SCL
Series Interface
The IC uses an I2C interface for setting the
charging parameters and device status reporting.
The I2C is a two-wire serial interface with two bus
lines: a serial data line (SDA) and serial clock line
Stop (P)
Start (S)
Figure 6: Start and Stop Commands
For data validity, the data on SDA must be stable
during the high clock period. The SDA high and
low states only change if the clock signal on SCL
is low. Every byte on SDA must be 8 bits long. The
number of bytes transmitted per transfer is
unrestricted. Data is transferred with the most
significant bit (MSB) first.
SDA
(3)
Note that scaling the current-sense resistor also
scales the IB gain.
MP2695 Rev. 1.1
5/21/2021
(SCL). Both SDA and SCL are open drains that
must be connected to the positive supply voltage
via a pull-up resistor.
SCL
Data line
stable
Data valid
Change
of data
allowed
Figure 7: Bit Transfer on the I2C Bus
To signal that a byte was successfully received by
the transmitter, each byte has to be followed by an
acknowledge (ACK) bit generated by the receiver.
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16
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
direction bit (bit R/W). A 0 indicates a transmission
(write), and a 1 indicates a request for data (read).
Figure 8 shows the address arrangement.
The ACK signal is defined as follows: the
transmitter releases SDA during the ACK clock
pulse and the receiver pulls SDA low. SDA
remains low during the 9th clock’s high period.
LSB
MSB
If SDA is high during the 9th clock, then the signal
is defined as a not acknowledged (NACK) signal.
The master then generates either a stop to abort
the transfer or a repeated start to begin a new
transfer.
Figure 8: 7-Bit Address
After the start signal, a slave address is sent. This
address is 7 bits long, followed by an 8th data
See Figure 9, Figure 10, Figure 11, Figure 12, and
Figure 13 for detailed signal sequences.
R/W
Slave Address
Acknowledgement
Signal from Receiver
Acknowledgement
Signal from Slave
SDA
MSB
SCL
1
Start
or
Repeated
Start
7
2
9
8
1
2
8
9
ACK
Stop
or
Repeated
Start
ACK
Figure 9: Data Transfer on the I2C Bus
1
7
1
1
S
Slave Address
0
ACK
8
Reg Address
1
8
1
1
ACK
Data Address
ACK
P
Figure 10: Single-Write
1
7
1
1
8
1
1
7
1
1
8
1
1
S
Slave Address
0
ACK
Reg Address
ACK
S
Slave Address
1
ACK
Data
NACK
P
Figure 11: Single-Read
1
S
7
Slave Address
1
1
8
1
0
ACK
Reg Address
ACK
8
Data to Address
1
8
1
8
1
1
ACK
Data to Address + 1
ACK
Data to Address + n
ACK
P
Figure 12: Multi-Write
MP2695 Rev. 1.1
5/21/2021
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MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
1
S
7
Slave Address
1
1
8
1
1
7
1
1
0
ACK
Reg Address
ACK
S
Slave Address
1
ACK
8
1
8
1
8
1
1
Data @ Address
ACK
Data @ Address + 1
ACK
Data @ Address + n
NACK
P
Figure 13: Multi-Read
MP2695 Rev. 1.1
5/21/2021
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18
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
I2C REGISTER MAP
IC Address: 6Bh
Register Name
REG00h
REG01h
REG02h
REG05h
REG06h
REG07h
REG08h
Address
0x00
0x01
0x02
0x05
0x06
0x07
0x08
R/W
R/W
R/W
R/W
R
R
R/W
R/W
Description
Input voltage regulation setting and input current limit setting.
Charge current setting and pre-charge current setting.
Battery regulation voltage and termination current setting.
Status register.
Fault register.
Miscellaneous control.
JEITA control.
REG 00h
Bit
Name
POR
Reset by
REG_RST
R/W
7
REG_RST
0
Y
R/W
0: Keeps current setting
1: Reset
Resets all registers to default.
After reset, this bit returns to 0
6
EN_TIMER
1
Y
R/W
0: Disabled
1: Enabled (default)
Enables the safety timer
5
VINMIN[2]
1
Y
R/W
200mV (default)
4
VINMIN[1]
0
Y
R/W
100mV
Description
Comment
Sets the input voltage dynamic
regulation
3
VINMIN[0]
0
Y
R/W
50mV
Offset: 4.45V
Range: 4.45V to 4.8V
Default: 4.65V (200mV)
2
IINLIM[2]
0
Y
R/W
1
IINLIM[1]
0
Y
R/W
Sets the input current limit
0
IINLIM[0]
1
Y
R/W
000: 100mA
001: 500mA (default)
010: 1000mA
011: 1500mA
100: 1800mA
101: 2100mA
110: 2400mA
111: 3000mA
MP2695 Rev. 1.1
5/21/2021
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MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
REG 01h
Bit
Name
POR
Reset by
REG_RST
R/W
7
ICC[4]
0
Y
R/W
1600mA
6
ICC[3]
0
Y
R/W
800mA
5
ICC[2]
1
Y
R/W
400mA
4
ICC[1]
0
Y
R/W
200mA
3
ICC[0]
1
Y
R/W
100mA
2
EN_NTC
1
Y
R/W
0: Disabled
1: Enabled (default)
1
IPRE[1]
0
Y
R/W
0
IPRE[0]
1
Y
R/W
Description
01: 150mA (default)
10: 250mA
11: 350mA
Comment
Sets the charge current for the
10mΩ current-sense resistor
Offset: 500mA
Range: 500mA to 3.6A
Default: 1A
A scaling current-sense
resistor scales the setting at
the same ratio.
Sets the pre-charge current for
the 10mΩ current-sense
resistor
Range: 150mA to 350mA
REG 02h
Bit
Name
POR
Reset by
REG_RST
R/W
7
BATT_OVP_DIS
0
Y
R/W
6
BATT_REG[2]
0
Y
R/W
5
BATT_REG[1]
1
Y
R/W
4
BATT_REG[0]
0
Y
R/W
Description
Comment
0: Enabled (default)
1: Disabled
Enables OVP battery function
000: 3.6V
001: 4.1V
010: 4.2V (default)
011: 4.3V
100: 4.35V
101: 4.4V
110: 4.45V
Sets the charge voltage
regulation
Enables JEITA
0: JEITA enabled, NTC
warm/cool decreases ICC or
VBATT_REG
1: JEITA disabled, NTC
warm/cool only reports status
and INT
3
JEITA_DIS
1
Y
R/W
0: Enabled
1: Disabled (default)
2
ITERM[1]
0
Y
R/W
200mA
Sets the charge termination
current for the 10mΩ currentsense resistor
1
ITERM[0]
0
Y
R/W
100mA
Offset: 100mA
Range: 100mA to 400mA
0
CHG_EN
1
Y
R/W
0: Disabled
1: Enabled (default)
Enables charge mode
MP2695 Rev. 1.1
5/21/2021
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MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
REG 05h
Bit
Name
POR
Reset by
REG_RST
R/W
7
Reserved
N/A
N/A
N/A
N/A
6
Reserved
N/A
N/A
N/A
N/A
5
CHG_STAT[1]
0
Y
R
4
CHG_STAT[0]
0
Y
R
3
VPPM_STAT
0
Y
R
0: Does not enter VIN_LIM loop
1: Enters VIN_LIM loop
2
IPPM_STAT
0
Y
R
0: Does not enter IIN_LIM loop
1: Enters IIN_LIM loop
1
USB1_PLUG_IN
0
Y
R
0: Not plugged in
1: Plugged in
0
Reserved
0
Y
R
Description
Comment
00: Not charging
01: Pre-charge
10: CC or CV charge
11: Charge complete
If (VIN_UV, VBATT + VHDRM )
< VIN < VIN_OVP, then this
bit is set to 1.
An interrupt signal is asserted when any bit in this register changes.
REG 06h
Bit
Name
POR
Reset by
REG_RST
R/W
Description
0: No battery ULVO
1: Battery UVLO
7
BATT_UVLO
0
Y
R
6
Reserved
N/A
N/A
N/A
N/A
5
Reserved
N/A
N/A
N/A
N/A
4
CHG_FAULT[1]
0
Y
R
3
CHG_FAULT[0]
0
Y
R
2
NTC_FAULT[2]
0
Y
R
1
NTC_FAULT[1]
0
Y
R
0
NTC_FAULT[0]
0
Y
R
Comment
If VBATT is below the
UVLO threshold, then
this bit is set to 1.
Once the battery is
charged again, this bit
resets to 0.
00: Normal
01: USB1 UV
10: USB1 OV
11: Safety timer expiration
000: Normal
001: Warm
010: Cool
011: Cold
100: Hot
An interrupt signal is asserted when any bit in this register changes.
MP2695 Rev. 1.1
5/21/2021
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MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
REG 07h
Bit
Name
POR
Reset by
REG_RST
R/W
7
Reserved
N/A
N/A
N/A
N/A
6
Reserved
N/A
N/A
N/A
N/A
5
BATT_OVP
0
Y
R
Description
Comment
0: Battery normal
1: Battery OVP
4
NTC_STOP
1
Y
R/W
0: NTC out of window only
reports in register
1: NTC out of window
suspends charge operation
3
VIN_OVP
0
Y
R/W
0: 6V
1: 11V
2
SW_FREQ
0
Y
R/W
0: 700kHz (default)
1: 1200kHz
1
Reserved
N/A
N/A
N/A
N/A
0
Reserved
N/A
N/A
N/A
N/A
Bit
Name
POR
Reset by
REG_RST
R/W
Description
7
JEITA_VSET
1
Y
R/W
0: VBATT_REG - 100mV
1: VBATT_REG - 200mV
6
JEITA_ISET
1
Y
R/W
0: 14.3% of ICC
1: 50% of ICC (default)
5
VHOT
1
Y
R/W
0: 34%
1: 36% (default)
Sets the hot threshold
4
VWARM[1]
0
Y
R/W
Sets the warm threshold
3
VWARM[0]
1
Y
R/W
00: 44%
01: 40% (default)
10: 38%
11: 36%
2
VCOOL[1]
1
Y
R/W
Sets the cool threshold
1
VCOOL[0]
1
Y
R/W
00: 72%
01: 68%
10: 64%
11: 60% (default)
0
VCOLD
0
Y
R/W
0: 72% (default)
1: 68%
Sets the cold threshold
REG 08h
MP2695 Rev. 1.1
5/21/2021
Comment
Default: VBATT_FULL - 200mV
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MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
REG 0Ah (8)
Bit
Name
POR
Reset by
REG_RST
R/W
7
TMR
0
N/A
N/A
0: 20hrs (default)
1: 10hrs
6
Reserved
N/A
N/A
N/A
N/A
5
Reserved
N/A
N/A
N/A
N/A
4
Reserved
N/A
N/A
N/A
N/A
3
VPRE
0
N/A
N/A
0: 3V (default)
1: 2.5V
2
Reserved
N/A
N/A
N/A
N/A
1
Reserved
N/A
N/A
N/A
N/A
0
Reserved
N/A
N/A
N/A
N/A
Description
Comment
Sets the timer duration
Sets the pre-charge threshold
Note:
8) Register 0Ah is for OTP only and is not accessible to users.
OTP MAP
#
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x02
N/A
BATT_REG (3.6V to 4.45V)
N/A
N/A
N/A
N/A
0x07
N/A
N/A
N/A
NTC_STOP
VIN_OVP
N/A
N/A
N/A
0x0A
TMR
N/A
N/A
N/A
VPRE
N/A
N/A
N/A
OTP DEFAULT
MP2695 Rev. 1.1
5/21/2021
OTP items
Default
BATT_REG[2:0]
4.2V
NTC_STOP
1: NTC out of window suspends charge operation
VIN_OVP
0: VIN_OVP is 6V
TMR
0: Charge timer is 20hrs
VPRE
0: Pre-charge threshold is 3V
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MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
APPLICATION INFORMATION
NTC Function
The JEITA profile is supported for the battery
temperature management. For a given NTC
thermistor, select an appropriate RT1 and RT2 to
set the NTC window. RT1 can be calculated with
Equation (4):
RT1 =
RNTC _ HOT × RNTC _ COLD × (VCOLD − VHOT )
VCOLD × VHOT × (RNTC _ COLD − RNTC _ HOT )
(4)
RT2 can be calculated with Equation (5):
RT2 =
RNTC _ HOT × RNTC _ COLD × (VCOLD − VHOT )
(5)
VHOT × (1 − VCOLD ) × RNTC _ COLD − VCOLD × (1 − VHOT ) × RNTC _ HOT
Where RNTC_HOT is the value of the NTC resistor
at the upper bound of its operating temperature
range, and RNTC_COLD is the value at its lower
bound. VCOLD is the hot temperature threshold
percentage, which can be selected as 72% or
68%. VHOT is the cold temperature threshold
percentage, which can be selected as 34% or
36%.
The warm temperature threshold (VWARM) can be
calculated with Equation (6):
VWARM =
RT2 // RNTC _ WARM
RT1 + RT2 // RNTC _ WARM
(6)
The cool temperature threshold (VCOOL) can be
calculated with Equation (7):
VCOOL =
RT2 // RNTC _ COOL
RT1 + RT2 // RNTC _ COOL
(7)
Choose the nearest warm/cool threshold in
REG08h using the results from the calculations
above.
If no external NTC is available, connect RT1 and
RT2 to keep the voltage on NTC within the valid
NTC window (e.g. RT1 = RT2 = 10kΩ).
Selecting the Inductor
Inductor selection requires a tradeoff between
cost, size, and efficiency. A lower inductance
value means a smaller size, but results in higher
current ripple, magnetic hysteretic losses, and
output capacitances. A higher inductance value
offers lower ripple current and smaller output
filter capacitors, but results in higher inductor DC
resistance (DCR) loss.
MP2695 Rev. 1.1
5/21/2021
Table 2 shows the recommended values to
choose the best inductor for the desired
application.
Table 2: Inductance Selection Guide
RS1 (mΩ)
Max ICC (A)
L (µH)
10
3.6
1
20
1.8
2.2
30
1.2
3.3
50
0.72
4.7
Choose an inductor that does not saturate under
the worst-case load condition.
Selecting the PMID Capacitor (CPMID)
Select the PMID capacitor (CPMID) based on the
demand of the PMID current ripple.
In charge mode, CPMID acts as the input capacitor
of the buck converter. The input current ripple
(IRMS_MAX) can be calculated with Equation (8):
VBATT × (VIN − VBATT )
=
IRMS
ICC _ MAX ×
_ MAX
VIN
(8)
Select the PMID capacitors based on the ripple
current temperature rise not exceeding 10°C.
For best results, use ceramic capacitors with
X5R dielectrics, low ESR, and small temperature
coefficients.
Compensating in the Current-Sense Resistor
The soldering tin has resistance. For a 10mΩ
resistor soldered on the PCB, the total resistance
between resistor pads is about 11mΩ to 12mΩ.
One effective compensation method is to apply
a resistor divider for the CSP/BATT pins (see
Figure 14).
SW
L1
MP2695
RS1
R1
CSP
CBATT
10Ω
BATT
Figure 14: Current-Sense Compensation
After the PCB is assembled, apply a 2A DC
current source between SW and BATT. Measure
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MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
the voltage drop across the current-sense
resistor on its PCB pads, which is VCS. Then R1
can then be calculated with Equation (9):
=
R1
VCS − 2 × RS1
× 10Ω
2 × RS1
(9)
PCB Layout Guidelines
Efficient PCB layout is critical to meet specified
noise, efficiency, and stability requirements. For
the best performance, follow the guidelines
below:
1. Place the PMID capacitor as close as
possible to PMID and PGND.
2. Keep the PMID capacitor’s return trace to the
IC’s PMID and PGND pins as short as
possible.
3. Connect AGND to the ground of the PMID
capacitor.
4. Keep the switching node short.
5. Connect the power pads for VIN, PMID, and
PGND to as many coppers planes on the
board as possible to improve thermal
performance by conducting heat to the PCB.
MP2695 Rev. 1.1
5/21/2021
MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
25
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
TYPICAL APPLICATION CIRCUIT
SMID
CMID
PMID
BST
CBST
USB1
L1
IN
MP2695
CIN
RS1
SW
CBATT
CSP
BATT
RT1
VREFNTC
RT2
NTC
INT
SCL
HOST
VCC
SDA
IB
CVCC
AGND
PGND
Figure 15: Typical Application Circuit for Power Bank
Table 3: Key BOM of Figure 15
Qty
1
1
1
1
1
1
1
MP2695 Rev. 1.1
5/21/2021
Ref
CIN
CMID
CBATT
CVCC
CBST
L1
RS1
Value
1μF
10μF
22μF
2.2μF
470nF
1μH
10mΩ
Description
Ceramic capacitor, 16V, X5R or X7R
Ceramic capacitor, 16V, X5R or X7R
Ceramic capacitor, 10V, X5R or X7R
Ceramic capacitor, 6.3V, X5R or X7R
Ceramic capacitor, 16V, X5R or X7R
Inductor, 1μH, low DCR
Film resistor, 1%
Package
0603
0805
0805
0603
0603
SMD
1206
Manufacturer
Any
Any
Any
Any
Any
Any
Any
MonolithicPower.com
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© 2021 MPS. All Rights Reserved.
26
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
PACKAGE INFORMATION
QFN-21 (3mmx3mm)
MP2695 Rev. 1.1
5/21/2021
MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
27
MP2695 – SW CHARGER WITH I2C CONTROL AND JEITA
REVISION HISTORY
Revision #
1.0
1.1
Revision
Date
04/11/2019
05/21/2021
Description
Pages Updated
Initial Release
Updated Tape & Reel suffix in the Ordering Information section
from “–Z” to “-Z”
Updated the I/O property of the IB, SCL, VRNTC, and BST pins
in the Pin Functions table
Changed the supply voltage range in the Recommended
Operating Conditions section from “4.5V to +11V” to “4V to 11V”
for consistency
Changed IN OVP symbol in the Electrical Characteristics table
from “VIN_OV” to “VIN_OVP” for consistency
Updated graph titles
Added the inductance and DCR information of L1 to the test
conditions in the Typical Performance Characteristics section
Changed “VIN_OV” to “VIN_OVP” for consistency; added
abbreviation for battery voltage (VBATT); updated the ICC default
value in Table 1; updated descriptions for Equation 1 and
Equation 2
Updated the Safety Timer section ; added abbreviation for
interrupt (INT)
Updated description for Equation 3
Updated I2C sections
Updated I2C Register Map section
Updated descriptions for Equations 4 through 9
Updated Package Information
Formatting updates and clerical updates, like changed “currentsensing” to “current-sense”
3
5
6
8
10–11
11–12
14
15
16
16–18
19–23
24–25
27
All
Notice: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP2695 Rev. 1.1
5/21/2021
MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
28
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