MP3312LGC-Z

MP3312L 2.7V-5.5V Input , 38V OVP, Dual-Channel White LED Driver The Future of Analog IC Technology DESCRIPTION FEATURES The MP3312L is a dual-channel, step-up WLED driver with an integrated 40V MOSFET. It supports a 2.7V to 5.5V power supply input and uses peak current mode to regulate the LED current, which is set by an external resistor. • • • • • • • • • • • • The MP3312L employs a 600kHz fixed switching frequency. It supports both PWM input analog dimming and digital analog dimming to regulate the dimming current accurately. The MP3312L integrates a current source to balance the LED current, which leads to good ILED matching and accuracy performance. In addition, the MP3312L has both LED open and short protection, cycle-by-cycle current limit protection, and thermal shutdown protection. It is available in a tiny WLCSP1.35x1.35-9mm package. 2.7V~5.5V Input Voltage 600kHz Switching Frequency Dual Channels Support up to 30mA/String 1% Current Matching between LED Channels +/-2% Current Accuracy 38V OVP PWM Input Analog Dimming Mode 5kHz to100kHz PWM Input Analog Dimming 1-Wire Interface for Digital Dimming 9-Bit Dimming Resolution Internal Soft Start to Reduce Inrush Current Available in WLCSP1.35x1.35-9mm Package APPLICATIONS • • • • Feature Phones and Smart Phones Tablets GPS Receivers 2.5ms shuts down the IC. C2 VIN Power supply input. Connect a ceramic capacitor close to VIN to bypass the IC. C3 SW Drain connection of the internal N-channel power MOSFET. MP3312L Rev. 1.0 8/11/2015 Description Full scale LED current set. Connecting a resistor between ISET and GND sets the full scale current. LED2 current sink. LED1 current sink. PWM signal input. A 5kHz to 100kHz PWM signal is recommended for PWM for analog current dimming. Low logic for >20ms shuts down the IC. Internal error amplifier output . Connect a capacitor to compensate the system. Ground. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 8 MP3312L － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER FUNCTIONAL BLOCK DIAGRAM L1 D1 VOUT VIN C2 C1 SW VIN OVP Shutdown OSC PWM Control EN EN Detection PWM Analog Dimming VREF COMP R2 C3 GND RAMP EA PWM Comparator LED1 Feedback Control Min. Max. Short Protection Current Control LED2 ISET EN R1 Figure 1: Functional Block Diagram MP3312L Rev. 1.0 8/11/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 9 MP3312L － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER OPERATION The MP3312L employs a fixed switching frequency, peak-current-mode control architecture, and two regulated current sinks to power the LED array (see Figure 1). System Start-Up Pulling EN and PWM high enables the IC while pulling EN to GND for >2.5ms (or pulling PWM to GND for >20ms) shuts down the IC. When enabled, the MP3312L checks the topology connection first. Also, the MP3312L checks UVLO and over-temperature protection (OTP). If all the protections pass, the chip starts boosting the step-up converter with an internal soft start. It is recommended that the enable signal occurs after the establishment of the input voltage and PWM dimming signal during the start-up sequence to avoid large inrush current. Switching Operation At the start of each oscillator cycle, the main low-side FET (M1) is turned on through the control circuitry. To prevent sub-harmonic oscillation at a duty cycle greater than 50%, a stabilizing ramp is added to the output of the current sense amplifier; the result is fed into the positive input of the PWM generation comparator. When this voltage equals the output voltage of the error amplifier, the main power FET is turned off. Then the inductor current flows through the free-wheeling diode, which forces the inductor current to decrease. The output voltage of the internal error amplifier is an amplified signal of the difference between the reference voltage and the feedback voltage. The converter chooses the lowest active LEDX pin voltage automatically to provide a high enough bus voltage to power all the LED arrays. If the feedback voltage drops below the reference, the output of the error amplifier increases. This results in more current flowing through the MOSFET, thus increasing the MP3312L Rev. 1.0 8/11/2015 power delivered to the output. This forms a closed loop that regulates the output voltage. Dimming Control The MP3312L supports analog dimming and 1wire digital set dimming mode to regulate the WLED current. For analog dimming, apply a PWM signal to PWM by adjusting the LED current amplitude. The internal filter is integrated, and the PWM signal (5k~100kHz range) is supported. The internal dimming signal duty detection circuit changes the internal reference linearly to regulate the current automatically. In addition, EN supports a 1-wire interface for current dimming control. 1-Wire Interface 1-wire interface is based on a master-slave structure, which is designed for digital dimming. EN is a multipurpose single port that receives LED brightness data. The rate to detect the bit ranges from 1.39kit/sec to 50kBit/sec. The command sent to the chip (slave) contains 24 bits and 9-bit dimming data. Also, an 8-bit device address and RFA bit are included. The chip detects the bit in the series and transmits the LSB first and the MSB last. Refer to Figure 2 and the description of the control bits below: • D0-D8 are the dimming data bits, which achieve a 9-bit dimming resolution. • Bit 9 and bit 11-bit 15 are reserved. Set to 0. • The RFA bit indicates if the master needs to request acknowledgment or not. • The device address byte is DA0-DA7. The device address byte is set to 0x8F. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 10 MP3312L － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER Figure 2: 1-Wire Command Structure The 1-wire interface defines logic 0 and logic 1 by comparing the time between the signal’s low level and high level; 1 cycle means 1 logic bit. The bit detection starts with a falling edge on EN and ends with the next falling edge. Low logic (logic 0): tLOW≥3* tHIGH. High logic (logic 1): tHIGH≥3* tLOW (see Figure 3). EN must distinguish the EN signal and the digital dimming signal when setting up the boost driver. The chip only receives the 1-wire signal when the EN signal matches the 1-wire protocol during the 1ms 1-wire detection window. The 1wire dimming sequence is described below and shown in Figure 4. 1. VIN and PWM are pulled high. 2. The data line is pulled from low to high for tDELAY (1-wire detection delay time, 100µs). This rising edge is the start of the 1-wire detection window. 3. After the 1-wire detection delay time, the data line pulls low for more than tDETECTION (1-wire detection time, 260µs). Then the data line pulls high. Figure 3: 1-Wire Bit Definition 4. The sum of the 1-wire detection delay time and the 1-wire detection time should be less than tWIN (the time of 1-wire detection window, 1ms). Figure 4: 1-Wire Dimming Sequence MP3312L Rev. 1.0 8/11/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 11 MP3312L － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER In addition, before the chip starts to receive each command with the first falling edge, the data line should remain high for tSTART (minimum, 2µs). The transmission of each command is completed with low levels for tEOS (minimum 2µs). See Figure 5. Whether the ACK signal feedback is sent to the master or not is dependent on the RFA bit. If ACK is needed, the master should have an opendrain output, and the data line should be pulled high by the master with a resistor load. Figure 5: Data-Line Timing When RFA = 0 Figure 6: Data-Line Timing When RFA=1 If RFA = 0, there is no ACK signal feedback. After all 24 bits of data are transferred, the data line remains low for a tEOS (minimum 2µs) delay, and then it is pulled to static high (see Figure 5). If RFA = 1, the ACK signal feedback is sent to the master. After all 24 bits of data are transferred, the data line remains low for tACKval (maximum, 2µs), then the data line should be released to output high impedance. After this occurs, the master is ready to detect the ACK signal from the slave. After tACKval, if the ACK signal is “false” (1-wire data is not received successfully), the data line will be pulled high directly. After tACKval, if the ACK signal is “true” (1wire data is received successfully), the data line is pulled low continuously (VACKL (max. 0.4V)) by MP3312L Rev. 1.0 8/11/2015 the slave for tACK (max. 512µs). If the master reads this low logic, it means the chip has received the 1-wire data successfully, and the data line is pulled to static high (see Figure 6). The MP3312L has a 9 bit DAC for digital dimming control; the dimming resolution is 1/511. The default code value of D0 (LSB)-D8(MSB) is “111111111” when the device is first enabled. The LED current is dependent on the internal register value D0-D8 according to Equation (1): ILED = ILEDfull × code 511 (1) ILEDfull is the full scale output current set by RISET to ISET. The code is the DEC value of the resolution bit (D0-D8). www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 12 MP3312L － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER Cycle-by-Cycle Current Limit Protection Short-String Protection The MP3312L provides cycle-by-cycle current limit protection to avoid damage caused by too large of a current rating. During start-up, the current limit is clamped to 1A for around 6ms to avoid output overshoot and inrush current. After start-up, the current limit returns back to a normal 1.8A. The MP3312L monitors the LEDX voltage to detect if the short string has occurred. If one string is short, the respective LEDX pin is pulled up to the boost output and tolerates high voltage stress. If the LEDX voltage is higher than 5V and the LED current is larger than the 8% of the fullscale setting current, the short-string condition is detected. If this condition lasts longer than 8ms, the fault string current source is disabled until VIN and EN are reset for enable. Open-String Protection Open-string protection is achieved by detecting VOUT. If the LED string is open, the feedback voltage is lower than the reference voltage, and thus the COMP rises up and keeps the charge of the output capacitor until VOUT hits the protection point OVP. Then the IC stops switching and shuts down until VIN and EN are reset for enable. Unused LED Channel In some cases, if one LED current channel is not used, LEDX must be connected to the corresponding GND to remove it from the control loop. MP3312L Rev. 1.0 8/11/2015 Thermal Shutdown Protection To prevent the IC from operating at exceedingly high temperatures, thermal shutdown is implemented in this chip by detecting the silicon die temperature. When the die temperature exceeds the upper threshold (150°, typically), the IC shuts down. It resumes normal operation once the die temperature drops below the lower threshold. Typically, the hysteresis value is 25°C. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 13 MP3312L － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER APPLICATION INFORMATION Setting the LED Current The full scale LED current is set through the current-setting resistor on FB using Equation (2). ILED(mA) = VISET (V) * 1020 RISET (kΩ) (2) For VISET = 1.232V and RISET = 63.4kΩ, the LED current is set to 20mA. Please do NOT leave ISET open. Selecting the Input Capacitor The input capacitor reduces the surge current drawn from the input supply and the switching noise from the device. The input capacitor impedance at the switching frequency should be much less than the input source impedance to prevent the high-frequency switching current from passing through to the input. Use ceramic capacitors with X5R or X7R dielectrics for their low ESR and small temperature coefficients. For most applications, a 1µF~4.7μF ceramic capacitor will suffice. Selecting the Inductor The MP3312L requires an inductor to supply a higher output voltage while being driven by the input voltage. A larger value inductor results in less ripple current, resulting in lower peak inductor current, which reduces stress on the internal N-channel MOSFET. However, the larger value inductor has a larger physical size, a higher series resistance, and a lower saturation current. Choose an inductor that does not saturate under the worst-case load conditions. Select the minimum inductor value to ensure that the boost converter works in continuous conduction mode with high efficiency and good EMI performance. Calculate the required inductance value using Equation (3) and Equation (4): η × VOUT × D × (1− D)2 L≥ 2 × fSW × ILOAD D = 1− VIN VOUT (3) (4) Where VIN and VOUT are the input and output voltages, fSW is the switching frequency, ILOAD is the total LED load current, and η is the efficiency. The switching current is used for the peakcurrent-mode control. MP3312L Rev. 1.0 8/11/2015 In order to avoid hitting the current limit, the worst-case inductor peak current should be less than 80% of the current limit (ILIM). Generally, a 4.7µH~10µH inductor will suffice for most applications. Note that the system efficiency is dependent on the DC resistance of the inductor, and a larger DC resistance causes more power loss. Selecting the Output Capacitor The output capacitor keeps the output voltage ripple small and ensures feedback loop stability. The output capacitor impedance must be low at the switching frequency. Ceramic capacitors with X7R dielectrics are recommended for their low ESR characteristics. Please note that ceramic capacitance is also dependent on the voltage rating; DC bias voltage and the value can lose as much as 50% of its capacitance at its rated voltage rating. Please leave a high enough voltage rating margin when selecting the component. However, if the capacitance is too low, it will cause loop instability. For most applications, a 1μF~4.7μF ceramic capacitor will suffice. Selecting the External Schottky Diode To optimize efficiency, a high-speed and lowreverse recovery current Schottky diode is recommended. Make sure the diode’s average and peak current ratings exceed the output average LED current and the peak inductor current. In addition, the diode’s breakdown voltage rating should be larger than the maximum voltage across the diode. Usually, unexpected high-frequency spikes in the voltage can be seen across the diode when the diode turns off. When selecting a diode, always leave a sufficient voltage rating margin to guarantee normal, long-term operation. PCB Layout Guidelines Efficient PCB layout is critical to prevent noise and electromagnetic interference. If the loop of MP3312L’s internal low-side MOSFET, Schottky diode, and output capacitor flows with a high frequency ripple current, it MUST be minimized. The input and output capacitor should be placed as close to the IC as possible. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 14 MP3312L － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER TYPICAL APPLICATION CIRCUITS 10µH 1µF 1µF 330nF 63.4k Figure 7: Typical Application for Dual String 6 LEDs, 20mA/String MP3312L Rev. 1.0 8/11/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 15 MP3312L － 2.7V-5.5V INPUT, 38V OVP, DUAL-CHANNEL WHITE LED DRIVER PACKAGE INFORMATION WLCSP1.35X1.35-9 NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP3312L Rev. 1.0 8/11/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 16