MP3425
3A, 55V Boost Converter with
Programmable Switching Frequency
and UVLO
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP3425 is a current mode step-up
converter with a 3.5A, 90mΩ internal switch to
provide a highly efficient regulator with fast
response. The MP3425 features a programmed
frequency up to 2MHz allowing for easy filtering
and low noise. An external compensation pin
gives the user flexibility in setting loop
dynamics, and operates with small, low-ESR
ceramic output capacitors. Soft-start results in
small inrush current and can be programmed
with an external capacitor. The MP3425
operates from an input voltage as low as 3.1V
and can generate 48V at up to 350mA from a
12V supply.
3.5A, 90mΩ, 55V Power MOSFET
Uses Tiny Capacitors and Inductors
Wide input range: 3.1V to 22V
Output Voltage as High as 55V
Programmable Fsw: 300kHz – 2 MHz
Programmable UVLO, Soft-Start, UVLO
Hysteresis
Micropower shutdown 6V) for automatic startup. EN pin can also be used to program Vin
UVLO. EN cannot be left floating.
VIN Input Supply Pin. IN must be locally bypassed.
Power Switch Output. SW is the drain of the internal MOSFET switch. Connect the
SW
power inductor and output rectifier to SW.
VDD LDO Output
The bottom exposed pad is the power ground. For best thermal resistance, solder the
PGND
exposed pad to underlying copper backplane
AGND Analog Ground. Connect to ground plane through exposed pad.
Soft-Start Control Pin. Connect a soft-start capacitor to this pin. The soft-start capacitor
SS is charged with a constant current of 5μA. Leave SS disconnected if the soft-start is not
used.
FB Feedback Input. Reference voltage is 1.225V. Connect a resistor divider this pin.
Frequency Programming Pin. Connect a resistor from this pin to AGND. FSET pin
FSET voltage is internally regulated to 0.5V. The current flowing out of this pin linearly sets the
operation frequency.
Exposed Pad. The bottom exposed pad is the power ground. For best thermal
EP
resistance, solder the exposed pad to underlying cooper backplane.
COMP
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MP3425- 3A, 55V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO
TYPICAL PERFORMANCE CHARACTERISTICS
VIN=12V, VOUT=48V, L=33μH, COUT=4.7μF, fSW=300kHz, TA=+25C, unless otherwise noted.
MP3425 Rev.1.1
4/29/2016
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MP3425- 3A, 55V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN=12V, VOUT=48V, L=33μH, COUT=4.7μF, fSW=300kHz, TA=+25C, unless otherwise noted.
MP3425 Rev.1.1
4/29/2016
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© 2016 MPS. All Rights Reserved.
6
MP3425- 3A, 55V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN=12V, VOUT=48V, L=33μH, COUT=4.7μF, fSW=300kHz, TA=+25C, unless otherwise noted.
MP3425 Rev.1.1
4/29/2016
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MP3425- 3A, 55V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO
BLOCK DIAGRAM
IN
EN
FSET
INTERNAL REGULATOR
AND ENABLE CIRCUITRY
OSCILLATOR
SW
+
--
PWM
CONTROL
LOGIC
CURRENT
SENSE
AMP
+
---
GND
FB
GM
SS
+
1.225V
COMP
Figure 1—Function Block Diagram
MP3425 Rev.1.1
4/29/2016
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MP3425- 3A, 55V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO
APPLICATION INFORMATION
P
O
T
R
the
A
4
apply to
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y
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Components referenced below
“Typical Application Circuit”.
Theory of Operation
The MP3425 uses a constant frequency, peak
current mode boost regulation architecture to
regulate the feedback voltage. The operation of
the MP3425 can be understood by referring to
the block diagram of Functional.
At the beginning of each cycle, the N-Channel
MOSFET switch is turned on, forcing the inductor
current to rise. The current at the source of the
switch is internally measured and converted to a
voltage by the current sense amplifier. That
voltage is compared to the error voltage at comp.
The voltage at the output of the error amplifier is
an amplified version of the difference between
the 1.225V reference voltage and the feedback
voltage.
When theses two voltages are equal, the PWM
comparator turns off the switch forcing the
inductor current to the output capacitor through
the external rectifier. This causes the inductor
current to decrease. The peak inductor current is
controlled by the voltage at COMP, which in turn
is controlled by the output voltage. Thus the
output voltage is regulated by the inductor
current to satisfy the load. The use of current
mode regulation improves the transient response
and control loop stability.
Selecting the Switching Frequency
The switching frequency is set by R5. The
equation is:
FSET 23 R5 0.86
Where R5 is in kΩ, FSET is in MHz.
UVLO Hysteresis
The MP3425 features a programmable UVLO
hysteresis. Upon power up a 4µA current sink is
applied to the resistor divider attached to the EN
pin. This means that on power up VIN must
increase by an extra amount to overcome the
current sink. That extra amount is the current
sink times the resistor from VIN to EN. Once the
EN pin reaches about 1.5V the current sink will
turn off to create the reverse hysteresis for VIN
falling:
MP3425 Rev.1.1
4/29/2016
Table1—Frequency Selection
R5 (kΩ)
Freq (MHz)
180
0.26
160
0.29
150
0.31
143
0.32
66.5
0.62
35.7
1.06
25
1.44
18
1.91
16
2.12
14
2.37
Selecting the Soft-Start Capacitor
The MP3425 includes a soft-start timer that limits
the voltage at COMP during startup to prevent
excessive current at the input. This prevents
premature termination of the source voltage at
startup due to input current overshoot. When
power is applied to the MP3425, and enable is
asserted, a 5µA internal current source charges
the external capacitor at SS. As the SS capacitor
is charged, the voltage at SS rises. When the SS
voltage reaches 250mV, the MP3425 starts
switching at ¼ of the programmed frequency
(frequency fold back mode). At 800mV the
switching frequency becomes the programmed
value. The soft-start ends when the voltage at SS
reaches 2.5V. This limits the inductor current at
start-up, forcing the input current to rise slowly to
the current required to regulate the output
voltage.
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MP3425- 3A, 55V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO
The soft-start period is determined by the
equation:
C 109 2.5V
t SS SS
5A
Where CSS (nF) is the soft-start capacitor from
SS to GND, and tSS is the soft-start period.
Setting the Output Voltage
This is the actual output voltage. It is fed back
through two sense resistors in series. The
feedback voltage is 1.225V typical. The equation
to the output voltage is:
VOUT VREF (1
R2
)
R3
Where:
R2 is the top feedback resistor
R3 in the bottom feedback resistor
VREF is the reference voltage (1.225V typical)
Choose the feedback resistors to be in the 10k or
higher range for good efficiency.
Selecting the Input Capacitor
An input capacitor is required to supply the AC
ripple current to the inductor, while limiting noise
at the input source. A low ESR capacitor is
required to keep the noise at the IC to a
minimum. Ceramic capacitors are preferred, but
tantalum or low-ESR electrolytic capacitors may
also suffice.
Use an input capacitor value greater than 4.7µF.
The capacitor can be electrolytic, tantalum or
ceramic. However since it absorbs the input
switching current it requires an adequate ripple
current rating. Use a capacitor with a RMS
current rating greater than the inductor ripple
current (see “Selecting The Inductor” to
determine the inductor ripple current).
To insure stable operation place the input
capacitor as close to the IC as possible.
Alternately a smaller high quality ceramic 0.1 µF
capacitor may be placed closer to the IC with the
larger capacitor placed further away. If using this
technique, it is recommended that the larger
capacitor be a tantalum or electrolytic type. All
ceramic capacitors should be placed close to the
MP3425.
MP3425 Rev.1.1
4/29/2016
Selecting the Output Capacitor
The output capacitor is required to maintain the
DC output voltage. Low ESR capacitors are
preferred to keep the output voltage ripple to a
minimum. The characteristic of the output
capacitor also affects the stability of the
regulation control system. Ceramic, tantalum, or
low
ESR
electrolytic
capacitors
are
recommended. In the case of ceramic capacitors,
the impedance of the capacitor at the switching
frequency is dominated by the capacitance, and
so the output voltage ripple is mostly
independent of the ESR. The output voltage
ripple is estimated to be:
VIN
) ILOAD
VOUT
COUT FSW
(1
VRIPPLE
Where Vripple is the output ripple voltage, Vin
and Vout are the DC input and output voltages
respectively, Iload is the load current, Fsw is the
switching frequency, and COUT is the capacitance
of the output capacitor.
In the case of tantalum or low-ESR electrolytic
capacitors, the ESR dominates the impedance at
the switching frequency, and so the output ripple
is calculated as:
VIN
) ILOAD
VOUT
I
RESR VOUT
LOAD
COUT FSW
VIN
(1
VRIPPLE
Where RESR is the equivalent series resistance of
the output capacitors.
Choose an output capacitor to satisfy the output
ripple and load transient requirements of the
design. A 4.7µF – 22µF ceramic capacitor is
suitable for most applications.
Selecting the Inductor
The inductor is required to force the higher output
voltage while being driven by the input voltage. A
larger value inductor results in less ripple current
that results in lower peak inductor current,
reducing stress on the internal N-Channel switch.
However, the larger value inductor has a larger
physical size, higher series resistance, and/or
lower saturations current.
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MP3425- 3A, 55V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO
A good rule of thumb is to allow the peak-to-peak
ripple current to be approximately 30-50% of the
maximum input current. Make sure that the peak
inductor current is below 75% of the current limit
at the operating duty cycle to prevent loss of
regulation due to the current limit. Also make
sure that the inductor does not saturate under the
worst-case load transient and startup conditions.
Calculate the required inductance value by the
equation:
L
VIN (VOUT VIN )
VOUT FSW I
IIN(max)
VOUT ILOAD(MAX)
VIN
Where :
ILOAD(max) is the maximum load current
∆I is the peak-to-peak inductor ripple current
∆I = (30% - 50%) x IIN (MAX)
ŋ is efficiency.
Selecting the Diode
The output rectifier diode supplies current to the
inductor when the internal MOSFET is off. To
reduce losses due to diode forward voltage and
recovery time, use a Schottky diode with the
MP3425. The diode should be treated for a
reverse voltage equal to or greater than the
output voltage used. The average current rating
must be greater than the maximum load current
expected, and the peak current rating must be
greater than the peak inductor current.
Compensation
The output of the transconductance error
amplifier (COMP) is used to compensate the
regulation control system. The system uses two
poles and one zero to stabilize the control loop.
The poles are FP1 set by the output capacitor
COUT and the load resistance, and fP2 start from
origin, the zero fz1 set by the compensation
capacitor CCOMP and the compensation resistor
RCOMP. These are determined by the equations:
MP3425 Rev.1.1
4/29/2016
1
FP1
(Hz)
2 RLOAD COUT
GEA
(Hz)
FP2
2 A VEA CCOMP
FZ1
1
2 RCOMP CCOMP
(Hz)
Where RLOAD is the load resistance, GEA is the
error amplifier transconductance, and AVEA is the
error amplifier voltage gain.
The DC loop gain is
A VDC
A VEA VIN RLOAD VFB GCS
(V/V)
0.5 VOUT 2
Where GCS is the compensation voltage to
inductor current gain, and the VFB is the feedback
regulation threshold.
There is also a right-half-plane zero (FRHPZ) that
exists in continuous conduction mode (inductor
current does not drop to zero on each cycle)
step-up converters. The frequency of the right
half plane zero is:
FRHP
RLOAD
V
( IN )2 (Hz)
2 L VOUT
The “Component Selection” table lists generally
recommended compensation components for
different input voltages, output voltages and
capacitances of most frequently used output
ceramic capacitors. Ceramic capacitors have
extremely low ESR, therefore the second
compensation capacitor (from COMP to GND) is
not required.
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MP3425- 3A, 55V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO
Table 2—Component Selection
VIN (V)
VOUT (V)
COUT (µF)
Rcomp (kΩ)
Ccomp (nF)
Switching Frequency
(kHz)
Inductor (µH)
3
3
3
5
5
5
5
5
12
12
12
12
12
12
12
12
12
12
12
18
18
18
24
24
24
48
48
48
4.7
10
22
10
22
4.7
10
22
4.7
10
22
4.7
10
22
10
15
30
12
25
12
25
50
10
20
40
30
60
60
6.8
6.8
6.8
4.9
4.9
4.9
4.9
4.9
6.8
6.8
6.8
4.7
4.7
10
600
600
600
600
600
600
600
600
600
600
600
600
600
600
8.2
8.2
8.2
6.8
6.8
10
10
10
10
10
10
33
33
33
For faster control loop and better transient
response, set the capacitor C7 to the
recommended value in the table. Then slowly
increase the resistor R6 and check the load step
response on a bench to make sure the ringing
and overshoot on the output voltage at the edge
of the load steps is minimal. Finally, the
compensation needs to be checked by
calculating the DC loop gain and the crossover
frequency. The crossover frequency where the
loop gain drops to 0dB (a gain of 1) can be
obtained visually by placing a -20dB/decade
slope at each pole, and a +20dB/decade slope at
each zero. The crossover frequency should be at
least one decade below the frequency of the
right-half-plane zero at maximum output load
current to obtain high enough phase margin for
stability.
MP3425 Rev.1.1
4/29/2016
Layout Considerations
High frequency switching regulators require very
careful layout for stable operation and low noise.
All components must be placed as close to the IC
as possible. Keep the path between L1, D1, and
COUT extremely short for minimal noise and
ringing. CIN must be placed close to the IN pin for
best decoupling. All feedback components must
be kept close to the FB pin to prevent noise
injection on the FB pin trace. The ground return
of CIN and COUT should be tied close to the GND
pin. See the MP3425 demo board layout for
reference.
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12
MP3425- 3A, 55V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO
PACKAGE INFORMATION
QFN-14 (3mmx4mm)
2.90
3.10
1.60
1.80
0.30
0.50
PIN 1 ID
MARKING
PIN 1 ID
SEE DETAIL A
1
14
0.18
0.30
3.90
4.10
PIN 1 ID
INDEX AREA
3.20
3.40
0.50
BSC
7
8
TOP VIEW
BOTTOM VIEW
0.80
1.00
0.20 REF
PIN 1 ID OPTION A
0.30x45º TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.00
0.05
SIDE VIEW
DETAIL A
2.90
0.70
NOTE:
1.70
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE0.10 MILLIMETER MAX.
4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION VEED-5.
5) DRAWING IS NOT TO SCALE.
0.25
3.30
0.50
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP3425 Rev.1.1
4/29/2016
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© 2016 MPS. All Rights Reserved.
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