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MP3431GL-Z

MP3431GL-Z

  • 厂商:

    MPS(美国芯源)

  • 封装:

    QFN13_3X4MM

  • 描述:

    MP3431GL-Z

  • 数据手册
  • 价格&库存
MP3431GL-Z 数据手册
MP3431 21A, High-Efficiency, Fully Integrated, Synchronous, Boost Converter with Programmable Input Current Limit DESCRIPTION FEATURES The MP3431 is a 600kHz, fixed-frequency, wide input range, highly integrated, boost converter. The MP3431 starts from an input voltage as low as 2.7V and supports up to 30W of load power from a 1-cell battery with integrated low RDS(ON) power MOSFETs.        The MP3431 adopts constant-off-time (COT) control topology, which provides fast transient response. MODE supports the selection of pulse-skip mode (PSM), forced continuous conduction mode (FCCM), and ultrasonic mode (USM) in light-load condition. The programmable input current limit provides accurate overload protection. The low-side MOSFET limits the cycle-by-cycle inductor peak current, and the high-side MOSFET eliminates the need for an external Schottky diode.         Full protection features include programmable input under-voltage lockout (UVLO) and overtemperature protection (OTP). The MP3431 is available (3mmx4mm) package. in a 2.7V to 13V Start-Up Voltage 0.8V to 13V Operation Voltage Up to 16V Output Voltage Supports 30W Average Power Load and 40W Peak Power Load from 3.3V Programmable Input Current Limit 21.5A Internal Switch Current Limit Integrated 6.5mΩ and 10mΩ Power MOSFET >95% Efficiency for 3.6V VIN to 9V/3A Selectable PSM, >23kHz USM, and FCCM in Light-Load Condition 600kHz Fixed Switching Frequency Adaptive COT for Fast Transient Response External Soft Start and Compensation Pins Programmable UVLO and Hysteresis 150°C Over-Temperature Protection (OTP) Available in a QFN-13 (3mmx4mm) Package APPLICATIONS QFN-13     Notebooks Bluetooth Speakers Portable POS Systems Quick Charger Power Banks All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION Efficiency vs. Load Current L1 1.5μH C5 0.1μF SW C1 22μFX3 BST VIN On / off EN R1 750kΩ MODE High/ Middle/ Low MP3431 R2 93.1kΩ R4 C6 6.8nF ILIM SS C4 22nF FB COMP VDD C3 4.7μF V OUT 9V VOUT 1kΩ AGND PGND C7 4.7nF R5 22kΩ R3 6.8kΩ C2 22μFx3 Efficiency(%) VIN 100 95 90 85 80 75 70 65 60 55 50 PSM Vin=3V Vin=3.3V Vin=3.6V Vin=4.2V 1 MP3431 Rev. 1.0 6/8/2017 10 100 Load Current(mA) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 1000 1 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT ORDERING INFORMATION Part Number* MP3431GL Package QFN-13 (3mmx4mm) Top Marking See Below *For Tape & Reel, add suffix –Z (e.g. MP3431GL–Z) TOP MARKING MP: MPS prefix Y: Year code W: Week code 3431: First four digits of the part number LLL: Lot number PACKAGE REFERENCE TOP VIEW SW BST VIN EN MODE ILIM 13 12 11 10 9 8 VOUT 7 PGND 1 2 3 4 5 6 VDD SS COMP FB AGND QFN-13 (3mmx4mm) MP3431 Rev. 1.0 6/8/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 2 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT θJA θJC ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance SW ................................ -0.3V (-3.5V for 3V and VIN = 3V. MP3431 Rev. 1.0 6/8/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 6 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT TYPICAL CHARACTERISTICS (continued) VIN = VEN = 3.3V, VOUT = 9V, L = 1.5μH, TA = 25°C, unless otherwise noted. Input Current Limit vs. Junction Temperature R ILIM=22kΩ 25 14 Switching Current Limit(A) Input Current limit(A) 13.5 13 12.5 12 11.5 11 10.5 10 Switching Current Limit vs. Junction Temperature 23 21 19 17 15 -50 0 50 100 150 Junction Temperature(℃) -50 0 50 100 Junction Temperature(℃) 150 VIN Rising Threshold vs. Junction Temperature VDD UVLO vs. Junction Temperature 0.8 2.6 0.75 VIN Rising Threshold(V) VDD UVLO(V) VDD Bi a s=3.3V 2.8 2.4 2.2 2 1.8 Rising Falling 1.6 1.4 0.7 0.65 0.6 0.55 0.5 -50 0 50 100 Junction Temperature(℃) 150 -50 EN Threshold vs. Junction Temperature 1.3 1010 1.25 1005 Reference Voltage(mV) EN Threshold(V) IC startup switching 1.2 1.15 1.1 1.05 0 50 100 Junction Temperature(℃) 150 Reference Voltage vs. Junction Temperature 1000 995 990 985 980 1 -50 MP3431 Rev. 1.0 6/8/2017 0 50 100 Junction Temperature(℃) 150 -50 0 50 100 Junction Temperature(℃) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 150 7 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT TYPICAL CHARACTERISTICS (continued) VIN = VEN = 3.3V, VOUT = 9V, L = 1.5μH, TA = 25°C, unless otherwise noted. Switching Frequency(kHz) 660 Switching Frequency vs. Junction Temperature 640 620 600 580 560 540 520 500 -50 MP3431 Rev. 1.0 6/8/2017 0 50 100 Junction Temperature(℃) 150 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 8 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT TYPICAL PERFORMANCE CHARACTERISTICS VIN = 3.3V, VOUT = 9V, L = 1.5μH, IOUT = 3.5A, USM , TA = 25°C, unless otherwise noted. Efficiency vs. Load Current PSM 100 95 90 85 80 75 70 65 60 55 50 USM 100 90 Vin=3V Vin=3.3V Vin=3.6V Vin=4.2V Efficiency(%) Efficiency(%) Efficiency vs. Load Current 80 70 60 Vin=3V Vin=3.3V Vin=3.6V Vin=4.2V 50 40 30 1 10 100 Load Current(mA) 1 1000 90 90 80 80 70 60 Vin=2.7V Vin=3.3V 40 70 60 Vin=4.2V Vin=6.6V Vin=8.4V 30 1 10 100 Load Current(mA) 1000 1 10000 10 100 1000 Load Current(mA) 10000 Efficiency vs. Load Current Efficiency vs. Load Current PSM, VOUT=15V 100 USM, VOUT=15V 90 Efficiency(%) 95 Efficiency(%) Vin=4.2V 50 40 30 100 10000 USM, VOUT=12V 100 Efficiency(%) Efficiency(%) USM, VOUT=5V 50 100 1000 Load Current(mA) Efficiency vs. Load Current Efficiency vs. Load Current 100 10 90 85 80 Vin=6V 70 60 Vin=4.2V Vin=6.6V Vin=8.4V 50 Vin=6.6V 75 80 40 Vin=8.4V 30 70 1 MP3431 Rev. 1.0 6/8/2017 10 100 1000 Load Current(mA) 10000 1 10 100 1000 Load Current(mA) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 10000 9 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 3.3V, VOUT = 9V, L = 1.5μH, IOUT = 3.5A, USM, TA = 25°C, unless otherwise noted. 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 Load Regulation PSM Regulation(%) Regulation(%) Load Regulation Vin=3V Vin=3.3V Vin=3.6V Vin=4.2V 1 10 100 Load Current(mA) USM 0.5 0.4 0.3 0.2 0.1 0.0 -0.1 -0.2 -0.3 -0.4 -0.5 Vin=3V Vin=3.3V Vin=3.6V Vin=4.2V 1000 1 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 Vin=6V Vin=6.6V Vin=8.4V 1 10 10000 100 1000 Load Current(mA) PSM 0.5 0.4 0.3 0.2 0.1 0 -0.1 -0.2 -0.3 -0.4 -0.5 Iout=0A Iout=1.75A Iout=3.5A 2 10000 Line Regulation 1.0 100 1000 Load Current(mA) Line Regulation PSM, VOUT=15V Regulation(%) Regulation(%) Load Regulation 10 3 4 5 6 7 Input voltage(V) 8 9 Bode Plot USM 60 0.8 I OUT=3.5A 180 40 120 20 60 0 0 Iout=0A 0.2 Iout=1.75A 0.0 Iout=3.5A -20 -0.2 -40 -0.4 -0.6 2 MP3431 Rev. 1.0 6/8/2017 3 4 5 6 Input Voltage(V) 7 8 9 -60 1000 -60 Gain Phase 10000 100000 Frequency(Hz) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. Phase(deg) 0.4 Gain(dB) Regulation(%) 0.6 -120 -180 1000000 10 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 3.3V, VOUT = 9V, L = 1.5μH, IOUT = 3.5A, USM, TA = 25°C, unless otherwise noted. Case Temperature Rising Case Temperature Rising(℃) 80 Vin=3V Vin=3.3V Vin=3.6V Vin=4.2V 70 60 50 40 30 20 10 0 0 MP3431 Rev. 1.0 6/8/2017 0.5 1 1.5 2 2.5 Load Current(A) 3 3.5 4 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 11 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 3.3V, VOUT = 9V, L = 1.5μH, IOUT = 3.5A, USM, TA = 25°C, unless otherwise noted. Steady State Steady State IOUT = 0A, USM IOUT = 0A, PSM CH1: CH1: VOUT/AC VOUT/AC 10mV/div. 20mV/div. CH2: VIN 2V/div. CH2: VIN 2V/div. CH3: VSW 5V/div. CH3: VSW 5V/div. CH4: IL 500mA/div. CH4: IL 2A/div. 10µs/div. 4ms/div. Steady State Steady State IOUT = 0A, FCCM IOUT = 3.5A CH1: CH1: VOUT/AC VOUT/AC 10mV/div. 100mV/div. CH2: VIN 2V/div. CH2: VIN 2V/div. CH3: VSW 5V/div. CH3: VSW 5V/div. CH4: IL 2A/div. CH4: IL 10A/div.. 1µs/div. 2µs/div. VIN Start-Up VIN Start-Up IOUT = 0A IOUT = 3.5A CH1: VOUT CH1: VOUT 5V/div. 5V/div. CH2: VIN 2V/div. CH2: VIN 2V/div. CH3: VSW 5V/div. CH3: VSW 5V/div. CH4: IL 2A/div. CH4: IL 10A/div. 4ms/div. MP3431 Rev. 1.0 6/8/2017 4ms/div. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 12 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 3.3V, VOUT = 9V, L = 1.5μH, IOUT = 3.5A, USM, TA = 25°C, unless otherwise noted. VIN Shutdown VIN Shutdown IOUT = 0A IOUT = 3.5A CH1: VOUT CH1: VOUT 5V/div. 5V/div. CH2: VIN 2V/div. CH2: VIN 2V/div. CH3: VSW 5V/div. CH3: VSW 5V/div. CH4: IL 1A/div. CH4: IL 10A/div. 1s/div. 10ms/div. EN Start-Up EN Start-Up IOUT = 0A IOUT = 3.5A CH1: VOUT CH1: VOUT 5V/div. 5V/div. CH2: VEN CH2: VEN 2V/div. 2V/div. CH3: VSW 5V/div. CH3: VSW 5V/div. CH4: IL 2A/div. CH4: IL 10A/div. 2ms/div. 2ms/div. EN Shutdown EN Shutdown IOUT = 0A IOUT = 3.5A CH1: VOUT CH1: VOUT 5V/div. 5V/div. CH2: VEN CH2: VEN 2V/div. 2V/div. CH3: VSW 5V/div. CH3: VSW 5V/div. CH4: IL 2A/div. CH4: IL 10A/div. 1s/div. MP3431 Rev. 1.0 6/8/2017 400µs/div. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 13 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 3.3V, VOUT = 9V, L = 1.5μH, IOUT = 3.5A, USM, TA = 25°C, unless otherwise noted. Load Transient Load Transient IOUT = 0 - 1.75A, IRAMP = 25mA/µs, USM IOUT = 3.5 - 1.75A, IRAMP = 25mA/µs CH1: CH1: VOUT/AC VOUT/AC 500mV/div. 500mV/div. CH4: IOUT 2A/div. CH4: IOUT 2A/div. 400µs/div. 400µs/div. Load Transient Load Transient IOUT = 0 - 1.75A, IRAMP = 25mA/µs, PSM IOUT = 0 - 1.75A, IRAMP = 25mA/µs, FCCM CH1: CH1: VOUT/AC VOUT/AC 500mV/div. 500mV/div. CH4: ILOAD 2A/div. CH4: ILOAD 2A/div. 400µs/div. 400µs/div. Over-Current Entry Over-Current Recovery Increase output current slowly Decrease output current slowly CH1: VOUT CH1: VOUT 5V/div. 5V/div. CH4: IOUT 5A/div. CH4: IOUT 5A/div. CH2: IIN CH2: IIN 10A/div. 10A/div. CH3: VSW 5V/div. CH3: VSW 5V/div. 200ms/div. MP3431 Rev. 1.0 6/8/2017 200ms/div. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 14 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT PIN FUNCTIONS Pin # Name 1 SW 2 VDD 3 SS 4 COMP 5 6 FB AGND 7 PGND 8 VOUT 9 ILIM 10 MODE 11 EN 12 VIN 13 BST MP3431 Rev. 1.0 6/8/2017 Description Converter switch. SW is connected to the drain of the internal low-side power MOSFET and the source of the internal high-side synchronous power MOSFET. Connect the power inductor to SW. Internal bias supply. Decouple VDD with a 4.7μF ceramic capacitor placed as close to VDD as possible. When VIN is higher than 3.4V, VDD is powered by VIN. Otherwise, VDD is powered by the higher voltage of either VIN or VOUT. If the bias voltage connected to VDD is higher 3.4V, the regulator from VIN and VOUT is disabled. The VDD regulator starts working when VIN is higher than about 0.9V if EN is high. Supply VIN with a power source higher than 2.7V during VIN start-up to provide enough VDD power voltage. Soft-start programming. Place a capacitor from SS to AGND to set the VOUT rising slew rate. Internal error amplifier output. Connect a capacitor and resistor in series from COMP to AGND for loop compensation. Feedback input. Connect a resistor divider from VOUT to FB. Analog ground. Power ground. Output. VOUT is connected to the drain of the high-side MOSFET. VOUT powers VDD when VOUT is higher than VIN and VIN is lower than 3.4V. Input current limit setting. A resistor in parallel with a capacitor is used to set the input current limit. Place a 1kΩ resistor in series with ILIM to avoid noise injection. If the input current limit function is not used, connect ILIM to AGND. MODE selection. If MODE is floating, the MP3431 works in ultrasonic mode (USM). If MODE is high, the MP3431 works in forced continuous conduction mode (FCCM). If MODE is low, the MP3431 works in pulse-skip mode (PSM). MODE must always be higher than 0.2V in the application, even if in PSM. Place a 130kΩ + 20kΩ resistor divider from VDD to MODE to set the MP3431 in PSM. Chip enable control. When not in use, connect EN to VIN for automatic start-up. EN can program the VIN UVLO. Do not leave EN floating. Input supply. VIN must be bypassed locally. Supply VIN with power source higher than 2.7V during VIN start-up to provide enough VDD power voltage. Bootstrap. A capacitor between BST and SW powers the synchronous HS-FET. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 15 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT BLOCK DIAGRAM L1 C1 VIN EN Regulator and UVLO Enable Circuit VDD BST VOUT VDD C5 SW BST Circuit VOUT Q2 C2 C3 MODE SW VIN Off Time Control Logic Q1 Input Current SS C4 VDD VOUT VREF FB R2 C7 GM R5 PGND Current Sense Amplifier COMP AGND Buffer C6 R4 PWM Comparator Current Limit R1 ILIM Amplifier 0.98V R3 Figure 1: Functional Block Diagram MP3431 Rev. 1.0 6/8/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 16 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT OPERATION The MP3431 is a 600kHz, fixed-frequency, highefficiency, wide input range, boost converter. Its fully integrated low RDS(ON) MOSFETs provide small size and high efficiency for high-power step-up applications. Constant-off-time (COT) control provides fast transient response, while MODE selection provides flexible light-load performance design. Boost Operation The MP3431 uses COT control to regulate the output voltage. At the beginning of each cycle, the low-side N-channel MOSFET (LS-FET) Q1 is turned on, forcing the inductor current to rise. The current through the LS-FET is sensed. If the current signal rises above the COMP voltage (VCOMP), which is an amplifier output comparing the feedback voltage (VFB) against the internal reference voltage, the pulse-width modulation (PWM) comparator flips and turns the LS-FET off. Then the inductor current flows to the output capacitor through the high-side switch MOSFET (HS-FET), causing the inductor current to decrease. After a fixed off time, the LS-FET turns on again and the cycle repeats. In each cycle, the LS-FET off-time is determined by the VIN/VOUT ratio, and the on time is controlled by VCOMP, so the inductor peak current is controlled by COMP, which itself is controlled by the output voltage. Therefore, the inductor current regulates the output voltage. Operation Mode The MP3431 works with a 600kHz quasiconstant frequency with PWM control in heavyload condition. When the load current decreases, the MP3431 can work in forced continuous conduction mode (FCCM), pulseskip mode (PSM), or ultrasonic mode (USM) based on the MODE setting. Forced Continuous Conduction Mode (FCCM) The MP3431 works in a fixed-frequency PWM mode for any load condition if MODE is high (>1.6V). In this condition, the off time is determined by the internal circuit to achieve the 600kHz frequency based on the VIN/VOUT ratio. When the load decreases, the average input current drops, and the inductor current from VOUT to VIN may become negative during the MP3431 Rev. 1.0 6/8/2017 off-time (LS-FET is off and HS-FET is on). This forces the inductor current to work in continuous conduction mode (FCCM) with a fixed frequency, producing a lower VOUT ripple than in PSM. Pulse-Skip Mode (PSM) The MP3431 works in PSM in light-load condition if the MODE voltage is low (0.2V < VMODE < 0.7V). In this condition, once the inductor current drops to 0A, the HS-FET turns off to stop current flowing from VOUT to VIN, forcing the inductor current to work in discontinuous conduction mode (DCM). At the same time, the internal off time becomes longer once the MP3431 enters DCM. The off time is inversely proportional to the HS-FET on period in each cycle. In deep DCM conditions, the MP3431 slows down the switching frequency and saves power loss. If VCOMP drops to the 0.5V PSM threshold, the MP3431 stops switching to decrease the switching power loss further. Switching resumes once VCOMP rises above 0.5V. The switching pulse skips based on VCOMP in very light-load conditions. PSM has much higher efficiency than FCCM in light load, but the VOUT ripple may be higher, and the frequency may go down and produce audible noise. It DCM, frequency is low, and the LS-FET will not turn on in the prolonged off time. If the load increases and COMP runs higher, the off time shortens and the MP3431 returns to the 600kHz fixed-frequency regularly, so the loop can response to high load current. Ultrasonic Mode (USM) To prevent audible noise with a switching frequency lower than 20kHz in PSM, the MP3431 implements USM by floating MODE or setting MODE in the USM range (0.9V < VMODE < 1.2V). In USM, the inductor current works in DCM, and the frequency stretches as if in PSM when the load decreases to a moderate level. However, the switching does not stop when COMP drops to the 0.5V PSM threshold. The LS-FET on time is controlled by COMP, even if VCOMP is lower than the PSM threshold, unless it triggers the minimum on time. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 17 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT The MP3431 continues decreasing the switching frequency if the load is still decreasing. Once the MP3431 detects that the LS-FET is off for 30µs, it forces the LS-FET on. This limits the frequency, avoiding audible frequency in lightload or no-load condition. USM may convert more energy to the output than the required load due to the minimum 23kHz frequency, which causes VOUT to rise above the normal voltage setting. When VOUT rises and VCOMP drops, the inductor peak current may drop as well. If VCOMP drops below one internal clamped level, the HS-FET zero-current detection (ZCD) threshold is regulated to one negative level gradually, so the energy in the inductor can flow back to VIN in each cycle. This keeps the output at the setting voltage with a >23kHz frequency. The MP3431 also works with a 600kHz frequency if VCOMP rises again. USM has the same efficiency as in PSM if the frequency is higher than the typical 33kHz. USM has more power loss than PSM if the frequency is clamped at the typical 33kHz, but USM does not introduce audible noise caused by the group pulse in PSM. Minimum On Time and Minimum Off Time The MP3431 blanks the LS-FET on-state with 80ns in each cycle to enhance noise immunity. This 80ns minimum on time restricts applications with a high VIN/VOUT ratio. The MP3431 also blanks the LS-FET off state with a minimum off time in each cycle. During the minimum off time, the LS-FET cannot turn on, and the minimum off time is short enough to convert the 0.8V input to a 16V output. LS-FET and HS-FET Maximum On Time If the inductor current cannot trigger VCOMP with an on time of 7.5µs, the MP3431 shuts down the LS-FET. After the LS-FET is shut down, the inductor current goes through the HS-FET and charges VOUT in the off time period. This helps refresh VOUT with a minimum frequency of about 133kHz in heavy-load transient conditions. During CCM condition, the HS-FET on time is limited below 8µs. This helps limit the maximum LS-FET off time when VOUT is close to VIN in USM. In USM or heavy-load PSM, if VIN is too close to VOUT, the HS-FET may be turned off by the 8µs HS-FET maximum on time because the MP3431 Rev. 1.0 6/8/2017 inductor current cannot ramp down within this 8µs limit. After the HS-FET turns off, the LS-FET turns on immediately with one pulse control by VCOMP, and the HS-FET turns on again. This makes the LS-FET work in a quasi-constant minimum duty cycle. If VIN is high enough, VOUT is higher than the setting voltage with this duty cycle ratio. In PSM and light load, the IC works with normal PSM logic. The IC stops working when VOUT is higher than the setting voltage and resumes switching when VOUT drops below the setting voltage. VDD Power The MP3431 internal circuit is powered by VDD. A ceramic capacitor no less than 4.7μF is required on VDD. When VIN is lower than 3.4V, VDD is powered from the higher value of either VIN or VOUT. This allows the MP3431 to maintain a low RDS(ON) and high efficiency, even with a low input voltage. When VIN is higher than 3.4V, VDD is always powered by VIN. This decreases the VOUT to VDD regulator loss because VOUT is always higher than VIN. If VDD is powered by an external supply and the voltage is higher than 3.4V, the regulators from VIN and VOUT are disabled. In this condition, the MP3431 starts once the external VDD power supply is higher than VDDUVLO, even if VIN is as low as 0.9V. When VDD is powered by the external power supply, the MP3431 continues working, even if both VIN and VOUT are dropping but are higher than 0.8V. The external VDD power source should be limited within 3.6V. There is a reverse-blocking circuit to limit the current flowing between VIN and VOUT. If the external VDD power is higher than the VDD regulation voltage, the current is supplied from the external power, and there is no path for the current from VDD to VIN or from VDD to VOUT. VDD is charged when VIN is higher than about 0.9V and EN is higher than the micro-power threshold. If EN is low, VDD is disconnected from VIN and VOUT. Supply VIN with a power source higher than 2.7V during VIN start-up to provide enough VDD power voltage. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 18 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT Start-Up When the MP3431 input is powered, it starts charging VDD from VIN. Once VDD rises above its UVLO threshold and EN is high, the MP3431 starts switching with closed loop control. If VDD is powered by an additional supply, the MP3431 start switching once VDD rises to above its under-voltage lockout (UVLO) threshold. After the IC is enabled, the MP3431 starts up with a soft-start (SS) control. The SS signal is controlled by charging SS from 0V and compared with the internal reference voltage. The lower value is fed to the error amplifier to control the output voltage. After the SS signal rises above the reference voltage, soft start is completed, and the internal reference takes charge of the feedback loop regulation. If there is some bias voltage on VOUT during PSM, the MP3431 stops switching until the SS signal rises above VFB, which is proportional to the VOUT bias voltage. If IC is in USM or FCCM, the MP3431 works with a frequency of about 33kHz or 600kHz. Both USM and FCCM have a negative inductor current, so the energy may transfer from VOUT to VIN if the VOUT bias is high. Synchronous Rectifier and BST Function The MP3431 integrates both an LS-FET Q1 and HS-FET Q2 to reduce external components. During switching, the rectifier switch Q2 is powered from BST (typically 3.4V higher than the SW voltage). This 3.4V bootstrap voltage is charged from VDD when the LS-FET turns on. Current Limit The MP3431 provides both a fixed cycle-bycycle switching peak current limit and programmable average input current limit function. Input Current Limit The MP3431 senses the LS-FET Q1 average current when Q1 turns on and converts it to a micro-amp current signal that is fed to ILIM. Simultaneously, a resistor on ILIM converts this current signal to a voltage signal that is fed to the negative input of the current-limit error amplifier. The current-limit amplifier output clamps VCOMP if the input current signal is higher than the current limit threshold. As a result, the input current is limited by the internal COMP signal, and the output voltage decreases (see Figure 2). 3.45µA/A ILIM Rd_noise LS-FET Current 1kΩ CILIM RILIM Internal COMP 0.98V Current Limit Error Amplifier Figure 2: Input Overload Protection RILIM is the input current setting resistor, CILIM is used for current limit signal filtering, and Rd_noise is used to avoid noise affection. Rd_noise, RILIM, and CILIM are needed for input current limit setting. Then the input current limit can be estimated with Equation (1): IIN _ LIM  980  (1.2  VIN  0.12) (1) 3.45  (RILIM  1) Where IIN_LIM is the input current limit, RILIM is the input current limit setting resistor (in kΩ), and (1.2 - VIN * 0.12) is the offset current and sense delay of the inner amplifier. Typically, use 1kΩ for Rd_noise. If the input current limit function is not used, connect ILIM to AGND. Switching Peak Current Limit The MP3431 provides a fixed cycle-by-cycle switching peak current limit. In each cycle, the internal current sensing circuit monitors the LSFET current signal. Once the sensed current reaches the typical 21.5A current limit, the LSFET Q1 turns off. The LS-FET current signal is blanked for about 80ns internally to enhance noise immunity. MP3431 Rev. 1.0 6/8/2017 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 19 MP3431 – 21A, HIGH-EFFICIENCY, SYNC, BOOST CONVERTER W/ PROG CURRENT LIMIT Enable (EN) and Programmable UVLO EN enables and disables the MP3431. When applying a voltage higher than the EN high threshold (1V max threshold), the MP3431 starts up some of the internal circuits (micro-power mode). If the EN voltage exceeds the turn-on threshold (1.23V), the MP3431 enables all functions and starts boost operation. Boost switching is disabled when the EN voltage falls below its turn-on threshold (1.23V). To completely shut down the MP3431, a
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