MP4027
The Future of Analog IC Technology
Primary-Side Control,
Offline LED Controller with Active PFC,
NTC and PWM Dimming
DESCRIPTION
FEATURES
The MP4027 is a primary-side-control, offline
LED lighting controller. In a tiny TSOT23-8
package, it achieves high power factor (PF) and
accurate LED current for isolated, single-powerstage lighting applications.
This simplifies LED-lighting-system design
significantly by eliminating the secondary-side
feedback components and the optocoupler.
The MP4027 integrates power factor correction
(PFC) and valley switching mode to reduce
MOSFET switching losses.
The MP4027 has NTC function and allows
PWM dimming.
To enhance system reliability and safety, the
MP4027 has multiple internally integrated
protection features, including over-voltage
protection (OVP), short-circuit protection (SCP),
primary-side over-current protection (OCP),
brown-out
protection,
over-temperature
protection (OTP), cycle-by-cycle current limit,
VCC under-voltage lockout (UVLO), and autorestart function.
Real-Current Control without SecondaryFeedback Circuit
0.3V
ZCD Blanking Time
tLEB_ZCD
After turn-off,
VMULT_O ≤0.3V
After turn-off,
VMULT_O >0.3V
Over-Voltage Blanking Time
tLEB_OVP
After turn-off,
VMULT_O ≤0.3V
Over-Voltage Protection
1.6μs delay after turn-off
VZCD_OVP
Threshold
Minimum Off Time
tOFF_MIN
Starter
Start-Timer Period
tSTART
Gate Driver
Output-Clamp Voltage
VGATE_CLAMP VCC=28V
Minimum-Output Voltage
VGATE_MIN
VCC=VCCOFF + 50mV
(6)
Max. Source Current
IGATE_SOURCE
(6)
Max. Sink Current
Thermal Shutdown
Thermal Shutdown Threshold(6)
Thermal Shutdown Recovery
Hysteresis(6)
Min
Typ
Max
Units
290
1.9
400
2.0
500
650
2.1
nA
ns
V
190
280
480
ns
2.36
2.46
2.56
V
0.270
562
0.295
595
0.318
628
V
mV
1.2
1.6
2.1
μs
0.6
0.8
1.1
μs
1.2
1.6
2.1
μs
0.6
0.8
1.1
μs
4.9
5.1
5.4
V
4
5.5
8
µs
190
13.0
6.7
14.5
µs
17.0
0.8
V
V
A
IGATE_SINK
-1
A
TSD
150
°C
THYS
25
°C
Notes:
5) The multiplier output VMULT_O is given by: VCS=VMULT_O=K•VMULT• (VCOMP-1.5)
6) Guaranteed by characterization.
MP4027 Rev. 1.02
12/9/2014
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5
MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 90VAC to 264VAC, Isolated Flyback Converter, 6 LEDs in series, VOUT = 20V, ILED=350mA, TA
= 25°C, unless otherwise noted.
MP4027 Rev. 1.02
12/9/2014
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6
MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 90VAC to 264VAC, Isolated Flyback Converter, 6 LEDs in series, VOUT = 20V, ILED=350mA, TA
= 25°C, unless otherwise noted.
MP4027 Rev. 1.02
12/9/2014
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7
MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC
PIN FUNCTIONS
Pin #
Name
1
VCC
Power Supply Input. Supply power for the control signals and driving high-current
MOSFET. Bypass to ground with an external bulk capacitor (typically 4.7µF).
2
MULT
Multiplier Input. Connect to the tap of resistor divider between the rectified AC line and
GND. The half-wave sinusoid provides a reference signal for the internal-current-control
loop. MULT is used for brown-out protection detection.
3
NTC
LED Temperature Protection. Connect an NTC resistor from this pin to GND can reduce
the output current to protect the LED when ambient temperature rising high. Apply an
external PWM signal on this pin can dim the LED with PWM mode.
A 2.2nF to 4.7nF ceramic cap is recommended to connect from NTC to GND to bypass
the high frequency noise when activate temperature protection. For PWM dimming, the
cap can be removed.
4
COMP
Loop Compensation Input. Connect a compensation network to stabilize the LED driver
and maintain an accurate LED current.
5
GND
6
FB
Feedback Input. If the accurate LED current is needed, connect this pin to the LEDcurrent-sensing resistor.
CS/ZCD
Current-Sense and Zero-Current Detection. This is a MPS proprietary dual function pin.
When the gate driver turns on, CS/ZCD senses the MOSFET current. The difference
between the sensed voltage and the internal sinusoidal-current-reference determines
when the MOSFET turns off.
When the gate driver turns off, the zero crossing (after blanking time) triggers GATE turnon signal. Connect CS/ZCD to a resistor divider through a diode between the auxiliary
winding and GND.
Output over-voltage condition is detected through ZCD. During every turn-off interval, if
the ZCD voltage exceeds the over-voltage protection threshold, after the 1.6µs
(VMULT_O>0.3V) or 0.8µs (VMULT_O≤0.3V) blanking time, over-voltage protection is triggered
and the system stops switching until auto-restart.
CS/ZCD is used for primary-side over-current protection. If the sensing voltage reaches
2.46V (after blanking time), the primary-side over-current protection is triggered and the
system stops switching until auto-restart.
A 10pF ceramic cap is recommended to connect CS/ZCD to GND to bypass the highfrequency noise. In order to reduce RC delay influence on the accuracy of the currentsensing signal, a 1kΩ down-side resistance (RZCD2 in Figure 7) from CS/ZCD is
recommended.
GATE
Gate Drive Output. This totem-pole output stage can drive a high-power MOSFET with a
peak current of 0.8A source and 1A sink. The high-voltage limit is clamped to 14.5V to
avoid excessive gate-drive voltage. The drive-voltage is higher than 6.7V to guarantee a
sufficient drive capacity.
7
8
MP4027 Rev. 1.02
12/9/2014
Description
Ground. Current return for the control signal and the gate-drive signal.
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8
MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC
FUNCTION DIAGRAM
Figure 1: MP4027 Function Block Diagram
MP4027 Rev. 1.02
12/9/2014
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9
MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC
OPERATION
The MP4027 is a primary-side control, offline
LED controller. It incorporates all the features of
high-performance LED lighting. The LED
current is controlled accurately with the realcurrent control method from primary-side
information. Active power factor correction
(PFC) eliminates unwanted harmonic noise on
the AC line. The rich protection features
achieve high safety and reliability in real
application.
Start Up
Initially, the VCC cap is charged by the start-up
resistor from the AC line. When VCC reaches
25.5V, the control logic activates and the gate
driver signal begins to switch; the power supply
is taken over by the auxiliary winding.
The chip shuts down when VCC drops below
9.5V.
The high hysteretic voltage allows for a small
VCC capacitor (typically 4.7μF) to shorten the
start-up time.
Figure 2: Valley Switching Mode
Valley Switching Mode
During the external MOSFET ON-time (tON), the
rectified-input voltage (VBUS) charges the
primary-side inductor (LP) causing the primaryside current (IPRI) to increase linearly from zero
to peak value (IPK). When the MOSFET turns off,
the energy stored in the inductor is transferred
to the secondary-side, which activates the
secondary-side diode to power the load. The
secondary current (ISEC) decreases linearly from
its peak value to zero. When the secondary
current decreases to zero, the MOSFET drainsource voltage starts oscillating, which is
caused by the primary-side magnetizing
inductance and parasitic capacitances—the
voltage ring also is reflected on the auxiliary
winding (see Figure 2). To improve primarycontrol precision, the chip monitors when ZCD
voltage falls to zero twice before the next
switching period. The zero-current detector
from CS/ZCD generates GATE turn-on signal
when the ZCD voltage falls below 0.295V the
second time (see Figure 3).
Figure 3: Zero-Current Detector
Real-Current Control
The proprietary real-current-control method
allows the MP4027 to control the secondaryside LED current using primary-side information.
The mean value of the output LED current is
calculated approximately as:
Io
N VREF
2 RS
N—Turn ratio between primary side and
secondary side;
This virtually eliminates switch turn-on loss and
diode reverse-recovery losses, ensuring high
efficiency and low EMI noise.
MP4027 Rev. 1.02
12/9/2014
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10
MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC
VREF—The feedback
(typical 0.413V);
RS—The sensing resistor connected
between the MOSFET source and GND.
reference
voltage
Power-Factor Correction (PFC)
MULT is connected to a pull-up resistor from
the rectified-instantaneous-line voltage; the
multiplier output is sinusoidal. This signal sets
the sinusoidal primary side peak current. This
achieves a high power factor (PF).
Multiplier output
Inductor current
Figure 4: Power-Factor Correction
The maximum output voltage of the multiplier is
clamped to 2.0V, setting the cycle-by-cycle
current limit.
unnecessary IC shut down if ZCD misses
detection.
Minimum Off Time
The MP4027 operates with variable switching
frequency. The frequency changes with the
input instantaneous line voltage. To limit the
maximum frequency and enhance EMI
performance, the chip employs an internal
minimum OFF-time of 5.5µs.
Leading-Edge Blanking (LEB)
Internal
leading-edge-blanking
(LEB)
is
employed to prevent a switching pulse from
terminating prematurely due to parasitic
capacitance discharging when the MOSFET
turns on. During the blanking time, the path
from CS/ZCD to the current comparator input is
blocked. Figure 6 shows the leading-edge
blanking time. The LEB time of primary-side
OCP detection is relatively short at 280ns.
VCS
tLEB =400 ns
VCC Under-Voltage Lockout (UVLO)
When the VCC voltage drops below the UVLO
threshold 9.5V, the IC stops switching and
shuts down; the operating current is very low
under this condition. VCC is then charged by
the external resistor from the AC line. Figure 5
shows the typical waveform of UVLO.
t
Figure 6: Leading-Edge Blanking
Output Over-Voltage Protection (OVP)
Output
over-voltage
protection
prevents
component
damage
from
over-voltage
conditions. The auxiliary winding’s positive
plateau voltage is proportional to the output
voltage; the OVP uses the auxiliary-winding
voltage instead of directly monitoring the output
voltage.
Figure 5: VCC Under-Voltage Lockout
Auto Starter
The MP4027 integrates an auto-restart that
begins timing when the MOSFET turns off. If
ZCD fails to send a turn-on signal after 190µs, a
turn-on signal is initiated. This avoids an
MP4027 Rev. 1.02
12/9/2014
Figure 7 shows the OVP circuit. Once the ZCD
voltage is higher than 5.1V and exceeds the
OVP blanking time (during the gate turn-off
interval), the OVP signal is latched, turning the
gate driver off. When VCC drops below UVLO,
the IC restarts.
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11
MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC
The output OVP setting point is calculated as:
VOUT_OVP—The
protection point;
NAUX— The auxiliary winding turns;
frequency of the power circuit drops to about
5kHz and the output current is limited to its
nominal current. The auxiliary-winding voltage
drops to follow the secondary-winding voltage,
VCC drops to less than the UVLO threshold,
and then the system restarts. This sequence
limits both the output power and IC temperature
if an output short occurs.
NSEC— The secondary winding turns
Primary-Side Over-Current Protection (OCP)
VOUT _ OVP
NAUX
R ZCD2
5.1V
NSEC R ZCD1 R ZCD2
output
over-voltage
Gate
Gate_OFF
CS/ZCD
+
-
Latch
5.1V
OVP
Blanking time
RZCD 2
R1
RZCD 1
The primary-side over-current protection
prevents device damage from excessive current,
such as a primary winding short circuit. If the
CS/ZCD voltage rises to 2.46V during the gate
turn-on interval (see Figure 9), the primary-side
over-current protection signal is latched, turning
the gate driver off. When VCC drops below
UVLO, the IC restarts.
Figure 7: OVP Sampling Unit
To prevent a voltage spike from an OVP mistrigger, OVP sampling has a tLEB_OVP blanking
period, typically 1.6µs when VMULT_O > 0.3V and
0.8µs when VMULT_O ≤ 0.3V (see Figure 8).
VCS/ZCD
Sampling Here
Figure 9: Primary-Side OCP Sampling Unit
0V
t LE B _OV P
Figure 8: ZCD Voltage and OVP Sampler
A current-limit resistor between the output of
the auxiliary winding and the ZCD resistor
divider also works as a suppresser to avoid an
OVP mis-trigger.
Output Short-Circuit Protection (SCP)
If an output short occurs, ZCD cannot detect
the transformer’s zero-current-crossing signal,
so the 190μs auto-restart timer triggers the
MOSFET’s turn-on signal. The switching
MP4027 Rev. 1.02
12/9/2014
Brown-Out Protection
The MP4027 has brown-out protection; the
internal peak detector detects the peak value of
the rectified sinusoid waveform on MULT. If the
peak value is less than the brown-out protection
threshold, 0.298V for typically 42ms, MP4027
identifies this as a brown-out, dropping COMP
to zero and disabling the power circuit. If the
peak value exceeds 0.398V, the IC restarts and
the COMP voltage rises again softly. This
feature prevents the transformer and LED
current from saturating during fast ON/OFF
switching (see Figure 10).
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12
MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC
PWM Dimming
VCC
Brown out
happen
Brown out
detected
Vbus
Brown
out
recover
The MP4027 can accept direct PWM dimming
signal. Applying a PWM signal (>200Hz) on
NTC pin can achieve dimming performance.
Following the NTC curve of Figure 11, if the
high level of the PWM signal is higher than
VH_NTC, the internal reference voltage VREF is full
scale. And if the low level of the PWM signal is
lower than VSD_NTC, the internal reference
voltage VREF is at the minimal value. Then the
internal reference voltage of EA can be
modulated as the external PWM dimming signal
to capture the duty cycle information.
V peak_ Mult
Vcomp
Vgate
Figure 10: Brown-Out Protection Waveforms
NTC Thermal Protection
The NTC provides LED thermal protection. A
NTC resistor to monitor the LED temperature
can be connected to this pin directly. The
internal
pull-up
resistor
generates
a
corresponding voltage on the external NTC
resistor, and the LED current changes as NTC
voltage changes. Figure 11 shows the NTC
curve.
Io
To Multiplier
COMP
CCOMP
EA
NTC
VREF
Current
Caculation
PWM Signal
CS
Figure 12: PWM Dimming
With large COMP cap, the loop response is
slow. As long as the PWM frequency is higher
than 200Hz, the duty cycle information can be
filtered and averaged by COMP. Then, by the
close loop control, the output LED current
linearly changes with dimming duty from
maximum to minimum.
Iset
VH_NTC
VL_NTC
0
VSD_NTC
Iset/3
VNTC
Figure 11: NTC Curve
If the NTC voltage drops below VSD_NTC, the
LED current drops to minimum output, the
minimum output current is determined by gate
minimum on time. (equal to 400ns LEB time)
MP4027 Rev. 1.02
12/9/2014
IC Thermal Shut Down
To prevent thermal damage to the system and
IC, if internal temperatures exceed 150°C, the
MP4027 stops switching and the IC is latched
off until VCC drops below UVLO and restarts.
Design Example
For the design example, please refer to MPS
application note AN076 for the detailed design
procedure and information.
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13
MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC
NON-ISOLATED APPLICATIONS
Although isolated solutions can prevent electric
shock from the grid when touching the load,
they cause power loss and increase costs.
Non-isolated solutions achieve higher efficiency
and are highly cost-effective.
BUS
N1
Generally, the flyback converter is used for
offline, isolated applications. For the nonisolated applications, a low-side buck-boost
topology is used. The MP4027 can operate in
both offline isolated and non-isolated LEDlighting applications (see Figure 19).
Operation of Low-Side Buck-Boost
The low-side buck-boost equates to a flyback
converter with a 1:1 turn ratio transformer. As
opposed to an isolated solution, there is not a
separate primary and secondary winding,
making a smaller core size. This saves cost and
improves the efficiency of the driver.
The Selection of FET & Rectifier Diode
Since it is just an inductor for non-isolated
solution, compared with isolated solution, at
same output voltage, the power FET can be
selected with lower voltage rating. But,
oppositely, the voltage rating of rectifier diodes
for output and aux-winding must be increased.
Improvement of RF EMI
C12 in Figure 19 is added for RF EMI
improvement. The recommended value is from
10nF to 68nF with 630V rating.
Improvement of PFC & THD
The 1:1 ratio reduces the converter’s duty cycle
using the same specifications. Based on the
PFC principle in an isolated solution, the
converter’s PF and THD drops. A non-isolated
solution is suitable particularly for high-output
voltage since the higher output voltage can
extend the duty cycle to improve PF, THD and
efficiency.
For a non-isolated solution with low-output
voltage, the tapped inductor can be applied to
improve the PF and THD.
MP4027 Rev. 1.02
12/9/2014
N2
GATE
CS
Figure 13: Tapped-Inductor for Low-Side BuckBoost Solution
Shown in Figure 13, the tapped-inductor
includes two windings (N1 & N2) and a tap to
connect the rectifier diode. When the power
FET is turned on, the current goes through both
of the windings. When the power FET is off,
only N1 conducts the current through the
rectifier diode. The stored energy of N2 is
released by flux couple. The tapped inductor
features a turn ratio similar to the transformer in
an isolated solution.
The nominal turns ratio is
n
N1 N2
1
N1
The duty cycle of the converter is extended by
the tapped inductor, which makes the improved
PF and THD available.
Like the transformer, the snubber is necessary
to clamp the voltage spike.
However, the non-dimmable solution usually
needs to cover the universal input range. The
input range is very wide, from 85VAC to
264VAC. MULT is used to detect the inputvoltage signal, but the resistor divider of MULT
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14
MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC
is fixed. At high-line input, the signal for MULT
is very low, which results in an adverse affect
on the internal multiplier sampling; this affects
the PFC performance.
Figure 14 shows an improved circuitry on the
MULT resistor divider; this adjusts the ratio of
the divider to enhance THD.
As shown in Figure 15, after adding the THD
improved circuitry, the MULT voltage rises. The
input current at the top of BUS is increased
while the input current at the zero-crossing is
reduced. This results in the input current
becoming more sinusoidal, improving THD.
Operation of High-Side Buck/Buck-Boost
The MP4027 features FB pin, which is used to
receive the feedback signal of LED current
directly. So, the MP4027 can be designed in
high-side Buck or Buck-Boost application to
achieve excellent LED current accuracy
regulation, especially for very high load
regulation requirement.
Figure 20 is a 7.2W high-side Buck solution.
Figure 14: THD Improved Circuitry
The ZD1 is a HV Zener diode. The common
voltage rating is from 80V to 130V.
At low-line input, ZD1 does not conduct. The
MULT signal is:
VMULT VBUS
RMULT2
RMULT1 RMULT2
When the input voltage rises above ZD1
threshold, RMULT3 is paralleled with RMULT1 to
increase the ratio of the divider; this raises the
MULT signal.
High-side Buck solution can achieve higher
efficiency. But the system just works @
VIN>VOUT based on step-down converter’s
operation. But the input voltage of PFC solution
is a sinusoid wave. When VIN1kV Surge Test
LED-
2
L3
2.2mH
D5
WSGC10MH
1000V/1A
C1
220nF/400V
2
3
R16
499k/1206
1
C11
3.3uF/400V
1
2
BD1
DF06S
R3A
499k/1%/1206
R2
470k/1%/0.5W
N
C5
NS
85VAC-264VAC
4
NTC
COMP
C6
2.2uF/10V
0805
CS/ZCD
FB
GND
2
D4
3
1
19Ts
2
LED+
WUGF30J
600V/3A/SMB
5
UUR2813
C12
68nF/630V
1
1
NTC1
NS
MULT
1
36V/500mA
L4
600uH
Lm=287uH
1
8
7
6
5
R6
20/0805
R9
2.2k/1%
C7
10pF/50V
R10
NC/1206
1
3
3
GATE
C8
68pF/630V/1206
C10
330uF/63V
C9
330uF/63V
9.76k/1% BAV3004W
350V/0.2A
U1
MP4027
VCC
0/1%/1206
D3
R8
2
2
R4
7.32k/1%
2
1
L
D1
NS
20/1%/1206
R7
5.1M/1%
1
C4
2.2nF/50V
R5
2
1
2
2
1
F1
250V/2A
R15
1
R3B
499k/1%/1206
C3
100pF/50V
C2
4.7uF/50V
2
R13
100/1206
2
D2
2
BAV3004W
350V/0.2A
2
RV1
TVR10431
1
30Ts
4
R18
2M/0.25W
L2
60mH
L1
600uH
1
L5
BEAD
1800@70MHz
R17
499k/1206
2
D6
1N5375B
82V
1
4
CX1
100nF/275Vac
2
1
R14
30k/1206
T1
Q1
SMK0765F
650V/7A
R11
0.2/1%/1206
R12
0.2/1%/1206
Figure 19: T8 Driver, 85-265VAC Input, Low-side Buck-boost Converter, VO =36V, ILED=500mA
MP4027 Rev. 1.02
12/9/2014
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17
MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC
TYPICAL APPLICATION CIRCUITS (continued)
R3
5.1k/1206
R12
NC
Q1
600V/4A
SMK0460I
L3
1.5mH/0.25A
D5
STTH3R06U
D1
D2
WUGC10JH
R13
30k/1206
R14
1k/1%/1206
SGND
1
R2
5.1k/1206
D3
1
L1
0.47mH/0.9A
L2
0.47mH/0.9A
R1
5.1k/1206
BZT52C30
C3
4.7uF/50V
2
2
C4
27nF/50V
R5
7.68k/1%
RV1
VCC
SGND
MULT
3
TVR10431
F1
250V/2A
6
FB
COMP
R10
27k/1%
7
CS/ZCD
NTC
C7
2.2nF/50V4
C1
10pF/50V
C6
470nF/16V
5
GND
C5
2.2uF/6.3V
2
SGND
NTC
NC
LED-1
D4
WUGC10JH
600V/1A
R9
2.2k/1%
8
GATE
36V/200mA
GND
600V/1A
U1
MP4027
LED+1
C8
220uF/63V
R7
1k/1%
GND
CX1
22nF/275VAC
L4
825uH/EE13
R11
2/1%/1210
STTH3R06U
600V/3A
R8
20/0805
R6
1M/1%/0.25W
R4
C2 470k/0.5W
220nF/450V
BD1
MB6S
C9
220uF/63V
SGND
1
L
N
SGND
90VAC-265VAC
Figure 20: A19 Bulb Driver, 90-265VAC Input, High-side Buck Converter, VO =36V, ILED=200mA
L1
1MH 6X8
LED+
R2
150K 1206
US1J SMA
EE1024-9865-05501M
T1
F1
10R/1W
N
NTC MP4027
4
COMP
8
7
FB
6
GND
5
R4
C2
6
3
GATE
CS/ZCD
.
C9
R9
30k 1206
4.7uf/50v 1206
1
LED-
R7
2k 1% 0603
R3
R5
C8
2.2U/6.3v 0603
R6
2R2 1% 1206
MULT
100K 0603
VCC
2
Q1
5N50 IPAK
2R4 1% 1206
221K
N TC 100K 1% 0805
12.4K 1% 0603
RV1
C10
2.2NF 50V 0603
CBB 0.047uF/125VAC
6.2K 0603
R10
1
R8
100R 0805
10PF/50V 0603
2
U1
X1
F1
.
4.7uf/50v 1206
8
1
2
C7
D1
R1
1M 0805
7
3
+
1
LED-
3
4
C1
4.7UF/200V LLE
1
CE1
+
BD1
LX10M/SMD
10NF/1KV 1206
1
RT1
R13
6.8K 1% 0603
D3
C3
D2
BAV21WSGH
SOD-323
R14
22R 0805 1%
BAV21WSGH
SOD-323
4.7U/50V 1206
Figure 21: 4W Candle Bulb Driver, 90-132VAC Input, Low-Side Buck-Boost Converter, VO =23V,
ILED=180mA. No PFC requirement, so the input cap is larger than PFC solution, and small output cap can
meet the output current ripple requirement
MP4027 Rev. 1.02
12/9/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
18
MP4027 – PRIMARY-SIDE CONTROL, OFFLINE LED CONTROLLER WITH ACTIVE PFC
PACKAGE INFORMATION
TSOT23-8
See note 7
EXAMPLE
TOP MARK
PIN 1 ID
IAAAA
RECOMMENDED LAND PATTERN
TOP VIEW
SEATING PLANE
SEE DETAIL''A''
FRONT VIEW
SIDE VIEW
NOTE:
DETAIL ''A''
1) ALL DIMENSIONS ARE IN MILLIMETERS
.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH
,
PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD
FLASH OR PROTRUSION.
4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER
FORMING) SHALL BE 0.10 MILLIMETERS MAX.
5) JEDEC REFERENCE IS MO-193, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP MARK
FROM LEFT TO RIGHT, (SEE EXAMPLE TOP MARK)
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP4027 Rev. 1.02
12/9/2014
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2014 MPS. All Rights Reserved.
19