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MP4050AGS

MP4050AGS

  • 厂商:

    MPS(美国芯源)

  • 封装:

    SOIC8_150MIL

  • 描述:

    NON-ISOLATED, HIGH-BRIGHTNESS LE

  • 数据手册
  • 价格&库存
MP4050AGS 数据手册
MP4050A Non-Isolated, High-Brightness LED Driver with Enhanced Thermal Feature The Future of Analog IC Technology DESCRIPTION FEATURES The MP4050A is a constant current LED driver with an integrated 500V MOSFET. It is designed specifically for energy efficient and low-cost LED bulb replacement applications.          The MP4050A is designed to drive highbrightness LEDs from a universal AC grid input or DC input. The accurate output LED current is achieved by an averaging internal current feedback loop. Constant LED current is delivered quietly by switching the internal MOSFET at a frequency regulated above 22kHz. The MP4050A can be powered directly by the high input voltage. An internal high-voltage current source regulates supply voltage without external circuitry. Full protections features include integrated thermal current foldback, VCC under-voltage lockout (UVLO), open LED protection (OLP), short-circuit protection (SCP), and overtemperature protection (OTP). These features make the MP4050A an ideal solution for simple, off-line, and non-isolated LED applications.      Constant Current LED Driver Integrated 500V/8Ω MOSFET Low VCC Operating Current Maximum Frequency Limit Audible Noise Restrain Internal High-Voltage Current Source Internal 200ns Leading Edge Blanking Integrated Thermal Current Foldback Thermal Shutdown (Auto Re-Start with Hysteresis) VCC Under-Voltage Lockout with Hysteresis Open LED Protection Short-Circuit Protection Auto-Restart Function Available in TSOT23-5/SOIC-8 Packages APPLICATIONS     AC/DC or DC/DC LED Driver Application General Illumination Industrial Lighting Automotive/Decorative LED Lighting All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 1 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE ORDERING INFORMATION Part Number MP4050AGJ* MP4050AGS** Package TSOT23-5 SOIC-8 Top Marking See Below * For Tape & Reel, add suffix –Z (e.g. MP4050AGJ–Z); ** For Tape & Reel, add suffix –Z (e.g. MP4050AGS–Z). TOP MARKING (TSOT23-5) ANV: Product Code of MP4050AGJ; Y: Year Code. TOP MARKING (SOIC-8) MP4050A: Product Code of MP4050AGS; LLLLLLLL: Lot Number; MPS: MPS Prefix; Y: Year Code; WW: Week Code. MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 2 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE PACKAGE REFERENCE TOP VIEW VCC 1 PRO 2 GND 3 TOP VIEW 5 4 DRAIN SOURCE TSOT23-5 ABSOLUTE MAXIMUM RATINGS (1) DRAIN to SOURCE ...................... -0.3V to 500V VCC, SOURCE to GND ................. -0.3V to 6.5V PRO to GND .................................. -0.7V to 6.5V Source Current on PRO .............................. 4mA Continuous Power Dissipation (TA = +25°C) (2) TSOT23-5 ................................................. 1.25W SOIC-8 ........................................................ 1.3W Lead Temperature .................................... 260C Storage Temperature ................-60C to +150C ESD Capability Human Body Mode .......... 2.0kV CDM ESD Capability ................................. 2.0kV Recommended Operating Conditions (3) Supply Voltage VCC Range ........... 4.1V to 5.0V VCC 1 8 N.C PRO 2 7 DRAIN GND 3 6 N.C SOURCE 4 5 N.C SOIC-8 Thermal Resistance (4) θJA θJC TSOT23-5 .............................. 100 ...... 55 ... C/W SOIC-8 .................................... 96 ....... 45 ... C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 3 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE ELECTRICAL CHARACTERISTICS Typical values are VCC =5V, TJ = 25C, unless otherwise noted. Minimum and maximum values are at VCC =5V, TJ = -40C to +125C, unless otherwise noted, guaranteed by characterization. Parameter Symbol Condition Min Typ Max Units IREGULATOR VCC=0V, VDRAIN=100V 3.8 5 6.1 mA ID_LKG VCC=6V, VDRAIN=500V 14 22 μA 4.65 5 V Start-Up Current Source (DRAIN) Internal Regulator Supply Current Leakage Current from DRAIN Supply Voltage Management (VCC) VCC Increasing Level: Internal Regulator Stops & IC Starts Working VCC Normal Level VCC Decreasing Level: Internal Regulator Turn-On VCC Hysteresis: Regulator On/Off VCC Decreasing Level: IC Stops VCC Hysteresis: Regulator Off & IC Stops Working VCC Decreasing Level: Protection Phase Ends VCCOFF VCC Rising Edge VCCNOR Normal Operation VCCON VCC Falling Edge 4.1 4.4 4.75 V VCC Falling Edge 0.15 3 0.24 3.4 0.32 3.8 V V 0.93 1.25 1.6 V 1.9 2.35 2.8 V 350 425 μA 18 32 μA VCCOFF-ON VCCSTOP VCCOFF-STOP VCCPRO Internal IC Consumption Internal IC Consumption at Latch-Off Phase Internal MOSFET (DRAIN to SOURCE) Breakdown Voltage DRAIN SOURCE On-State Resistance ICC VCC Falling Edge 4.3 4.55 VCC=4.3V, fSW=33kHz, Duty=84% ICC_LATCH VBRDSS RDS(ON) ID=80μA V 500 V ID=10mA, TJ=25°C 8 12 Ω VCC=VCCSTOP + 50mV, ID=10mA, TJ=25°C 8 12 Ω Current Sampling Management (SOURCE) Peak Current Limit at Normal Operation VLIMIT 0.4 0.46 0.52 V Leading Edge Blanking tLEB 130 200 310 ns Feedback Threshold: Turn-On HighSide MOSFET VREF 0.187 0.196 0.205 V 3.4 4.7 6.2 μs 16 tOFF_MIN ×3.5 tOFF_MIN ×2 tOFF_MIN ×1.2 25 tOFF_MIN Minimum Off-Time Limitation Maximum On-Time Limitation tOFF_MIN_ST tON_MAX Regulate the Average Current Normal Operation The 1st 32 Switching Cycles at Start-Up The 2nd 32 Switching Cycles at Start-Up The 3rd 32 Switching Cycles at Start-Up MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. μs μs μs 37 μs 4 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE ELECTRICAL CHARACTERISTICS (continued) Typical values are VCC =5V, TJ = 25C, unless otherwise noted. Minimum and maximum values are at VCC =5V, TJ = -40C to +125C, unless otherwise noted, guaranteed by characterization. Parameter Symbol Condition Min Typ Max Units 1.85 2 2.15 V 32 μs Over-Voltage Protection (PRO) Over-Voltage Threshold VOVP Time Constraint on OVP Comparator tOVP 21 TSTART 145 C TSD 160 C THYS 50 C Thermal Protection Thermal Foldback Threshold (5) Thermal Shutdown Threshold Thermal Shutdown Recovery Hysteresis (5) (5) Notes: 5) Guaranteed by characterization. MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 5 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE TYPICAL CHARACTERISTICS Leakage Current vs. Junction Temperature 17 660 6.0 16 640 5 .5 15 620 5.0 14 4 .5 13 4.0 12 28 VBRDSS (V) 6 .5 3 .5 -50 -25 0 VCC Current In Latch Phase vs. Junction Temperature 4.80 600 580 560 11 -50 -25 0 25 50 75 100 125 150 540 -50 -25 0 25 50 75 100 125 150 VCC Regulator Off Threshold vs. Junction Temperature 4.55 22 4.70 4.45 16 13 4.60 4.50 -50 -25 0 25 50 75 100 125 150 VCC Stop Threshold vs. Junction Temperature 2.6 2.5 3.4 2.4 VCCPRO (V) 3.5 3.3 3.2 3.0 -50 -25 0 25 50 75 100 125 150 4.35 4.25 -50 -25 0 25 50 75 100 125 150 VCC Protection Threshold vs. Junction Temperature 2.3 2.2 2.0 -50 -25 0 25 50 75 100 125 150 Feedback Reference vs. Junction Temperature 0.198 0.197 0.196 0.195 0.194 2.1 3.1 4.40 4.30 4.55 10 -50 -25 0 3.6 VCCON (V) 4.50 VCCOFF (V) 4.75 4.65 25 50 75 100 125 150 VCC Regulator On Threshold vs. Junction Temperature 25 19 VCCSTOP (V) Breakdown Voltage vs. Junction Temperature VREF (V) IREGULATOR (mA) Internal Regulation Currentt vs. Junction Temperature 25 50 75 100 125 150 0.193 -50 -25 0 25 50 75 100 125 150 MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 6 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE TYPICAL CHARACTERISTICS (continued) 2.06 Over-Voltage Protection Reference vs. Junction Temperature Minimum Off Time vs. Junction Temperature 5.2 VOVP (V) 28 5.0 2.04 Maximum On Time vs. Junction Temperature 27 4.8 2.02 26 4.6 2.00 1.98 24 4.2 1.96 -50 -25 0 4.0 -50 -25 0 25 50 75 100 125 150 On-State Resistance vs. Junction Temperature 25 50 75 100 125 150 23 -50 -25 0 25 50 75 100 125 150 Peak Current Limit vs. Junction Temperature 0.48 16 14 0.47 VCC=VCCSTOP+50mV VLIMIT (V) 12 25 4.4 10 8 VCC=5V 0.45 0.44 6 4 -50 -25 0 0.46 25 50 75 100 125 150 0.43 -50 -25 0 25 50 75 100 125 150 MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 7 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE TYPICAL PERFORMANCE CHARACTERISTICS VIN = 230VAC, 13 LEDs in series, VOUT = 40V, ILED=115mA, L = 4.7mH, COUT=47μF, TA = 25°C, unless otherwise noted. Steady State VDS 100V/div. Turn-On Delay Input Power Start-Up VDS 100V/div. VBULK 100V/div. VOUT 10V/div. IOUT 50mA/div. IL 100mA/div. Input Power Shutdown IL 100mA/div. SCP SCP Entry & Recorvery VSOURCE 100V/div. VDS 100V/div. VOUT 10V/div. IL 100mA/div. IL 50mA/div. OVP Entry IL 100mA/div. OVP Recovery VOUT 10V/div. VOUT 10V/div. IL 100mA/div. IL 100mA/div. Output-Current Ripple IOUT 20mA/div. MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 8 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 230VAC, 13 LEDs in series, VOUT = 40V, ILED=115mA, L = 4.7mH, COUT=47μF, TA = 25°C, unless otherwise noted. 120 Thermal Current Foldback Curve 100 Line & Load Regulation 1.2 0.8 80 0.4 60 0 40 -0.4 20 -0.8 0 120 125 130 135 140 145 150 155 160 7LEDs 9LEDs 13LEDs 11LEDs -1.2 85 105125145165185205225245265 INPUT VOLTAGE (VAC) MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 9 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE PIN FUNCTIONS Pin # TSOT23-5 SOIC-8 Name Description 1 1 VCC Power Supply. Supply power for the control signals and the high-current MOSFET. Bypass to ground with an external bulk capacitor. 2 2 PRO Open LED Detection Input. During the turn-off interval, if PRO voltage is higher than VOVP, the over-voltage protection is triggered. 3 3 GND Ground. The reference ground for the control signal and the gate drive signal. 4 4 SOURCE Source of Internal Power MOSFET & Feedback Input. Connect currentsensing resistor from SOURCE to GND to set the LED current. 5 7 DRAIN Drain of Internal Power MOSFET & Integrated HV Current Source Input. -- 5, 6, 8 NC No Connection. Do Not Connect. MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 10 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE FUNCTION BLOCK DIAGRAM VCC Power Management Start-Up Unit DRAIN Driving Signal Unit PRO Protection Unit Average Current Control Thermal Protection Peak Current Limit GND SOURCE Minimum Frequency Control Figure 1: Functional Block Diagram MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 11 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE OPERATION The MP4050A is a non-isolated, cost-effective, high-efficiency converter designed to drive highbrightness LEDs from a universal AC grid input or DC input. As shown in the typical application diagram (see Fig. 1), the regulator is designed to operate with a minimum number of external components. Start-Up and Under-Voltage Lockout (UVLO) Initially, the chip is self-supplied by the internal high-voltage VCC regulator (which is drawn from DRAIN). The IC starts switching and the internal high-voltage regulator turns off as soon as the VCC reaches VCCOFF. When VCC drops below VCCON, the internal high-voltage regulator turns on again to charge the external VCC capacitor. Finally, VCC is regulated at VCCNOR for normal operation. Constant-Current Operation The MP4050A is a fully integrated regulator. The internal feedback logic responds to the internal sample and hold circuit to achieve constant output-current regulation. The voltage of the internal sampling capacitor (VFB) is compared to the internal reference (VREF) when the sampling capacitor voltage (VFB) falls below the reference voltage (which indicates an insufficient output current). Then the integrated MOSFET is turned on. The on period is determined by the peak current limit. After the on period elapses, the integrated MOSFET is turned off (see Fig. 3). A small capacitor with several μF capacitances is enough to hold on to the VCC supply voltage. Also, a smaller capacitor reduces component cost. When VCC drops below VCCSTOP, the IC stops working and the internal high-voltage regulator re-charges the VCC capacitor. When fault conditions occur (such as open LED protection or over-temperature protection), the MP4050A stops working, and an 18µA internal sink current source discharges the VCC capacitor. After VCC drops below VCCPRO, the internal highvoltage regulator recharges the VCC capacitor again. The re-start time can be calculated by the following equation, tRESTART  CVCC  VCCNOR  VCCPRO VCCOFF  VCCPRO  CVCC  18A 5mA Fig. 2 shows the typical waveforms with VCC under-voltage lockout. Figure 3: VFB vs. IOUT Thus, by monitoring the internal sampling capacitor voltage, the output current can be regulated. The output current is determined by the following equation: IOUT  VREF RS The peak inductor current at normal operation can be obtained with the following equation: IPK  VLIMIT RS Where RS is the sensing resistance connected from SOURCE to GND. Figure 2: VCC Under-Voltage Lockout (UVLO) MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 12 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE Minimum Operating Frequency Limit The MP4050A incorporates a minimum operating frequency (22kHz) to eliminate audible noise. When the operating frequency is less than 22kHz, the internal peak-current regulator decreases the peak-current value to keep the operating frequency constant at about 22kHz. If the inductance is too large to make the operating frequency drop to the minimum operating frequency, the converter enters CCM operation. Generally, the converter works in DCM when the operating frequency is larger than 22kHz for normal operation. Minimum Off-Time Limit A minimum off-time limit is implemented. During normal operation, the minimum off-time limit is 4.7μs. During the start-up period, the minimum off-time limit is shortened gradually from 16.45μs to 4.7μs (see Fig. 4). Each minimum off-time limit maintains 32 switching cycles. This soft-start function enables a safe start-up. Figure 4: Minimum Off-Time Limit at Open LED Protection (OLP) If PRO voltage (VPRO) is higher than VOVP when the MOSFET turns off, the MP4050A stops working, and a re-start cycle begins. Open LED protection operates in hiccup mode. The MP4050A monitors the PRO voltage continuously, and the VCC cap is discharged and charged repeatedly. The MP4050A resumes work once the fault disappears. Short-Circuit Protection (SCP) When an LED short circuit occurs, the switching off time is extended. Due to the minimum operating frequency limit, the IC can reduce automatically the switching frequency and achieve close loop control. Then the output power at this condition is limited within a safe range. The MP4050A resumes work in normal operation once the device recovers from the short circuit. Leading Edge Blanking (LEB) Internal leading edge blanking (LEB) is employed to prevent a switching pulse from terminating prematurely due to parasitic capacitance discharging when the MOSFET turns on. During the blanking time, the path from SOURCE to the current comparator input is blocked (see Fig. 5) Start-up Thermal Shutdown (TSD) To prevent thermal damage to the system and IC, the chip reduces the reference to decrease the output power if the junction temperature exceeds 145C. This limits the rising temperature speed of the IC. Typically, the reference voltage drops to around 20% when the junction temperature rises to 160C. If the temperature exceeds 160C, the MP4050A stops switching, and the IC is latched off. Once the junction temperature drops below 110C, the chip resumes operation. Figure 5: Leading Edge Blanking (LEB) MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 13 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE APPLICATION INFORMATION Component Selection Input Capacitor The input capacitor is used to supply DC input voltage to the converter. Fig. 6 shows the typical DC bus voltage waveform of a full-bridge rectifier. If the inductance is too large, the converter enters CCM, and the frequency drops to the minimum operating frequency. If this occurs, the reverse recovery of the freewheeling diode results in more power loss. Normally, it’s better to have the converter operate in DCM. The following expression calculates the limit of the minimum operating frequency: Lm  2  IO 1 1 fSW _ MIN  (  ) I 2 VDC(MIN)  VO VO PK Freewheeling Diode Figure 6: Input Voltage Waveform When a full-bridge rectifier is used, the input capacitor is set usually as 2μF/W for the universal input range. With a low-power output, the half-bridge rectifier can be used with a bigger capacitor. Very low DC input voltage causes thermal problems in LED applications with buck topology. The minimum acceptable input DC voltage VIN_MIN_LIMIT is limited by the maximum duty cycle of the MP4050A as follows: VIN _ MIN _ LIMIT  VO  (t ON _ MAX  t OFF _ MIN ) t ON _ MAX The actual minimum input voltage VDC(MIN) must be higher than VIN_MIN_LIMIT: VDC(MIN)  VIN _ MIN _ LIMIT Inductor The MP4050A has a minimum off-time limit and maximum on-time limit. Both time limits affect the inductance. The maximum and minimum inductance values can be obtained as follows: Lm  LMAX  (VDC(MIN)  VO )  t ON _ MAX Lm  LMIN  IPK VO  t OFF _ MIN The diode’s maximum reverse-voltage rating is higher than the maximum input voltage. The current rating of the diode is determined by the output current (which is larger than 1.5 to 2 times the output current). Slow recovery diodes cause excessive leading edge current spikes during start-up. The long reverse-recovery time of the freewheeling diode affects efficiency and the operation of the system. An ultrafast diode (trr0.5 under 120VAC input requirement. The input capacitance is reduced to achieve the highest possible power factor as PF>0.7 @ 120VAC and PF>0.5 @ 230VAC (if the output-current regulation is not limited). Surge Select the appropriate input capacitance to obtain good surge performance. With the input capacitor C2 (4.7µF) and C3 (4.7µF) in Fig. 11, the board can pass a 1kV differential input line 1.2/50µs surge test (IEC61000-4-5). It is recommended to increase the input capacitor value to suppress a surge test above 1kV. As for the high PF required, applications with lower input capacitor values give a greater voltage rise. Typically, a metal oxide varistor (MOV) is required to pass a surge test above 1kV. Top Layer Table 1 shows the input capacitor values required to pass the differential surge test. TABLE 1. Recommended Input Capacitance Surge Voltage C2 C3 Figure 10: Recommended PCB Layout 500V 1kV 1.5kV 2kV 3.3μF 3.3μF 4.7μF 4.7μF 4.7μF 10μF Shown in Fig. 9 The board can pass the 2kV differential surge test by adopting the circuit setup below (see Fig. 9): 1. Add a MOV RV1 (TVR14431). 2. Add a fuse F1 (SS-5-2A). L L1 1mH/0.1A F1 250V/2A FR1 10/1W 85~265VAC BD1 MB6S 600V/0.5A RV1 TVR14431 C2 4.7 400V N Figure 9: 2kV Surge Solution Bottom Layer C3 4.7 400V PCB Layout Guidelines Efficient PCB layout is critical to achieve reliable operation, good EMI, and good thermal performance, especially in very small sized LED applications. For best results, refer to Fig. 10 and follow the guidelines below: 1. Keep the loop formed between the DRAIN to SOURCE, inductor, freewheeling diode, and output capacitor as small as possible for better EMI. 2. Ensure the AC input is far away from the switching nodes to minimize the noise coupling that may bypass the input filter. 3. Place the VCC and PRO capacitors close to the IC and GND. 4. Place the PRO feedback resistor as close to PRO as possible and minimize the feedback sampling loop to minimize the noise coupling route. MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 16 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE 5. Keep the copper area connected to SOURCE short (in the high-side buck topology) to minimize EMI with the thermal constraints of the design (since SOURCE is a switching node). 6. Maximize the connection of the copper area to DRAIN to improve heat sink (since DRAIN is a static node connected to the DC input). MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 17 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE TYPICAL APPLICATION CIRCUITS Fig. 11 shows a typical application example of a 40V, 115mA non-isolated, buck topology LED driver using MP4050AGJ. L1 1mH U1 MP4050A 5 BD1 MB 6S 600V/0.5A L VCC PRO R5 10kΩ/0805 4 SOURCE GND 1 C2 4.7 µF/400V C1 2. 2µF/ 10V 2 3 FR1 10 Ω/1W 85VAC to 265VAC N DRAIN R1 9.31kΩ/1 % R2 200kΩ/1 %/1206 C3 4.7µF/400V LED+ R3 3.3 Ω/1%/ 1206 L2 4.7mH R4 3.3 Ω/1%/ 1206 D1 C4 47µF/50V R6 200kΩ 40V/115mA WUGC10JH 600V/1A LED- Figure 11: Typical Buck Converter Application MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 18 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE FLOW CHART Figure 12: Control Flow Chart MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 19 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE PACKAGE INFORMATION TSOT23-5 0.60 TYP 2.80 3.00 5 4 1.20 TYP 1.50 1.70 1 0.95 BSC 2.60 3.00 2.60 TYP 3 TOP VIEW RECOMMENDED LAND PATTERN 0.70 0.90 1.00 MAX 0.09 0.20 SEATING PLANE 0.30 0.50 0.95 BSC 0.00 0.10 SEE DETAIL "A" FRONT VIEW SIDE VIEW NOTE: GAUGE PLANE 0.25 BSC 0o-8o 0.30 0.50 DETAIL “A” 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) DRAWING CONFORMS TO JEDEC MO-193, VARIATION AA. 6) DRAWING IS NOT TO SCALE. MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 20 MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE PACKAGE INFORMATION (continued) SOIC-8 0.189(4.80) 0.197(5.00) 8 0.050(1.27) 0.024(0.61) 5 0.063(1.60) 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.213(5.40) 4 TOP VIEW RECOMMENDED LAND PATTERN 0.053(1.35) 0.069(1.75) SEATING PLANE 0.004(0.10) 0.010(0.25) 0.013(0.33) 0.020(0.51) 0.0075(0.19) 0.0098(0.25) SEE DETAIL "A" 0.050(1.27) BSC SIDE VIEW FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0o-8o 0.016(0.41) 0.050(1.27) DETAIL "A" NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP4050A Rev. 1.02 www.MonolithicPower.com 9/19/2019 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 21
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