MP4078
Primary-Side Control, CV Output,
Single-Stage Offline Controller with Active PFC
DESCRIPTION
FEATURES
The MP4078 is an single-stage offline controller
with active power factor correction (PFC) for
constant voltage output applications. The device
implements primary-side regulation (PSR)
control without requiring a secondary feedback
circuit or optocoupler for flyback applications. It
is also available for non-isolated topologies (e.g.
buck-boost).
The device achieves ultra-low standby power
consumption. Its pulse frequency modulation
(PFM) implements a minimum operating
frequency under no-load conditions. The
MP4078 works in discontinuous conduction
mode (DCM) with valley switching for improved
efficiency performance.
The MP4078 operates in constant-on-time (COT)
mode to achieve a high power factor across the
universal input. It adopts a cascode MOSFET
technique to achieve fast start-up with few
external components.
Primary-Side Control with Simple Design
and Minimal External Components
Ultra-Low No-Load Power Consumption,
Typically below 50mW with 230VAC
Good Performance on PF and THD
Fast Transient Response
Fast Start-Up
Novel Control Scheme with Continuous
Peak Current Limitation
Primary-Side Over-Current Protection
(OCP)
Output Over-Voltage Protection (OVP)
Output Short-Circuit Protection (SCP)
Brownout Protection
Thermal Shutdown
Available in an SOIC-8 Package
APPLICATIONS
The MP4078 integrates multiple protection
features that greatly enhance system reliability
and safety, including output over-voltage
protection (OVP), output short-circuit protection
(SCP), primary-side over-current protection
(OCP), and over-temperature protection (OTP).
Smart LED Lighting
Front-End Pre-Regulators
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive.
For MPS green status, please visit the MPS website under Quality
Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are
trademarks of Monolithic Power Systems, Inc. or its subsidiaries.
The MP4078 is available in an SOIC-8 package.
TYPICAL APPLICATION CIRCUIT
RMULT_UP
GATE
D
MULT
S
VCC
COMP
ZCD
GND
RSENSE
RZCD1
RZCD2
Figure 1: Isolated Flyback Application
MP4078 Rev. 1.0
7/21/2020
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1
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
ORDERING INFORMATION
Part Number*
MP4078GS
Package
SOIC-8
Top Marking
See Below
MSL Rating
2
* For Tape & Reel, add suffix –Z (e.g. MP4078GS–Z).
TOP MARKING
MP4078: Part number
LLLLLLLL: Lot number
MPS: MPS prefix
Y: Year code
WW: Week code
PACKAGE REFERENCE
TOP VIEW
GATE
1
8
D
MULT
2
7
S
VCC
3
6
COMP
ZCD
4
5
GND
SOIC-8
MP4078 Rev. 1.0
7/21/2020
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2
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
PIN FUNCTIONS
Pin #
Name
Description
1
GATE
Gate driver output for external MOSFET. The GATE pin is only used in the cascode
architecture. For a stable voltage, connect a ceramic capacitor (e.g. 0.47μF) from this pin to
ground.
2
MULT
Rectified input sensing with multiple functions. Connect MULT to the rectified input with
pull-up resistors. The MULT pin can change GATE before the MP4078 turns on. Once the
device turns on, this pin is pulled down internally and forms a resistor divider to detect the peak
rectified input voltage.
3
VCC
Power supply input. Place a bypass capacitor between VCC and GND, as close to the device
as possible.
4
ZCD
Zero-current detection with multiple functions. The ZCD pin provides output voltage
sensing for primary regulation. It is also used for zero-current detection, and can be configured
to set the maximum operating frequency.
5
GND
Ground. The current returns for both the control signal and the gate drive signal.
6
COMP
Loop compensation. The COMP pin provides loop compensation and the output of the
feedback error amplifier. Connect a compensation network between COMP and GND.
7
S
Source of internal low-side main MOSFET. Place a resistor between S and GND to sense
the peak primary current.
8
D
Drain of internal low-side main MOSFET. Connect D to the source of the external cascode
MOSFET.
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (4)
Supply voltage (VCC)…………… ...-0.3V to +28V
GATE……………………… ............-0.3V to +28V
GATE max sink current...……………………5mA
MULT……………………… ............-0.3V to +28V
MULT max sink current………………………2mA
ZCD...………………………………-0.7V to +6.5V
ZCD max source current……………………-1mA
Low-side MOSFET drain-to-source voltage
…………………………………….-0.7V to +35V
All other pins ... ……………………-0.3V to +6.5V
Continuous power dissipation (TA = 25°C) (2)
SOIC-8………………………………………..1.3W
Junction temperature ... ……………………150°C
Lead temperature . …………………………260°C
Storage temperature .. …………-65°C to +150°C
SOIC-8.………….…...…..........96.......45....°C/W
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature, TJ (MAX), the junction-toambient thermal resistance, θJA, and the ambient temperature,
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX) - TA) / θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its operating
conditions.
4) Measured on JESD51-7, 4-layer PCB.
ESD Ratings
Human body model (HBM) .................... ±1800V
Charged device model (CDM)................±2000V
Recommended Operating Conditions (3)
Supply voltage (VCC) .. ………………8.4V to 25V
Operating junction temp (TJ) …. -40ºC to +125°C
MP4078 Rev. 1.0
7/21/2020
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3
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
ELECTRICAL CHARACTERISTICS
VCC = 12V, TJ = -40°C to +125°C, min and max are guaranteed by characterization, typically tested
under 25°C, unless otherwise specified.
Parameter
Supply Voltage
Operating range
VCC upper level: internal
charging circuit stops and
the IC turns on
VCC lower level: internal
charging circuit starts
VCC hysteresis
Supply Current
Operating current
VCC charging current from
the D pin
Operating current under a
fault condition
GATE
GATE clamp voltage
MULT
MULT leakage current
MULT pull-down resistor
MULT detection time delay
Brown-in threshold
Brownout threshold
Brownout hysteresis
Brownout detection time
Symbol
Condition
Min
VCC
After turn-on
8.4
VCCH
VCC rising
9.9
VCCL
VCC falling
VCC_HYS
ICC
Max
Units
25
V
10.5
11.1
V
7.4
7.9
8.4
V
2.2
2.6
2.9
V
180
300
300
400
µA
µA
VCOMP = 0.3V
VCOMP = 3V
Typ
ID_CHARGE
VD = 16V, VCC = 9.8V
3
5
7.4
mA
IFAULT
IC latch off, VCC = 15V
200
360
500
µA
VGATE_CLAMP
IGATE = 2mA
17
18.2
19.4
V
IMULT_LEAKAGE
RMULT
tMULT_DELAY
VMULT_BI
VMULT_BO
VMULT_BO_HYS
tMULT_BO
VMULT = 15V
10
30
11
320
210
110
24
500
32.5
19.8
350
240
130
36
nA
kΩ
ms
mV
mV
mV
ms
28.5
280
180
86
19
Error Amplifier
Transconductance (5)
COMP higher clamp
voltage
COMP lower clamp
voltage
Maximum source current
Maximum sink current
COMP voltage vs. VCS_MAX
COMP voltage vs. VCS_MIN
COMP voltage vs. on-time
increasing (6)
MP4078 Rev. 1.0
7/21/2020
GEA
VCOMPH
100
4.25
4.39
V
VCOMPL
0
50
mV
ICOMP+
ICOMP-
730
900
2.85
0.9
1200
1350
3.01
1
µA
µA
V
V
VCOMP_FULL
VCOMP_MIN
VCOMP_HALF
4.07
µA/V
2.7
0.8
2.2
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V
4
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
ELECTRICAL CHARACTERISTICS (continued)
VCC = 12V, TJ = -40°C to +125°C, min and max are guaranteed by characterization, typically tested
under 25°C, unless otherwise specified.
Parameter
Current Sense Comparator
Leading-edge blanking time
Symbol
tLEB
Leading-edge blanking time for
tLEB_OCP
OCP
OCP threshold
VCS_OCP
Maximum current limit
VCS_MAX
Minimum current limit
VCS_MIN
Zero-Current Detection (ZCD) and Feedback
ZCD threshold voltage
VZCD_TH
ZCD hysteresis
VZCD_HYS
ZCD sensing delay time
ZCD turn-on delay time (6)
(6)
Minimum off time
Maximum working cycle (6)
Minimum working cycle
Condition
tZCD_DELAY
tZCD_ON
VZCD falling
After shutdown, VCS > 0.3V
After shutdown, VCS ≤ 0.3V
After ZCD falling detected
Typ
Max
Units
460
620
810
ns
340
430
660
ns
1.9
0.72
0.1
2
0.88
0.17
2.1
0.98
0.21
V
V
V
79
88
1.3
0.9
100
105
1.79
1.16
112
124
2.5
1.75
mV
mV
µs
µs
300
ns
µs
ms
9.6
14
6.5
6
11
15.3
12.7
17.5
µs
2.41
1.93
2.49
2.08
2.55
2.23
V
V
2.12
2.23
2.44
V
2.67
0.15
2.87
3.06
V
V
2.5
2.67
2.86
V
3.1
235
6
V
V
V
V
mV
ms
tOFF_MIN
tCYCLE_MAX
tCYCLE_MIN
RZCD1 // RZCD2 > 8.8kΩ
2.8kΩ < RZCD1 // RZCD2 <
3.3kΩ
Reference voltage
VREF
FB transient low trigger threshold
VFB_LOW
FB transient low recovery
VFB_LOW_REC
threshold
FB transient low hysteresis (6)
VFB_LOW_HYS Greater than VFB_LOW
FB transient high trigger threshold
VFB_HIGH
FB transient high recovery
VFB_HIGH_REC
threshold
FB transient high hysteresis (6)
VFB_HIGH_HYS Lower than VFB_HIGH
FB start-up finish threshold (5)
VFB_NORMAL
(5)
FB start-up finish hysteresis
VFB_NORMAL_HYS
Over-voltage protection threshold
VFB_OVP
Short-circuit protection threshold
VFB_SCP
Short-circuit protection duration
tSCP
Short-circuit protection duration
tSCP_STARTUP
for start-up (5)
Starter
Start timer period
tSTART
MP4078 Rev. 1.0
7/21/2020
Min
2.84
165
0.2
2.4
0.15
2.96
200
2.3
100
40
49
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ms
70
µs
5
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
ELECTRICAL CHARACTERISTICS (continued)
VCC = 12V, TJ = -40°C to +125°C, min and max are guaranteed by characterization, typically tested
under 25°C, unless otherwise specified.
Parameter
Internal Main MOSFET
Breakdown voltage
Drain-source on resistor
Leakage current on the D pin
Internal OVP Pull-Up MOSFET
Breakdown voltage
Drain-source on resistor
Thermal Shutdown
Thermal shutdown threshold (5)
Thermal shutdown hysteresis (5)
Symbol
Condition
BVDSS_MAIN
VGS = 0V
RDS(ON)_MAIN
IDS = 100mA, TA = 25°C
IDS = 100mA, TA = 125°C
IDS = 100mA, TA = 25°C,
VCC = VCCH + 50mV
IDS = 100mA, TA = 125°C,
VCC = VCCH + 50mV
Min
Typ
Max
265
370
320
430
270
330
380
440
35
V
ILEAKAGE_D
BVDSS_D_VCC VGS = 0V
RDS(ON)_D_VCC IDS = 50mA, TA = 25°C
TTSD
TTSD_HYS
Units
1
μA
300
V
Ω
28
225
160
60
mΩ
°C
°C
Notes:
5) Guaranteed by design.
6) Guaranteed by characterization.
MP4078 Rev. 1.0
7/21/2020
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6
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
TYPICAL CHARACTERISTICS
Operating Current vs. Junction
Temperature
VCC vs. Junction Temperature
450
OPERATING CURRENT (μA)
14
VCC (V)
12
10
8
VCCH
VCCL
6
4
-50
0
50
100
JUNCTION TEMPERATURE (°C)
370
290
210
50
-50
150
0
50
100
JUNCTION TEMPERATURE (°C)
150
GATE Clamp Voltage vs. Junction
Temperature
7
21
6.2
20
VGATE_ CLAMP (V)
ID_CHARGE (mA)
VCC Charging Current from the
D Pin vs. Junction Temperature
5.4
4.6
19
18
17
3.8
16
3
-50
0
50
100
JUNCTION TEMPERATURE (°C)
-50
150
Brown-In/Brownout Threshold vs.
Junction Temperature
0.5
31.5
0.4
31
0.3
0.2
0.1
0
50
100
JUNCTION TEMPERATURE (°C)
150
MULT Pull-Down Resistor vs.
Junction Temperature
RMULT (kΩ)
VMULT (V)
Icc@Vcomp=0.3V
Icc@Vcomp=3V
Ifault
130
30.5
30
29.5
VMULT_BI
VMULT_BO
0
29
-50
MP4078 Rev. 1.0
7/21/2020
0
50
100
JUNCTION TEMPERATURE (°C)
150
-50
0
50
100
JUNCTION TEMPERATURE (°C)
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7
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
TYPICAL CHARACTERISTICS (continued)
Leading-Edge Blanking Time vs.
Junction Temperature
5
800
4
700
tLEB (ns)
VCOMP (V)
COMP Voltage vs. Junction
Temperature
3
VCOMPH
Vcomp_full
Vcomp_min
2
600
500
400
1
T_LEB
T_LEB_OCP
300
0
-50
0
50
100
JUNCTION TEMPERATURE (°C)
-50
150
2.2
1.5
2.1
1.2
2
0.9
1.9
1.8
0.6
1.7
0
50
100
JUNCTION TEMPERATURE (°C)
0
150
-50
ZCD Threshold vs. Junction
Temperature
120
2.5
110
2.1
100
90
80
70
MP4078 Rev. 1.0
7/21/2020
0
50
100
JUNCTION TEMPERATURE (°C)
150
1.7
1.3
0.9
-50
0
50
100
JUNCTION TEMPERATURE (°C)
ZCD Sensing Delay Time vs. Junction
Temperature
tZCD_DELAY (μs)
VZCD_TH (mV)
Vcs_max
Vcs_min
0.3
-50
150
Current Limit Threshold vs. Junction
Temperature
VCS (V)
VCS_OCP (V)
OCP Threshold vs. Junction
Temperature
0
50
100
JUNCTION TEMPERATURE (°C)
150
Tzcd_delay@Vcs>0.3V
Tzcd_delay@Vcs≤0.3V
0.5
-50
0
50
100
JUNCTION TEMPERATURE (°C)
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8
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
TYPICAL CHARACTERISTICS (continued)
Minimum Working Cycle vs. Junction
Temperature
Reference Voltage vs. Junction
Temperature
2.53
22
2.51
Tcycle_min@Rzcd1//Rzcd2>8.8kΩ
VREF (V)
tCYCLE_MIN (μs)
Tcycle_min@2.8kΩ 0.3V
Figure 5: ZCD Sensing Delay Time
Constant-On-Time (COT) Operation
To achieve a high power factor under universal
input, the MP4078 adopts constant-on-time
(COT) control.
Figure 6 shows the internal on-time generation
block diagram.
tON
In Transient_Low Condition,
tON = tON_NORMAL x 1.5
EMI
VCOMP
Filter
RMULT_UP
VCOMP_HALF
VCOMPH COMP
MULT
Transient_Low
Reset
VMULT
UVLO
Peak
Voltage
Detection
-
RMULT
VCOMP
+
VCOMP_HALF
R
Q
S
Q
Driver
Reset
Figure 6: On-Time Generation
In normal operation, the peak voltage on the
MULT pin (VMULT) represents the input voltage,
which is converted to a charge current. This
current charges the slew rate capacitor once the
external MOSFET turns on and makes the
voltage on the capacitor increase linearly. The
voltage on the slew rate capacitor is compared
to the output of the error amplifier (VCOMP) for
feedback to determine the turn-off time for both
the internal and external MOSFETs. When the
output load decreases, VCOMP drops accordingly.
As an input of the on-time generation
comparator, the value is maintained at a certain
voltage (VCOMP_HALF) when VCOMP drops below
VCOMP_HALF. That means the on time does not
decrease with a constant input voltage.
However, it does achieve COT in a sinusoidal
period with the whole output load range.
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16
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
If VCOMP > VCOMP_HALF, the on time can be
calculated with Equation (2):
t ON
K SLEW VCOMP
VMULT
(2)
If VCOMP ≤ VCOMP_HALF, the on time is fixed, and
can be calculated with Equation (3):
t ON
K SLEW VCOMP _ HALF
(3)
VMULT
Where VMULT is the peak voltage on the MULT
pin, estimated with Equation (4):
VMULT
2 VIN _ rms RMULT
RMULT RMULT _ UP
(4)
Where VIN_RMS is the effective value of the input
voltage.
Unlike the variable frequency control of
conventional boundary conduction mode, the
MP4078 works at an approximate fixed
frequency across an input sinusoidal period. The
working cycle is inversely proportional to VCOMP,
which is determined by the output load. When
VCOMP reaches VCOMP_FULL according to the
increasing output load, the MP4078 works at its
maximum operating frequency (corresponding to
the minimum working cycle, tCYCLE_MIN). The
MP4078 lowers its operating frequency when the
output load decreases. Its maximum working cycle
(tCYCLE_MAX) guarantees output regulation under
light-load conditions, and also initiates ultra-low,
no-load power consumption.
Figure 7 shows the working cycle and turn-on
time curve.
tCYCLE
tON
Valley Switching Mode
The MP4078’s working cycle (inversely
proportional to operating frequency) is
determined by VCOMP. However, the MP4078
does not turn on the switch inflexibly when the
working cycle ends. The MP4078 optimizes its
turn-on logic with zero-current detection through
the ZCD pin.
The MP4078 has a ZCD threshold voltage
(VZCD_TH, typically 100mV). If the voltage on the
ZCD pin exceeds 205mV (105mV hysteresis on
VZCD_TH) then drops below VZCD_TH, the MP4078
recognizes this as a ZCD falling edge. After a
working cycle ends, the MP4078 monitors the
ZCD pin and turns on the switch with a delay time
(tZCD_ON, typically 300ns) since a ZCD falling
edge is detected. This decreases the switching
loss on both the external and internal MOSFETs
for high efficiency. It also guarantees
discontinuous
conduction
mode
(DCM)
operation.
Figure 8 shows the valley switching.
Valley
Switching On
VD
IP
IS
VZCD
VZCD_TH + VZCD_HYS
VZCD_TH
0V
tCYCLE_MAX
300ns
Delay
tCYCLE Determined by COMP
ZCD
tCYCLE_REAL
Figure 8: Valley Switching
tCYCLE_MIN
COMP
VCOMP_HALF
VCOMP_FULL
VCOMPH
Figure 7: Working Cycle and Turn-On Time
Curve
MP4078 Rev. 1.0
7/21/2020
If no ZCD falling edge is detected under
particular states (e.g. start-up), the MP4078
turns on the switch via an internal timer with a
fixed period (tSTART, typically 49μs), unless a fault
condition occurs.
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17
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
Adjustable Current Limitation
The MP4078 implements cycle-by-cycle current
limitation through the S pin. When the voltage on
the S pin (VCS) reaches the internal current limit,
the device immediately stops switching. Unlike a
conventional scheme with a fixed current limit,
the MP4078 adopts an optimized design to
adjust current limitation. Under light-load
conditions, the operating frequency decreases
according to VCOMP. To reduce the audible noise
influence, the current limit is kept at its minimum
value (VCS_MIN) when VCOMP drops below
VCOMP_MIN. When the output load increases, the
upper limit rises linearly and reaches its
maximum value (VCS_MAX) when VCOMP reaches
VCOMP_FULL.
Figure 9 shows adjustable current limitation.
VCS_LIMIT
VCS_MAX
VCS_MIN
VCOMP_MIN
VCOMP_FULL
VCOMPH
COMP
Figure 9: Adjustable Current Limitation
Over-Current Protection (OCP)
If there is an excessive short event or another
unexpected condition, the primary current
increases sharply out of limitation. To protect the
system from damage, the MP4078 integrates
independent over-current protection (OCP). If
VCS reaches the OCP threshold (VCS_OCP), the
MP4078 stops switching immediately and
maintains the latch-off state. The device resets
when VCC falls below VCCL, then rises up to VCCH
again.
Fast Transient Response
Due to the low bandwidth, the conventional PFC
has slow responses in transient conditions. The
MP4078 enhances the dynamic behavior of
system through the ZCD pin. In normal operation,
the device generates VFB via the sensed plateau
voltage on the ZCD pin. If the output voltage
drops and VFB falls below VFB_LOW, the MP4078
forces the on time to increase by 1.5 times tON
MP4078 Rev. 1.0
7/21/2020
under real-time VCOMP. It also immediately
pushes the operating frequency to its maximum
value. Then the output voltage stops dropping
and returns to its normal value.
If the output voltage rises and VFB exceeds
VFB_HIGH, the MP4078 immediately lowers the on
time and the operating frequency to their
minimum values. Then the output voltage stops
rising.
For smooth start-up, the MP4078 enables fast
transient response, since the output voltage is
set up and VFB exceeds VFB_NORMAL for the first
start-up.
Output Over-Voltage Protection (OVP) and
Short-Circuit Protection (SCP)
The MP4078 integrates output over-voltage
protection (OVP) and short-circuit protection
(SCP) to protect the system from damage.
Output OVP and SCP are implemented by
detecting VFB. If VFB exceeds the OVP threshold
(VFB_OVP), the MP4078 stops switching and
enters latch-off mode.
If an output short circuit occurs during normal
operation, VFB drops according to the output
voltage. If VFB falls below VFB_SCP, the MP4078
does not detect the ZCD falling edge, and works
with a start timer period (tSTART, typically 49μs). If
this conditions remains for the output shortcircuit protection duration (tSCP, typically 2.3ms),
the device recognizes an SCP condition. Then
the MP4078 stops switching and latches off.
During start-up, consider setting VFB to avoid
mistriggering SCP. To prevent a mistrigger, the
MP4078 implements an output short-circuit
protection period during start-up (tSCP_STARTUP,
typically 100ms).
The MP4078 shuts down during OVP and SCP.
It does not turn on again until the chip is reset
when VCC drops below VCCL then rises up to VCCH
again.
Brownout Protection
The MP4078 integrates brownout protection.
The device detects the peak value (VMULT) of the
divided rectified input voltage through the MULT
pin. If VMULT drops below the brownout threshold
(VMULT_BO) and lasts for a brownout-detection
time (tMULT_BO), the MP4078 recognizes the
brownout condition and shuts down the device.
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MP4078 – PSR OFFLINE CONTROLLER WITH PFC
The MP4078 is released from brownout
protection when VMULT exceeds the brown-in
threshold
(VMULT_BI)
with
a
hysteresis
(VMULT_BO_HYS).
Thermal Shutdown
To protect the chip from a thermal hazard, the
MP4078 shuts down if the junction temperature
exceeds the thermal shutdown threshold (TTSD,
typically 160°C) and indicates a fault. The
MP4078 keeps the switching off until the
following conditions are met:
The temperature drops below about 100°C
(typically a 60°C hysteresis)
VCC drops below VCCL, then rises up to VCCH
again
Then the MP4078 works normally.
MP4078 Rev. 1.0
7/21/2020
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MP4078 – PSR OFFLINE CONTROLLER WITH PFC
APPLICATION INFORMATION
Selecting the Input Capacitor
If using the MP4078 for a PFC application, do not
place a bulk capacitor after the bridge rectifier.
Place a bypass capacitor after the bridge rectifier
to filter the high-frequency switching ripple
across the rectified input voltage with twice the
AC line frequency. Under universal input
conditions, a 0.22μF to 0.47μF CBB capacitor is
recommended for a 30W output power
application.
Because there is no bulk capacitor placed at the
input, there may be notable surge protection
weakness. To improve the reliability during a
surge test without sacrificing PF or THD
performance, it is recommended to use a circuit
with few external components (see Figure 10).
DMAX
(VO VDIODE ) N
(VO VDIODE ) N 2 VIN _ RMS _ MIN
(5)
Where N is the turning ratio of the primary and
secondary winding, and VIN_RMS_MIN is the
effective value of the low-line input voltage.
The maximum turn-on time (tON_MAX) of the
primary MOSFET can be estimated with
Equation (6):
tON _ MAX DMAX tCYCLE _ MIN
(6)
Where tCYCLE_MIN is the configured minimum
working cycle.
The input power (PIN_MAX) at the low-line input
can be calculated with Equation (7):
R1
D1
(DMAX) at the peak of the low-line input voltage
can be estimated with Equation (5):
PIN _ MAX
C1
VO IO
(7)
Where IO is the rated output current, and Ƞ is the
estimated efficiency of the low-line input.
The maximum peak for the primary-side current
(IPRI_PK_MAX) can be estimated with Equation (8):
IPRI _ PK _ MAX
GATE
D
MULT
S
Selecting the Transformer
The MP4078 works in DCM due to its control
mode across the whole operating input range.
For improved efficiency in low line, it is
recommended to make the MP4078 work in an
approaching boundary conduction mode at the
peak of low-line input voltage. The duty cycle
MP4078 Rev. 1.0
7/21/2020
VIN _ RMS _ MIN DMAX
(8)
The maximum effective value of the primary-side
current (IPRI_RMS_MAX) can be estimated with
Equation (9):
IPRI _ RMS _ MAX IPRI _ PK _ MAX
Figure 10: External Circuit for Surge Protection
A larger capacitance with C1 results in improved
surge protection. It is recommended to use a 1μF
to 2.2μF electrolytic capacitor to pass EN610004-5, ±1kV level specifications. R1 is the
dissipated resistor for C1, and it is recommended
for R1 to be several hundred to thousands of kΩ.
2 2 PIN _ MAX
DMAX
6
(9)
The primary-side inductance (LM) can be
calculated with Equation (10):
LM
2 VIN _ RMS _ MIN t ON _ MAX
(10)
IPRI _ PK _ MAX
Then the required maximum area product
(APMAX) of the transformer can be calculated with
Equation (11):
APMAX
LM IPRI _ RMS _ MAX IPRI _ PK _ MAX ( DMAX 1 DMAX )
(11)
BMAX K U J DMAX
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MP4078 – PSR OFFLINE CONTROLLER WITH PFC
Where BMAX is the maximum allowable flux
density (T) (typically 0.2T to 0.3T for common
ferrite cores), KU is the window factor of the
transformer (typically 0.15 to 0.3), and J is the
current density coefficient (typically 4A/mm2 to
6A/mm2).
Choose a ferrite core with an effective area
product (APREAL) that exceeds APMAX. Calculate
the turns on the primary winding (NP) and
secondary winding (NS) with Equation (12) and
Equation (13), respectively:
NP
(12)
BMAX A E
NP
N
(13)
Where AE is the effective core area.
The auxiliary winding provides the power supply
for the MP4078 through a diode on the VCC pin
during normal operation. The auxiliary winding
(NAUX) can be estimated with Equation (14):
NAUX
VCC _ NOM VDIODE _ AUX
VO VDIODE
NS
(14)
Where VCC_NOM is the voltage on the VCC pin
during normal operation, and VDIODE_AUX is the
forward voltage of VCC diode.
Ensure the inductance leakage on the
transformer is sufficiently low. This helps to
decrease the switching spike for ZCD sensing
and EMI performance.
Selecting the External Pull-Up Resistor on
MULT
The peak voltage on the MULT pin (VMULT) is
directly related to the on time, and is determined
by the external pull-up resistor on the MULT pin
(RMULT_UP) and the internal pull-down resistor
(RMULT).
In most cases, it is recommended to match the
output of the error amplifier (VCOMP) with the
VCOMP_FULL value under full-load conditions. The
corresponding on time is the turn-on time during
full-load conditions (tON_FULL) (see Figure 11).
MP4078 Rev. 1.0
7/21/2020
tON_FULL
VCOMP_HALF VCOMP_FULL
VCOMPH
COMP
Figure 11: tON vs VCOMP
RMULT_UP can be estimated with Equation (15):
LM IPRI _ PK _ MAX
NS
tON
2 VIN _ RMS _ MIN t ON _ MAX
RMULT _ UP RMULT
1 (15)
K SLEW VCOMP _ FULL
Selecting the Current-Sense Resistor
A proper current-sense resistor both ensures
normal operation across the output load range
and implements cycle-by-cycle current limitation
to guarantee circuit reliability in the event of an
overload condition.
The current-sense resistor (RSENSE) can be
calculated with Equation (16):
RSENSE
VCS _ MAX
OL IPRI _ PK _ MAX
(16)
Where VCS_MAX is the maximum current limit
(typically 880mV), and αOL is the coefficient of the
peak primary-side current during overload (1.3 to
1.5 is typically recommended).
Selecting the External Primary MOSFET
The drain-source voltage rating and current
rating are two dominant factors to consider when
choosing the external primary MOSFET. The
maximum drain-to-source voltage (VDS_EXT_MAX)
appears at the high-line input voltage
(VIN_RMS_MAX). VDS_EXT_MAX can be calculated with
Equation (17):
VDS _ EXT _ MAX 2 VIN _ RMS _ MAX N (VO VDIODE ) VPRI _ SPIKE (17)
Where ∆VPRI_SPIKE is the turn-off spike on an
external MOSFET. This spike is caused by
parasitic parameters and the transformer’s
leakage inductance. With proper transformer
and primary snubber design, this value should
not exceed 100V in normal operation for
universal input applications.
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21
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
The maximum effective current on the drain-tosource is the maximum effective primary-side
current (IPRI_RMS_MAX) that appears at the low-line
input voltage (VIN_RMS_MIN). It can be calculated
with Equation (9).
Meanwhile, the upper ZCD resistor divider (RZCD1)
can be calculated with Equation (20):
Selecting the Secondary Rectifier
The maximum voltage across the secondary
rectifier (VSREC_MAX) also appears at the high-line
input voltage and can calculated with Equation
(18):
The down resistor of the ZCD divider (RZCD2) can
also be calculated with Equation (19).
VSREC _ MAX VO
2 VIN _ RMS _ MAX
N
VSEC _ SPIKE
(18)
Where ∆VSEC_SPIKE is the switching spike on the
secondary rectifier. It is recommended to choose
a low-voltage rectifier with a properly designed
transformer and secondary snubber for
efficiency.
For rectifier diode selection, the maximum
current rating is the maximum average forward
rectified current, which is equal to the rated
output current (IO).
Selecting the ZCD Resistor Divider
The MP4078 uses the ZCD pin for multiple
functions. Besides indicating the output voltage,
the ZCD divider also determines the initial
configuration for the minimum working cycle.
The paralleled resistance of ZCD (RZCD_PARALLEL)
must follow the required tCYCLE_MIN values (see
Table 1 on page 15). RZCD_PARALLEL can be
calculated with Equation (19):
RZCD _ PARALLEL
MP4078 Rev. 1.0
7/21/2020
RZCD1 RZCD2
RZCD1 RZCD2
R ZCD1
VO VDIODE
N
AUX
VREF RZCD _ PARALLEL NS
(20)
Selecting the Output Capacitor
To achieve a high PF, the bandwidth of the
control loop is very slow (typically below 100Hz).
This means a large voltage ripple may appear
across the output capacitor.
This ripple has two components. One is related
to the high-frequency triangles by transformer
magnetizing current , which is mostly dependent
on the ESR of the output capacitor. Another is
related to the twice line frequency envelope from
rectified input voltage, which is mostly
determined by the capacitance value.
The output ripple (ΔVO_RIPPLE) has a relationship
with the output capacitance (COUT) that can be
estimated with Equation (21):
VO _ RIPPLE IO
1
2 2fLINE COUT
2
RESR 2 (21)
Where fLINE is the frequency of the input line
voltage, and RESR is the ESR of the output
capacitor.
Use low-ESR capacitors in parallel on the output.
The high-frequency switching ripple can be
negligible.
(19)
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MP4078 – PSR OFFLINE CONTROLLER WITH PFC
PCB Layout Guidelines
PCB layout is a critical factor for stable operation
and EMI performance. For the best results, refer
to Figure 12 and follow the guidelines below:
1. Make the primary and secondary power
loops as small as possible.
2. Connect one port of the current-sensing
resistor to the ground of the input capacitor
with the shortest path possible.
Top Layer
3. Separate the reference ground of the
MP4078 and control signals circuit from the
ground of the power loop. Then connect this
signal ground to the ground of the input
capacitor with a single-point junction.
4. Make the areas of high dV/dt junctions (e.g.
the drain of the external primary MOSFET)
as small as possible. Place the MP4078 and
control circuits far away from these areas.
Bottom Layer
Figure 12: Recommended PCB Layout
5. Do not place the MP4078 inside the power
loop.
MP4078 Rev. 1.0
7/21/2020
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MP4078 – PSR OFFLINE CONTROLLER WITH PFC
EVALUATION DESIGN CIRCUIT
Figure 13: Evaluation Board Schematic
EV4078-S-00A: 90VAC to 265VAC Input, 50V/600mA Output
MP4078 Rev. 1.0
7/21/2020
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24
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
PACKAGE INFORMATION
SOIC-8
0.189(4.80)
0.197(5.00)
8
0.050(1.27)
0.024(0.61)
5
0.063(1.60)
0.150(3.80)
0.157(4.00)
PIN 1 ID
1
0.228(5.80)
0.244(6.20)
0.213(5.40)
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
SEATING PLANE
0.004(0.10)
0.010(0.25)
0.013(0.33)
0.020(0.51)
0.0075(0.19)
0.0098(0.25)
SEE DETAIL "A"
0.050(1.27)
BSC
SIDE VIEW
FRONT VIEW
0.010(0.25)
x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0o-8o
0.016(0.41)
0.050(1.27)
DETAIL "A"
MP4078 Rev. 1.0
7/21/2020
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
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MP4078 – PSR OFFLINE CONTROLLER WITH PFC
CARRIER INFORMATION
Pin1
1
1
1
1
ABCD
ABCD
ABCD
ABCD
Feed Direction
Part Number
Package
Description
Quantity/
Reel
Quantity/
Tube
Quantity/
Tray
Reel
Diameter
Carrier Tape
Width
MP4078GS–Z
SOIC-8
2500
100
N/A
13in
12mm
MP4078 Rev. 1.0
7/21/2020
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Carrier
Tape
Pitch
8mm
26
MP4078 – PSR OFFLINE CONTROLLER WITH PFC
Revision History
Revision #
1.0
Revision
Date
7/21/2020
Description
Initial Release
Pages
Updated
-
Notice: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP4078 Rev. 1.0
7/21/2020
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