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MP4655GY-Z

MP4655GY-Z

  • 厂商:

    MPS(美国芯源)

  • 封装:

    SOIC28

  • 描述:

    PURE, SINGLE-STAGE, LLC, LED CUR

  • 数据手册
  • 价格&库存
MP4655GY-Z 数据手册
MP4655 Pure, Single-Stage, LLC, LED Current and System Voltage Controller The Future of Analog IC Technology DESCRIPTION FEATURES The MP4655 is a pure, single-stage, LLC, LED current and system voltage controller for LED backlighting, especially in larger TVs, and is located on the secondary side. The MP4655 uses an LLC power stage and an extra Nchannel MOSFET to regulate both the LED current and the system supply voltage. The MP4655 is powered by input supplies ranging from 9V to 35V that output two 180 degree phase shifted driving signals for the external LLC power stages. Its enhanced 12V gate driver provides sufficient driving capability and can drive the external LLC MOSFETs directly through an external gate-driving transformer. The MP4655 also provides a direct driving signal to control the extra N-channel MOSFET and regulate the system supply voltage. • The MP4655 incorporates both PWM dimming and analog dimming for the LED current. A driving signal is output to directly drive the dimming MOSFET, which helps achieve fast and high-contrast ratio PWM dimming. The analog dimming can be achieved through a DC signal on ADIM or a pulse signal on ADIMP. • • The MP4655 employs smart protection methods to protect the LED driver stage and system power stage in the event that a fault occurs, increasing system reliability. • • • • Full protection features for the LED include open LED protection, short LED protection, over-LED current protection, feedback open loop protection, and protection for any point of the LED string shorting to ground. All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. • • • • • • • • • • • • • Pure, 1-Stage LLC for LED Current and System Supply Voltage Regulation CC/CV Frequency Control Loop and Duty Cycle Control Loop Audible Noise Elimination 9V to 35V Input Voltage Range Deep and Fast PWM Dimming Analog Dimming with DC or Pulse Input Signal Input Under-Voltage Lockout (UVLO) System Supply Over-Voltage Protection (OVP) System Supply Short Protection LED Open, LED Short Protection LED String Short to GND Protection Open Feedback Loop Protection for System Bus Voltage and LED Driver Capacitive Mode Protection for LLC Soft Switching for the Extra N-Channel MOSFET Fault Indicator Available in a SOIC-28 Package APPLICATIONS LCD TVs and Monitors Desktop LCD Flat Panel Displays Flat Panel Video Displays Street Lighting Full protection features for the system supply voltage stage include over-voltage protection (OVP), over-current protection (OCP), and feedback open-loop protection. The MP4655 uses an extra individual capacitive mode protection to protect the LLC power stage in any condition system in the event it enters capacitive mode. The MP4655 also employs thermal shutdown and is available in a SOIC-28 package. MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 1 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER TYPICAL APPLICATION VSystem D5 Cb PFC_400V D2 D1 Cr C1 M2 400V LLC AUX winding, reinforced wire C4 D6 TM M1 C3 DCDC C2 D3 D4 TDrive Drive circuit MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 2 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER ORDERING INFORMATION Part Number* MP4655GY Package SOIC-28 Top Marking See Below *For Tape & Reel, add suffix –Z (eg. MP4655GY–Z) TOP MARKING MPS: MPS prefix YY: Year code WW: Week code MP4655: Product code of MP4655GY LLLLLLLLL: Lot number PACKAGE REFERENCE TOP VIEW VDR_DN 1 28 CFLY GATEN 2 27 GR SOURCE 3 26 GND FTH_CMODE 4 25 GL CMODE 5 24 DIMO SS 6 23 VCC VOCP 7 22 PS_ON FSET 8 21 VIN VCOMP 9 20 PWMIN VFB 10 19 ADIM DCOMP 11 18 ADIMP IFB 12 17 EN_LED ICOMP 13 16 VLED2 IOCP/FAULT 14 15 VLED1 MP####_PD01-SOIC28 -or- TSSOP28 SOIC-28 MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 3 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VIN, PS_ON, PWMIN .....................-0.3V to 40V GL, GR, VCC, DIMO, CFLY............-0.3V to 18V SOURCE ........................................-0.3V to 30V VDR_DN, GATEN...........................-0.3V to 48V VDR_DN - SOURCE, GATEN - SOURCE………. ........................................................-0.3V to 18V IOCP/FAULT, VOCP, CMODE .........-6.5V to 6V Other pins ......................................-0.3V to 6.5V Junction temperature ................................150°C (2) Continuous power dissipation (TA = +25°C) SOIC-28 ..................................................... 2.1W Storage temperature ................ -65°C to +150°C Operating frequency .............................. 400kHz SOIC-28 ................................. 60 ...... 30... °C/W Recommended Operating Conditions (4) θJA θJC NOTES: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. (3) Supply voltage (VIN) ........................-0.3V to 35V Operating frequency ............... 20kHz to 350kHz Operating junction temp. ......... -40°C to +125°C MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 4 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER ELECTRICAL CHARACTERISTICS VIN = 13V, TA = +25°C, unless otherwise noted. Parameter Symbol Condition VIN Supply VIN supply range Quiescent current IQ VVCC PS_ON = 5V, no gate driver PS_ON = 1.5V PS_ON = 0V Igate = 20mA Igate = 20mA With 1nF load With 1nF load 400 IVCC = 0mA IVCC = 30mA IVCC = 50mA IVCC = 50mA, VIN = 10V VCC rising Voltage dropout VCC UVLO threshold VTH_UVLO_VCC VCC UVLO hysteresis VTH_VCC_HYST Gate Driver (GATEN, for Extra MOSFET on Vsystem) GATEN pull-down resistance RGD Igate = 20mA GATEN pull-up resistance RGU Igate = 20mA Output source current ISOURCE_GATEN With 1nF load Output sink current ISINK_GATEN With 1nF load GATEN Supply Voltage (VDR_DN) Charge pump pull-up resistor Charge pump pull-down resistor Charge pump frequency fchargepump VDR_DN upper threshold to Detection circuit, stop charge pump in standby Vth_upper_STB very small leakage mode VCC - 5.5 > 5V VDR_DN valley threshold to recover charge pump in standby mode Vth_valley_STB Leakage current from SOURCE Ilkg_SOURCE MP4655 Rev 1.0 2/2/2016 Typ Max Units 35 V 1.6 1.9 mA 106 0.6 120 0.8 μA mA 800 Ω Ω A A ns 9 Shutdown current Ishutdown Standby current ISTB Gate Driver GL, GR (LLC Power Stage) Gate pull-down resistance RGD Gate pull-up resistance RGU Output source current ISOURCE Output sink current ISINK Dead time tdead Gate Driver Supply Voltage (VCC) Voltage Min VCC - 5.5 < 5V 11.5 11.3 11.2 7.2 1.8 2 8 0.5 (5) 1 (5) 600 12.5 12.3 12.2 0.53 7.74 2.05 13.5 13.3 13.2 8.2 2.3 V V V V V V 2.5 9 0.5 (5) 1 (5) Ω Ω A A 13 4 455 Ω Ω kHz VCC 2.5 V VCC 5.5 V 5 VSOURCE = 24V, charge pump disabled www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 0.2 μA 5 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER ELECTRICAL CHARACTERISTICS (continued) VIN = 13V, TA = +25°C, unless otherwise noted. Parameter Analog Dimming Analog dimming full scale Dimming linearity Dimming linearity Dimming linearity Dimming linearity ADIMP logic high ADIMP logic low ADIMP pull-up resistor ADIMP disable threshold PWM Dimming PWM logic high threshold PWM logic input hysteresis Operating Frequency Minimum frequency set voltage Symbol VADMAX VIFB_ADIM VIFB_ADIM VIFB_ADIM VIFB_ADIM VADIM_PHI VADIM_PLO RADIM_P_UP Condition Min Typ Max Units VIFB = 200mV VADIM = 1.2V VADIM = 0.8V VADIM = 0.3V VADIM = 0.1V 2.32 2.39 100 66.8 25 8.5 2.46 V mV mV mV mV V V MΩ V 1.8 1.5 4.7 VTH-PWM VTH-PWM-Hyst VFSET Minimum operating frequency Fmin_op Maximum operating frequency Fmax_op PWM dimming PWM dimming 1.4 17 0.6 2 V V IFB = 0.1V, PWMIN = high 1.65 RFSET = RSS_FSET = 300kΩ, IFB = 0.1V, PWMIN = high RFSET = RSS_FSET = 300kΩ, IFB = 0.21V, PWMIN = high 1.73 1.83 V Output PWM Dimming Signal for LED (DIMO) Logic high voltage VH-DIMO Normal operation At fault condition, Logic low voltage VL-DIMO or PWMIN is low 20mA drive source current DIMO up-side resistance for design 100mA drive sink current DIMO low-side resistance for design LED Stage Enable (EN_LED) EN_LED logic high threshold VTH-EN_LED EN_LED rising EN_LED logic input hysteresis VTH-ENLED-Hyst IC Enable Signal (PS_ON) Threshold for IC standby Vth_PS_ON_STB MP4655 Rev 1.0 2/2/2016 Rising edge Vth_PS_ON 42.5 kHz 130 kHz 12.5 V 0.1 V 62 Ω 7 Ω 1.4 1.7 0.6 2 V V 0.7 0.8 0.9 V Vth_PS_ON_STB < VPS_ON < Vth_PS_ON Duration time to shut down IC Threshold to turn on IC to operate normally 3.5 0.9 1 1.9 2 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. ms 2.1 V 6 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER ELECTRICAL CHARACTERISTICS (continued) VIN = 13V, TA = +25°C, unless otherwise noted. Parameter Symbol Capacitive Mode Detection (CMODE) CMODE detection high Vth_Cmode_H threshold CMODE detection low Vth_Cmode_L threshold FTH_CMODE voltage VFth_Cmode CMODE threshold frequency Fth_cmode Soft Start (SS) Soft-start final voltage VSS Condition Min Isat_I Units 0.97 VREF_VFB At GR falling edge 0.03 VREF_VFB 1.15 1.2 91 1.25 2.34 2.405 2.47 150kΩ on FTH_CMODE Normal operation after start-up VSS = 1V 30 Low-level clamp voltage VICOMP_L Normal operation 0.97 High-level clamp votlage VICOMP_H Normal operation 2.2 Output for System Voltage Feedback (VFB) Reference voltage VREF_VFB 1.17 Leakage current Ilkg_VFB Normal operation Internal Voltage Loop Compensation Transconductance Op-Amp (VCOMP) Low-level clamp voltage VVCOMP_L Normal operation 0.97 High-level clamp votlage VVCOMP_H Normal operation 2.2 Transconductance Gm_V Saturated output current Isat_V 30 MP4655 Rev 1.0 2/2/2016 Max At GL falling edge Soft-start current ISS Discharge current when VSS = 2V ISS_Discharge capacitive mode detected Pull low resistor at latch-up LED Current Feedback (IFB) Magnitude |VIFB| 0.188 LED short threshold for 490 VIFBS immediate action LED short detection delay time TblankTdelay LED short threshold for slow 370 VIFBSC action Delay time for slow action Tdelay_IFB 400mV < VIFB < 600mV 250 Threshold for short protection ICOMP saturated Duration for short protection Internal Current Loop Compensation Transconductance Op-Amp (ICOMP) Transconductance Gm_I Saturated output current Typ V kHz 13 μA 3 ISS 120 Ω 0.199 0.21 V 555 610 mV 6 us 415 460 mV 340 50% 1024 450 μs VIFB_REF (6) cycle 840 μA/V 50 70 μA 1.02 2.28 1.07 2.36 V V 1.2 0.33 1.23 V μA 1.02 2.28 150 50 1.07 2.36 V V μA/V μA www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 70 7 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER ELECTRICAL CHARACTERISTICS (continued) VIN = 13V, TA = +25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units Internal Voltage Loop Compensation Transconductance Op-Amp for Extra MOSFET Control (DCOMP) Normal operation, Low-level clamp voltage VDCOMP_L 0.41 V VOCP = 0V Normal operation, High-level clamp votlage VDCOMP_H 2.1 V VOCP = 0V Transconductance Gm_DCOMP 150 μA/V Saturated output current Isat_DCOMP 30 50 70 μA Bus Voltage Stage Current Detection (VOCP) VOCP detection threshold VTH_VOCP -230 -203 -176 mV VOCP delay time TD_VOCP OCP < -200mV 7 µs Over LED Voltage Protection (VLED1, VLED2) Over LED voltage protection 2.33 2.41 2.49 V VTH_OVP_LED threshold Over LED voltage delay time Tdelay_VLED 8 μs Gain of differential voltage 14 16. 18 protection Internal resistance RVLED 16 20 24 kΩ Over LED voltage to latch up 2.85 3 3.15 V VTH_OVP_LED_latch LLC Duration time to latch up 7.6 μs Burst Mode (Pulse Skipping) Threshold at Normal Operation (VCOMP, ICOMP, VFB, IFB) VCOMP threshold for burst PS_ON = H, VTH_burst_VCOMP 1.05 1.1 1.15 V mode VFB > 1.05VREF_VFB VCOMP hysteresis for burst PS_ON = H 80 100 120 mV mode VFB threshold for burst mode VTH_burst_VFB PS_ON = H 1.05 VREF_VFB VFB reset threshold for burst 0.95 VREF_VFB VTH_reset_burst_VFB PS_ON = H mode ICOMP threshold for burst PS_ON = H, 1.05 1.12 1.18 V VTH_burst_ICOMP mode VIFB > 1.08VIFB_REF ICOMP hysteresis for burst 100 mV mode IFB threshold for burst mode VTH_burst_IFB PS_ON = H 1.08 VIFB_REF(6) IFB reset threshold for burst VTH_reset_burst_IFB PS_ON = H 0.92 VIFB_REF(6) mode MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 8 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER ELECTRICAL CHARACTERISTICS (continued) VIN = 13V, TA = +25°C, unless otherwise noted. Parameter Symbol Condition Burst Mode (Pulse Skipping) Threshold in Standby Mode (VCOMP, VFB) VFB threshold to stop gate driver VFB threshold to recover gate driver PS_ON < 0.7V, FSET voltage at standby mode VFSET _STB VFB = 0.8 * VREF_VFB VSS low clamp value VSS soft-on recovery current VSS soft-off recovery current System Voltage Protection (VFB) Overbus voltage protection VTH_OVP_VFB threshold Delay time Min VFB > 1.5V VFB open protection threshold VTH_Open_VFB VCOMP saturated at PWM Duration time for VFB open off or DCOMP saturated at protection PWM ON LED Stage Over-Current Detection (IOCP/FAULT) IOCP threshold VTH_IOCP IOCP detection delay time TD_IOCP IOCP < -310mV LED driver stage IOCP duration time to latch up protection triggered and LLC IOCP < -300mV Pin floated, fault condition Amplitude of output fault signal VFault ISOURCE = 10mA Pull-up resistance at fault condition Source current of ICOP at normal operation -360 Typ Max 1.05 VREF_VFB 0.95 VREF_VFB 2.1 V 0.91 100 100 V µA µA 1.25 VREF_VFB 7 µs 50% VREF_VFB 512 cycles -320 7 -280 270 3.2 Units 3.4 5 mV µs µs 3.6 V 0.3 kΩ µA NOTES: 5) The parameters are tested on the bench with several parts. 6) VIFB_REF is the reference voltage for IFB. Its value changes according to the ADIM signal. MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 9 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER TYPICAL CHARACTERISTICS Quiescent Current vs. Supply Voltage 6 Supply Current vs. Operating Frequency 45 IQ (mA) 5.8 5.7 5.6 5.5 5.4 5.3 5.2 0 5 10 15 20 INPUT VOLTAGE(V) 40 35 30 25 20 15 10 5 0 25 VCC (V) SUPPLY CURRENT (mA) 5.9 0 VDRN Drive Capability 14 1.7 12 1.65 50 100 150 200 250 300 OPERATING FREQUENCY(kHz) Quiescent Current vs. Temperature 0 20 40 60 80 100 120 VCC LOAD CURRENT (mA) Shutdown Current vs. Temperature 106 104 1.6 IQ (mA) 8 6 100 1.55 98 96 1.5 4 94 1.45 2 0 0.63 92 1.4 -50 0 10 20 30 40 VDRN LOAD CURRENT (mA) Standby Current vs. Temperature 7.76 0 50 90 -50 100 VCC UVLO vs. Temperature 0.6 0.59 0.58 0.57 0.56 0.55 0.54 0.53 -50 MP4655 Rev 1.0 2/2/2016 0 50 100 100 2.13 7.74 7.72 7.7 7.68 7.66 7.64 -50 50 2.135 V_FSET_STB (V) VCC_UVLO_RISING (V) 0.61 0 FSET Voltage at Standby Mode vs. Temperature 0.62 I_STANDBY (mA) 11.95 11.9 11.85 11.8 11.75 11.7 11.65 11.6 11.55 11.5 11.45 11.4 102 10 VDRN (V) VCC Drive Capability 2.125 2.12 2.115 2.11 2.105 0 50 100 2.1 -50 0 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 50 100 10 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER TYPICAL CHARACTERISTICS (continued) CMODE High-Level Threshold Voltage vs. Temperature 0.047 1.17 VTH_CMODE_L(V) 1.168 1.166 1.164 1.162 2.406 0.045 2.404 0.044 0.043 0.042 1.158 -50 0 50 ICOMP High-Level Clamp Voltage 2.398 0 50 2.392 -50 100 VCOMP High-Level Clamp Voltage 2.285 -0.2024 2.28 2.28 -0.2026 V_VCOMP_H(V) 2.285 2.27 2.265 2.255 -50 0 50 2.275 2.27 VLED OVP Threshold Voltage vs. Temperature 2.26 -0.2034 1.504 2.415 50 -0.2036 -50 100 VFB OVP Threshold Voltage vs. Temperature -0.309 1.501 1.5 1.499 1.498 1.497 1.496 MP4655 Rev 1.0 2/2/2016 0 50 100 1.494 -50 -0.31 -0.311 -0.312 -0.313 -0.314 1.495 2.395 -50 100 -0.308 VTH_IOCP(V) VTH_OVP_VFB(V) 2.4 50 -0.307 1.502 2.405 0 IOCP Threshold Voltage vs. Temperature 1.503 2.41 -0.203 -0.2032 0 100 -0.2028 2.265 2.255 -50 100 50 -0.2022 2.29 2.275 0 VOCP Threshold Voltage vs. Temperature 2.29 2.26 VTH_OVP_LED1(V) 2.4 2.394 0.04 -50 100 2.402 2.396 0.041 1.16 V_ICOMP_H(V) 0.046 VTH_VOCP(V) VTH_CMODE_H(V) 1.172 2.408 V_SS(V) 1.174 CMODE Low-Level Threshold VSS Voltage vs. vs. Temperature Temperature 0 50 100 -0.315 -50 0 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 50 100 11 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER TYPICAL CHARACTERISTICS (continued) 1.201 0.1995 1.2 0.199 1.199 0.1985 V_IFB(V) VVFB_REF(V) VFB Reference Voltage vs. Temperature 1.198 MP4655 Rev 1.0 2/2/2016 0.198 0.1975 1.197 1.196 -50 IFB Reference Voltage vs. Temperature 0 50 100 0.197 -50 0 50 100 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 12 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board of the Design Example section. 400Vbus = 390V, VLED = 130V, ILED = 375mA*2 strings, System output = 13.5V/6.5A, TA = 25°C, unless otherwise noted. 370.5 13.62 CC LOOP 13.61 13.54 13.6 13.535 13.59 13.58 13.56 4 6 VBUS LOAD CURRENT(A) 13.53 8 LED Current Cross Regulation at 50% Analog Dimming 369 368.5 368 0 0.2 0.4 0.6 0.8 1 PWM DIMMING DUTY 1.2 LED Current PWM Dimming Linearity 800 800 700 700 600 500 400 300 200 0 1 2 3 4 5 6 VBUS LOAD CURRENT(A) 0 7 600 500 400 300 200 100 100 Standby Power Consumption STANDBY POWER CONSUPTION 13.51 13.505 0 100 200 300 400 500 600 700 800 LED CURRENT(mA) LED Current Analog Dimming Linearity LED CURRENT(mA) LED CURRENT(mA) 369.5 13.52 13.515 13.55 13.54 2 13.53 13.525 13.57 370 367.5 VBUS Voltage Cross Regulation at Analog Dimming 13.545 VBUS VOLTAGE(V) CV LOOP VBUS Voltage Cross Regulation at PWM Dimming LED CURRENT(mA) 13.62 13.61 13.6 13.59 13.58 13.57 13.56 13.55 13.54 13.53 13.52 13.51 0 VBUS VOLTAGE(V) VBUS VOLTAGE(V) VBUS Voltage Load Regulation 0 0 0.5 1 1.5 2 2.5 ADIM VOLTAGE(V) 3 0 Standby Mode Opeartion 20 40 60 80 100 120 Standby Mode Opeartion 450 400 350 I OUT=14.8mA(P OUT=200mW) 300 250 200 I OUT=7.8mA(P OUT=104mW) 150 100 50 0 I OUT=0(P OUT=0) 0 MP4655 Rev 1.0 2/2/2016 100 200 AC INPUT VOLTAGE(V) VGL 10V/div. VGL 10V/div. VBUS 10V/div. VBUS 10V/div. VSS 2V/div. VSS 2V/div. IPRI 2A/div. IPRI 2A/div. 300 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 13 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Design Example section. 400Vbus = 390V, VLED = 130V, ILED = 375mA*2 strings, System output = 13.5V/6.5A, TA = 25°C, unless otherwise noted. Normal Operation PSON Start-Up PWM Dimming PWM=High 50% VGL 10V/div. VGL 10V/div. VGATEN 20V/div. VCOMP 1V/div. VBUS 10V/div. IPRI 2A/div. VBUS 10V/div. IPRI 2A/div. Open LED Protection VGL 10V/div. VICOMP 1V/div. VBUS 10V/div. ILED 500mA/div. Short LED+ to LED- Short LED+ to GND VGL 10V/div. VGL 10V/div. VGL 10V/div. VFAULT 2V/div. VBUS 10V/div. VBUS 10V/div. VLED 50V/div. ILED 500mA/div. VLED 50V/div. ISHORT 10A/div. VFAULT 5V/div. ISHORT 10A/div. VBUS OVP Protection Short VBUS to GND VGL 10V/div. VGL 10V/div. VBUS 10V/div. VBUS 10V/div. VFAULT 5V/div. ISHORT 10A/div. VFAULT 5V/div. ILED 10A/div. MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 14 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER PIN FUNCTIONS Pin # Name 1 VDR_DN 2 GATEN 3 SOURCE 4 5 6 7 8 9 10 11 12 Description Drive voltage for the extra MOSFET. VDR_DN is formed by the charge pump and is referred to SOURCE. Gate of the extra N-channel MOSFET. Source of the extra N-channel MOSFET. FTH_CMODE sets the threshold frequency to shut down the LLC when capacitive mode is detected. Its typical voltage is 1.2V. The sourcing current through FTH_CMODE determines the threshold frequency. When capacitive mode is detected, FTH_CMODE the IC discharges SS and increases the operating frequency. If the operating frequency is higher than this threshold frequency when capacitive mode is detected, the IC latches up LLC and the IOCP/FAULT signal output is high. Detection of capacitive mode. The secondary side winding voltage is fed back on CMODE CMODE for capacitive mode detection. Soft start. SS functions as a soft start and also sets the operating frequency together with FSET. Connect a capacitor from SS to GND to set the soft-start time. An internal SS 10µA sourcing current charges this capacitor to 2.4V at soft start. Connect a resistor between SS and FSET to set the operating frequency together with the resistor from FSET to GND. Over-current protection of the system bus voltage stage. VOCP senses the secondary current of the system bus voltage stage. When VOCP is lower than -203mV, VOCP the IC triggers a bus stage protection. VOCP is also used for the inner current control loop for the bus voltage compensation to control the extra MOSFET duty cycle. Frequency set. Connect a resistor from FSET to GND, and another resistor between FSET and SS. The operating frequency is determined by the sourcing current through FSET FSET. The voltage of FSET and the operating frequency are programmed by the current control loop and the voltage control loop. Feedback compensation node of the voltage control loop. Connect a compensation VCOMP capacitor or an R-C network from VCOMP to GND. The VCOMP voltage is internally clamped between 1.02V and 2.28V, which limits the operating frequency range. Bus voltage feedback. VFB feeds back the bus voltage for regulation. Its inner reference voltage is 1.2V. VFB is also used for over-voltage protection of the bus voltage stage. When VFB exceeds 1.5V, the over-voltage protection of the bus voltage VFB stage is triggered. VFB also functions as the open feedback loop protection. If VFB is lower than 50% of its reference voltage and VCOMP or DCOMP is saturated for 512 cycles, the IC triggers the bus voltage stage protection. Feedback compensation node of the voltage control loop. DCOMP is used to DCOMP program the duty cycle of the extra N-channel MOSFET. Connect a compensation capacitor or an R-C network from DCOMP to GND. LED current feedback input. IFB feeds back the LED current through a sensing resistor. The internal error amplifier sinks a current from ICOMP proportional to the absolute value of the voltage at IFB. The average voltage at IFB is regulated to the reference voltage (controlled by the ADIM voltage, 199mV when ADIM is high). The IFB voltage on IFB is also used for LED over-current detection. When the voltage on IFB rises higher than 415mV for 340μs or when the voltage rises higher than 555mV, the IC triggers the LED stage protection. IFB also functions as the LED current open feedback loop protection. If the IFB voltage is lower than 50% of its reference voltage and the ICOMP is saturated for 1024 cycles, the IC triggers the LED stage protection. MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 15 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER PIN FUNCTIONS (continued) Pin # Name 13 ICOMP 14 IOCP/FAULT 15 VLED1 16 VLED2 17 EN_LED 18 ADIMP 19 ADIM 20 PWMIN 21 VIN Description Feedback compensation node of the current control loop. Connect a compensation capacitor or an R-C network from ICOMP to GND. The ICOMP voltage is internally clamped between 1.02V and 2.28V, which limits the operating frequency range. ICOMP also functions as the short LED to GND protection. When ICOMP is saturated and the IFB voltage is lower than 50% of the reference current for 1024 cycles, IC uses it as the fault condition and triggers an LED fault protection. LED stage over-current protection and fault indicator. IOCP/FAULT feeds back the secondary side current of the LED driver stage. When the voltage on IOCP/FAULT is less than -320mV for 7μs, the IC disables the output of the DIMO signal. After 270μs, the IC outputs the fault indicator. If the IOCP voltage is always lower than -320mV for 270μs, the IC latches up the LLC. Voltage feedback of LED string 1. VLED1 and VLED2 cooperate for the protection of the LED driver stage. The maximum voltage and the voltage difference among VLED1 and VLED2 are detected and used for LED stage protection. For 1-string applications, connect VLED1 and VLED2; for two-string applications, feed back the LED strings voltages to VLED1 and VLED2; for applications with more than two strings, feed back the maximum voltage of the LED strings and the minimum voltage of the LED strings to VLED1 and VLED2. Voltage feedback of LED string 2. The enable signal for the LED driver. Logic high enables the LED stage; logic low disables the LED stage. The pulse input signal for analog dimming. The duty cycle 0 to 100% of this pulse signal programs the amplitude of the LED current from 0 to 100%. Place a 100nF capacitor from ADIM to GND for this type of dimming. If this dimming is not being used, pull it high to VCC through a 100k resistor or leave it open. Analog dimming input with DC voltage. The LED current is set by 0~2.4V from 0 to 100%. ADIMP should be disabled if using this DC input analog dimming. If this dimming is not being used, pull it high to VCC through a 100kΩ resistor. PWM dimming control input. Apply a 100Hz to 2kHz PWM signal to PWMIN for PWM dimming. Supply input. Bypass VIN with a ceramic capacitor larger than 0.1μF. On/off signal for the system power supply. PS_ON is the enable signal for the IC. This signal determines the operation mode of the IC. If PS_ON is less than 0.8V, the IC works in standby mode. IC operates in deep burst mode, and the system bus voltage is controlled with a larger ripple voltage to decrease the power consumption. If PS_ON is greater than 0.8V but less than 2V and this saturation lasts for 1ms, the IC shuts down. If PS_ON is greater than 2V, the IC works in normal operation mode. Power supply for the gate driver of the LLC MOSFETs and internal circuit. Bypass VCC to GND with a ceramic capacitor larger than 1μF. 22 PS_ON 23 VCC 24 DIMO Output of the driving signal for the dimming MOSFET. 25 GL LLC driving signal output. 180 degree phase shift of GR. 26 GND 27 GR 28 CFLY MP4655 Rev 1.0 2/2/2016 Ground reference. LLC driving signal output. 180 degree phase shift of GL. Output of the pulse signal for the charge pump. Connect a flying cap higher than 100nF of the charge pump to CFLY. Please refer to the typical application circuit for connection details. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 16 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER BLOCK DIAGRAM EN_IC L for 1ms: disable IC 2V STBI (L: standby mode) 0.8V PS_ON2V, normal operation mode 0.8V 2V: the IC is enabled in normal operation mode. 2. 0.8V < PS_ON ≤ 2V for 1ms: the IC is disabled and no circuits work. 3. PS_ON ≤ 0.8V: the IC is enabled in standby mode. It is very easy to set up the system connection, whether the MP4655 is required to do so in standby or not. When the MP4655 is enabled and the VIN supply is higher than its UVLO threshold, VCC is charged up. When VCC passes its UVLO threshold, the IC starts up. The voltage resets the control loop for LLC frequency control, voltage control loop for the extra N-channel MOSFET duty cycle control, and the soft-start capacitor. EN_LED and PWMIN control the start-up of the LED driver stage. If either EN_LED or PWMIN are low, the LED driver stage is disabled and DIMO is pulled low. The system operates in constant voltage mode, and VSystem is regulated through the LLC frequency control. The extra Nchannel MOSFET is on in this condition. If either EN_LED or PWMIN are high, the LED driver www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 18 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER stage is enabled and DIMO rises high. The LED current is regulated through the LLC frequency control, and the VSystem is regulated through the duty cycle control of the extra N-channel MOSFET. Standby Mode with Low Consumption Power and No Audible Noise The MP4655 features a standby mode with low consumption power on the LLC power stage. When PS_ON ≤ 0.8V, the MP4655 enters standby mode, regardless of the status of the LED driver stage control signals. In standby mode, the LED stage is disabled, VSystem is controlled through the LLC frequency control, and the extra N-channel MOSFET is on. The MP4655 takes the following actions to decrease the system power consumption: 1. VSystem is controlled within ± 5% and the circuit works in soft-burst mode. The VFSET voltage is clamped at 2.1V, so the switching frequency at burst mode is not too high. Power consumption is decreased in this mode. A soft burst-on time and soft burst-off time are added to the burst mode to eliminate audible noise (see Figure 3). The MP4655 accurately regulates both the LED current and the output system voltage with only one LLC power stage. In PWM dimming off condition, the LED stage is not enabled (PWMIN is low, EN_LED is not enabled, or LED stage fault detected). The MP4655 regulates the output system voltage through the LLC frequency control, and the extra N-channel MOSFET is on (see Figure 4A). In PWM dimming on condition, the MP4655 regulates the LED current through the LLC frequency control, and regulates the output system voltage through the duty cycle control of the extra N-channel MOSFET. The integrated individual control for this extra N-channel MOSFET achieves soft switching, and there is no voltage spike (see Figure 4B). Figure 4A: MP4655 Control Scheme at PWM Dimming Off 2. The charge pump for VDR_DN works in burst mode, and VDR_DN is controlled with a larger ripple voltage. This decreases the IC consumption current. 3. The internal logic circuit consumption current is decreased. +5% The regulation for the LED current and system voltage at different conditions is as follows: +5% 1. LED current regulation at PWM dimming on (ICOMP loop) -5% 94uA charge First pulse GL: 50% width Figure 4B: MP4655 Control Scheme at PWM Dimming On 94μA discharge First pulse GL: 50% width Figure 3: LLC Soft-Burst Operation at Standby Mode For the LED current regulation loop with LLC frequency control, the LED current is fed back to IFB. The internal error amplifier regulates the average value of IFB signal to the internal 199mV reference voltage. Its output is connected to the external current-loop compensation network on ICOMP through an inner switch (S1). During the PWM on interval, S1 is on, and the output of the error amplifier is connected to the external compensation network on ICOMP. The LED Current and System Voltage Regulation MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 19 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER LED current is regulated by this control loop and the LLC operating frequency is programmed by the ICOMP voltage. During the PWM off interval, S1 is turned off, and the compensation network on ICOMP is disconnected from the error amplifier and holds its value until the next PWM on interval. The MP4655 integrates burst mode for the LED current regulation. When the IFB voltage is higher than 1.08 times its reference voltage and the ICOMP voltage is low enough (which means it is at its highest operating frequency), the IC skips some switching cycles until the IFB voltage decreases sufficiently. 2. Output system voltage regulation at PWM dimming off (VCOMP loop) For the system voltage regulation loop, the output system voltage is fed back to VFB. During the PWM off interval, the MP4655 regulates the system voltage through the LLC frequency control, and the extra N-channel MOSFET is on. The internal voltage-loop error amplifier regulates the average value of the VFB voltage to the reference voltage (VREF). Its output is connected to the external voltage-loop compensation network on VCOMP through an inner switch S2. During the PWM off interval, S2 is on, and the output of the voltage-loop error amplifier is connected to the external compensation network on VCOMP. The output system voltage is regulated by this control loop and the LLC operating frequency is programmed by VCOMP. During the PWM on interval, S2 is turned off, and the compensation network on VCOMP is disconnected from the error amplifier and holds its value until the next PWM off interval. The MP4655 also integrates burst mode for voltage regulation with the LLC frequency control through the VCOMP loop. When VFB is higher than 1.05 times the reference voltage and VCOMP is sufficiently low (which means a high LLC operating frequency), the IC skips some switching cycles until VFB voltage decreases sufficiently. The LLC operating frequency is controlled by the output of the current loop error amplifier on ICOMP at PWM dimming on and is controlled by the voltage loop error amplifier on VCOMP at MP4655 Rev 1.0 2/2/2016 PWM dimming off. A higher compensation output voltage results in a lower operating frequency. 3. Output system voltage regulation at PWM dimming on (DCOMP loop) During the PWM on interval, the LLC frequency control regulates the LED current, and the output system voltage is regulated through the duty cycle of the extra N-channel MOSFET. The output system voltage is fed back on VFB, and the internal error amplifier regulates its average value to its reference voltage (VREF). The output of this error amplifier is connected to DCOMP through an inner switch (S3). S3 is on during the PWM on interval, and the output of this error amplifier is connected to the DCOMP compensation network. Together with slope compensation, the DCOMP voltage is compared with the current through the output system voltage stage, which is fed back to VOCP and determines the duty cycle of the extra N-channel MOSFET. The duty cycle of this extra N-channel MOSFET can achieve a 0 to 100% range. The MP4655 integrates individual controls on the extra N-channel MOSFET and achieves soft switching with no voltage spike. During the PWM off interval, S3 is disconnected and DCOMP holds its voltage until the next PWM on interval. The extra N-channel MOSFET is forced on during the PWM off interval. Both the LED current and output system voltage are accurately regulated at PWM dimming on and PWM dimming off. ICOMP, VCOMP, or DCOMP holds its voltage when its loop is not effective. This achieves a fast transition between different compensation loops at PWM dimming. Together with the external dimming MOSFET, which holds the LED output voltage during the PWM off interval, both the LED current and output system voltage are regulated accurately and smoothly at PWM dimming. No voltage ripple or LED current overshoot or undershoot is caused by PWM dimming. Dimming Control The MP4655 provides two dimming methods: PWM dimming mode and analog dimming mode. Applying a digital PWM signal on PWMIN allows for PWM dimming. The brightness of the LED string is proportional to the duty cycle of the external PWM signal. A driving signal on DIMO is www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 20 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER output to drive the dimming MOSFET directly, which helps achieve fast and high-contrast ratio PWM dimming. The MP4655 achieves a 1000:1 PWM dimming ratio at 200Hz PWM dimming frequency (0.1% minimum PWM dimming duty). The PWM dimming ratio may decrease with a higher PWM dimming frequency. For analog dimming mode, a DC voltage on ADIM or a pulse signal on ADIMP can be used. For DC input analog dimming, apply a DC analog signal from 0V to 2.4V on ADIM to dim the LED current amplitude from 0 to 100%. ADIMP can be left open or pulled high to VCC through a 100kΩ resistor in this mode. For analog dimming with a pulse input signal, apply the pulse signal on ADIMP and a 100nF capacitor on ADIM, depending on the frequency of this pulse signal. The duty cycle of this pulse signal from 0 to 100% dims the LED current from 0 to 100%. The PWM dimming and analog dimming could be applied to the IC simultaneously for an extra dimming ratio. Protection Features The MP4655 integrates sufficient protection for the LLC power stage, the output system voltage stage, and the LED driver stage. Capacitive Mode Protection for the LLC Power Stage The MP4655 integrates individual capacitive mode protection for the LLC power stage by detecting the secondary side signal. Feed back the secondary side winding voltage to CMODE for capacitive mode protection. When capacitive mode is detected, the MP4655 discharges the SS voltage and increases the LLC operating frequency. If the capacitive mode is still detected when the operating frequency is higher than the threshold frequency setting by FTH_CMODE, the IC latches up and outputs a high fault indicator. System Voltage Stage Protection The protections for the system voltage stage include over-system voltage protection, short protection, and open-feedback loop protection. 1. Over-system voltage protection MP4655 Rev 1.0 2/2/2016 VFB senses the output system voltage for regulation and over-voltage protection. If the VFB voltage is higher than 1.25VREF, the MP4655 triggers the over-system voltage protection and latches up. The fault indicator output is high. 2. System voltage stage short protection VOCP senses the current through the output system voltage stage for short protection of the system voltage stage. If the voltage on VOCP is lower than -203mV for 7µs, the MP4655 latches up and outputs a high fault indicator. 3. System voltage stage open-feedback protection During the PWM dimming off interval, if the VFB voltage is lower than 50% of its reference and VCOMP is saturated for 512 switching cycles, the IC latches up and outputs a high fault indicator. During the PWM dimming on interval, if the VFB voltage is lower than 50% of its reference voltage and DCOMP is high for 512 cycles, the IC latches up and outputs a high fault indicator. LED Driver Stage Protection The fault protection for the LED driver stage includes the open LED protection, short LED protection, over-LED current protection, open feedback loop protection, and protection for any point of the LED string shorting to ground. The voltage of the LED strings is sensed on VLED1 and VLED2. Both the maximum value and the difference in voltages of VLED1 and VLED2 are used for protection. When the maximum value of VLED1 and VLED2 rises higher than 2.41V or the difference in the voltages rises higher than 150mV for 8µs, the IC triggers over-LED voltage protection (the voltage difference can be adjusted by the external input resistance on VLED1 or VLED2). DIMO is pulled low, and the output system voltage is regulated by the LLC frequency control, the same as in PWM off condition, and the fault indicator output is high. If the maximum value of VLED1 and VLED2 rises higher than 3V for 7.6µs, the MP4655 latches up and disables the LLC power stage to avoid any damage to the LED driver stage. The fault indicator output is high. The secondary side current of the LED driver stage is sensed on IOCP/FAULT. When the www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 21 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER IOCP voltage is lower than -320mV for 7µs, the MP4655 triggers the LED driver stage protection. At the LED driver stage protection, the DIMO is pulled low, and the output system voltage is regulated by the LLC frequency control, the same as in PWM off condition. The fault indicator output is high after 270µs. After the LED driver stage protection is triggered, IOCP/FAULT continues detecting the LED driver stage current. If the voltage on IOCP/FAULT remains lower than -320mV for 270µs, the MP4655 latches up and disables the LLC power stage. The LED current feedback (IFB) is used for overLED current protection. When IFB voltage rises higher than 415mV for 340µs or the IFB voltage rises higher than 555mV for 6µs, the IC triggers the LED driver stage protection. for 1024 cycles, the IC considers this to be a short LED to GND protection or open feedback protection and triggers the LED driver stage protection. The reference voltage varies according to the analog dimming signal. In a fault condition of the LED driver stage, the gate driving signals for the LLC power MOSFETs are still active and the output system voltage is regulated, only if the LED driver stage can be disconnected from the power stage. Therefore, the system power supply is not influenced by the fault protection of the LED driver stage. A MOSFET can be used to disconnect the LED driver stage at the LED fault condition (see Figure 11). Thermal protection is also integrated in the MP4655. If the voltage on IFB is lower than 50% of its reference voltage, and the ICOMP is saturated MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 22 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER APPLICATION INFORMATION Frequency Set and Soft Start (SS, FSET) The resistor on FSET and the resistor between FSET and SS determine the operating frequency, which can be calculated with Equation (1): V Vss − VFSET f = ( FSET − ) * 11.4 * 109 (Hz) (1) RFSET RSS _ FSET Where VFSET = 4.01V - VC. VC is the VCOMP voltage at PWM dimming off and ICOMP voltage at PWM dimming on. The VC range is clamped from 1.02V to 2.28V. VSS is the voltage on SS, typically 2.4V. The minimum operating frequency can be calculated with Equation (2): fmin = ( 1.73V 0.675V − ) * 11.4 * 109 (Hz) (2) RFSET RSS _ FSET The maximum operating frequency at steady state can be calculated with Equation (3): fmax = ( 2.99V 0.585V + ) * 11.4 * 109 (Hz) (3) RFSET RSS _ FSET The LED current is set by the current sense resistor on the cathode of LED and can be calculated with Equation (7): ILED = VIREF 199mV = Rsense Rsense A 2kΩ resistor is recommended between the LED current sense resistor and IFB, considering the possible spike voltage on the current sense resistor when shorting the LED string. System Output Voltage Set (VFB) VFB feeds back the system output voltage. Adjust the voltage divider to set the output system voltage. See Equation (8): Vsystem = VREF _ VFB * (R VFBH + R VFBL ) R VFBL = 1.2V * (R VFBH + R VFBL ) R VFBL Vbus RVFBH 2.99V 2.99V =( + ) * 11.4 * 109 (Hz) (4) RFSET RSS _ FSET CVFBH VFB RVFBL The operating frequency at standby mode is calculated with VFSET = 2.1V. See Equation (5): fSTB = ( (8) A capacitor (CVFBH) between the system output and VFB provides a better phase margin for the system output voltage control loop (see Figure 5). When VSS is 0V, the soft start-up frequency is calculated with Equation (4): fstart (7) 2.1V 0.305V − ) * 11.4 * 109 (Hz) (5) RFSET RSS _ FSET It is recommended to set the operating frequency in standby mode close to the LLC resonant frequency (f0) for optimum efficiency. The soft start-up time is determined by the capacitor on SS and can be calculated with Equation (6): TSS = 2.405V * CSS 13uA MP4655 Rev 1.0 2/2/2016 The zero composed by RVFBH and CVFBH is recommended to be in range of one-fifth to onethird of the operating frequency. See Equation (9): 1 (6) A 10nF capacitor on SS results in a 1.85ms softstart time. LED Current Set (IFB) Figure 5: Voltage Feedback Network 2π * R VFBH * CVFBH 1 1 = ( to )fop 5 3 (9) The VFB also functions as the protection for the over system output voltage. When VFB is 25% higher than its reference voltage, the IC triggers system output voltage stage protection. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 23 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER LED Current Compensation Loop (ICOMP) ICOMP is the compensation node for the LED current control loop. Connect a capacitor in series with a resistor on ICOMP or an R-C-C network (see Figure 6). The zero composed of RICOMP and CICOMP is recommended to cancel the pole formed by the LED output. See Equation (10): (10) 1 1 1 = = RICOMP * CICOMP R eq _ LED * COUT _ LED (10% to 20%) * VLED * COUT _ LED ILED Figure 7: Compensation Network on VCOMP CICOMP is in range of 10nF to 470nF, typically. Select CICOMP_P to be less than one-twentieth of CICOMP. System Output Voltage Compensation Loop through Duty-Controlled NMOS (DCOMP) DCOMP is the compensation node for the system output voltage control loop through the duty-controlled NMOS. Connect a capacitor in series with a resistor on DCOMP or an R-C-C network (see Figure 8). Figure 6: Compensation Network on ICOMP System Output Voltage Compensation Loop through LLC Control (VCOMP) VCOMP is the compensation node for the system output voltage control loop through the LLC frequency. Connect a capacitor in series with a resistor on VCOMP or an R-C-C network (see Figure 7). The zero composed of the RICOMP and CICOMP is recommended to cancel the pole formed by the system output. See Equation (11): (11) 1 1 1 = = Vbus R VCOMP * CVCOMP R Vbus * COUT _ Vbus * COUT _ Vbus Iout _ full Where CVCOMP is in the range of 10nF to 470nF, typically. The pole formed by RVCOMP and CVCOMP_P can be designed to be around half of the operating frequency. See Equation (12): 1 2π * R VCOMP * CVCOMP _ P MP4655 Rev 1.0 2/2/2016 = fop 2 (12) Figure 8: Compensation Network on DCOMP The zero composed of RDCOMP and CDCOMP is recommended to cancel the pole formed by the system output. See Equation (13): (13) 1 1 1 = = Vbus RDCOMP * CDCOMP R Vbus * COUT _ Vbus * COUT _ Vbus Iout _ full Where CVCOMP is in the range of 4.7nF to 100nF, typically. The pole formed by RDCOMP and CDCOMP_P can be designed to be around half of the operating frequency. See Equation (14): f 1 = op 2π * RDCOMP * CDCOMP _ P 2 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. (14) 24 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER Over-Current Protection for the System Output Stage (VOCP) VOCP implements an over-current protection for the system output voltage stage. The current of the system output voltage stage is sensed on VOCP with a negative polarity. When the voltage on VOCP is lower than -203mV, the IC triggers the system output voltage stage protection. Calculate the over-bus current protection threshold with Equation (15): IOCP _ Bus 203mV = R VOCP (15) Typically, the protection point is around 1.5 to 3 times the normal current of the system output voltage stage. Over-Current Protection for the LED Driver Stage (IOCP/FAULT) IOCP detects the current through the LED stage with a negative polarity. When the voltage on IOCP falls below -320mV, the IC triggers LED driver stage protection. Calculate the over-LED current protection threshold with Equation (16): IOCP _ LED = 320mV RIOCP (16) The over-current protection point for the LED stage can be set at around 1.5 to 2 times the total current through the LED strings. ICOP also functions as the fault indicator for the system. When either LED driver stage protection, system bus voltage protection, or capacitive mode protection are triggered, the fault signal output is high. Place a 10kΩ resistor between IOCP and the LED stage current sense point. Over-LED Voltage Protection and LED Voltage Difference Protection (VLED1, VLED2) VLED1 and VLED2 sense the LED voltages and function as the over-LED voltage protection. The voltage divider sets the over-voltage protection point with Equation (17): VOVP = ROVPH + ROVPL × 2.41V ROVPL (17) Normally, the OVP point is set about 10% - 30% higher than the maximum LED voltage. MP4655 Rev 1.0 2/2/2016 The MP4655 also implements protection when the LED string voltages are different from each other to protect the condition in which several LEDs in a string are shorted. This protection is used only for multiple-string applications. The protection point of the voltage difference between the LED strings is set with Equation (18): ΔVpro = 20k + Rinput ROVPH + ROVPL (18) × 2.41V × ROVPL 16 × 20k Where Rinput is the input resistance of VLED1 or VLED2). Adjust the input resistance to program the protection point. A resistor (RX) can be added between the voltage divider and VLED1 or VLED2 to adjust the input resistance. See Equation (19): R × ROVPL (19) Rinput = OVPH + RX ROVPL + ROVPH Capacitive Mode Protection (CMODE, FTH_CMODE) The MP4655 implements individual capacitive mode protection for the LLC power stage from the secondary side. CMODE monitors the secondary side winding voltage and functions as the capacitive mode protection. The winding voltage polarity is positive (high) when GL is on. When capacitive mode is detected, the IC decreases the SS voltage and increases the operating frequency to attempt to move the power stage to inductive mode. FTH_CMODE sets the threshold frequency to trigger capacitive mode protection. If the operating frequency is higher than that set by FTH_CMODE and capacitive mode is still detected, the IC triggers capacitive mode protection. Connect a resistor on FTH_CMODE to set the threshold frequency. See Equation (20): 1.2V fth _ Cmod e = ( ) * 11.4 * 109 (Hz) (20) RFth _ Cmod e PWM Dimming Input (PWM) PWM is for the PWM dimming input. Apply a PWM dimming signal with a frequency between 100Hz to 2kHz on PWM. The PWM dimming has positive polarity. PWM Dimming Signal Output (DIMO) DIMO outputs a PWM dimming signal to drive the external dimming N-channel MOSFET in series with the LED string and achieves fast PWM dimming. Connect a resistor in series with DIMO to adjust the driving speed. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 25 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER Analog Dimming (ADIM, ADIMP) The MP4655 implements either DC analog dimming or pulse analog dimming for the LED current (see Table 1). For DC input analog dimming, apply a 0V to 2.4V DC voltage on ADIM to program the LED current from 0 to 100%. ADIMP is left open or pulled high above 5V. For pulse input analog dimming, apply the pulse analog dimming signal on ADIMP and a capacitor on ADIM. A duty cycle on the pulse analog dimming signal from 0 to 100% dims the LED current from 0 to 100%. A lower frequency of the pulse analog dimming signal requires a larger capacitor on ADIM. For a 10kHz pulse signal, a capacitor 100nF or above on ADIM is recommended. If analog dimming is not required, pull ADIM high and leave ADIMP open. Analog dimming and PWM dimming can be applied together. Table 1: MP4655 Dimming Connections Items ADIM ADIMP PWM DC analog dimming signal 0 to 2.4V Float or pulled high above 5V Pull high Capacitor Pulse analog dimming signal Pull high Pull high Float PWM PWM + DC input analog dimming DC analog dimming signal 02.4V Float or pull high above 5V PWM PWM + pulse analog dimming Capacitor Pulse analog dimming signal PWM Only DC input analog dimming Only pulse input analog dimming Only PWM dimming Supply Input (VIN) VIN is the supply input voltage of the IC. Bypass VIN with a ceramic capacitor 0.47µF or larger. LLC Gate Driver (VCC, GL, GR) VCC supplies the gate drive signals GL, GR, DIMO, and the charge pump from CFLY. Bypass VCC with a ceramic capacitor 1µF or larger. VCC can also be used to supply an external circuit. To avoid noise during layout, place the VCC capacitor directly between VCC and GND with a short and separate wire. MP4655 Rev 1.0 2/2/2016 GL and GR provide the driving signal for the LLC power stage. GL and GR are 180 degree phase shifted gate drive signals. With their enhanced drive capability, GL and GR can directly drive the external LLC MOSFETs in the power stage through a gate driving transformer. The gate driving transformer also isolates the primary power stage and the secondary control circuit. Place a 2.2nF Y-cap between the power stage ground and the reference ground for the control circuit to improve EMI performance. The primary inductance of the gate driving transformer influences its magnetic current, which is also supplied by the IC. The primary inductance should be larger than 1mH, and is recommended to be over 2mH. Extra NMOS Gate Driver (CFLY, VDR_DN, GATEN, SOURCE) GATEN and SOURCE are connected to the extra duty-controlled NMOS’ gate and source. They provide a floating driving signal for the dutycontrolled NMOS. A resistor on GATEN can adjust the driving speed. CFLY and VDR_DN provide a charge pump supply for GATEN referred to SOURCE. Connect a flying capacitor 100nF or above on CFLY, and diodes on SOURCE and VDR_DN, as shown in the typical application circuit. LED Driver Stage Enable Signal (EN_LED) EN_LED is connected to the enable signal for the LED driver stage. Logic high enables the LED driver stage and logic low disables the LED driver stage. When the LED driver stage fault is triggered but the IC is not latched up, toggle the enable signal to restart the LED driver stage. System Enable Signal (PS_ON) PS_ON is connected to the enable signal or standby signal. The voltage level on PS_ON determines the operation of the IC as follows: 1. PS_ON > 2V: the IC is enabled in normal operation mode. 2. 0.8V < PS_ON ≤ 2V for 1ms: the IC is disabled and no circuits work. 3. PS_ON ≤ 0.8V: the IC is enabled in standby mode. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 26 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER Figure 9: LLC Power System with External Standby Flyback Figure 10: LLC Power System without External Standby Flyback MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 27 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER APPLICATION INFORMATION VSystem D5 Cb PFC_400V D2 D1 Cr C1 M2 400V LLC AUX winding, reinforced wire C4 D6 TM M1 C3 DCDC C2 D3 D4 TDrive Drive circuit Figure 11: Application Circuit without Standby Flyback MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 28 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER VSystem D5 Cb PFC_400V C4 D6 TM M1 C3 D2 D1 Cr C1 M2 400V LLC C2 D3 D4 TDrive Drive circuit 5V STB STB flyback driver STB flyback 5V STB Figure 12: Application Circuit with Standby Flyback MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 29 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER VSystem D5 D2 Cb PFC_400V Cr C4 D6 TM M1 C3 DCDC C1 D1 M2 C2 400V LLC D3 AUX winding, reinforced wire D4 TDrive Figure 13: Application Circuit without Protection MOSFET on LED Stage MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 30 MP4655–PURE, SINGLE-STAGE, LLC, LED CURRENT AND SYSTEM VOLTAGE CONTROLLER PACKAGE INFORMATION SOIC-28 NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP4655 Rev 1.0 2/2/2016 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 31
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