MP5001DQ-LF-P

MP5001 5V, 1A- 5A Programmable Current Limit Switch The Future of Analog IC Technology DESCRIPTION FEATURES The MP5001 is a protection device designed to protect circuitry on the output (source) from transients on input (VCC). It also protects VCC from undesired shorts and transients coming from the source. • • • • • • At start up, inrush current is limited by limiting the slew rate at the source. The slew rate is controlled by a small capacitor at the dv/dt pin. The dv/dt pin has an internal circuit that allows the customer to float this pin (no connect) and still receive a 1.1ms ramp time at the source. Integrated 44mΩ Power FET withstand 20V Enable/Fault Pin Adjustable Slew Rate for Output Voltage Adjustable Current Limit Thermal Protection Over Voltage Limit APPLICATIONS • • • • The max load at the output (source) is current limited. This is accomplished by utilizing a sense FET topology. The magnitude of the current limit is controlled by an external resistor from the ILimit pin to the Source pin. Hot Swap PC Cards Cell Phones Laptops “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. An internal charge pump drives the gate of the power device, allowing a very low on-resistance DMOS power FET of just 44mΩ. The source is protected from the VCC input being too low or too high. Under Voltage Lockout (UVLO) assures that VCC is above the minimum operating threshold, before the power device is turned on. If VCC goes above the high output threshold, the source voltage will be limited. TYPICAL APPLICATION RLIMIT VIN 11 6 7 8 EN N/C I-Limit MP5001 Rev.0.94 9/2/2014 10 Source Source MP5001 Enable/Fault 9 dv/dt Cdv/dt VCC GND Source Source 5 VOUT 4 3 2 Source 1 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 1 MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH ORDERING INFORMATION Part Number* Package Top Marking Free Air Temperature (TA) MP5001DQ QFN10 (3x3) W5 -40°C to +85°C * For Tape & Reel, add suffix –Z (e.g. MP5001DQ–Z) For RoHS Compliant Packaging, add suffix –LF (e.g. MP5001DQ–LF–Z) PACKAGE REFERENCE 1 10 2 9 3 8 4 7 5 6 ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VCC, SOURCE, I-LIMIT ................................22V dv/dt, ENABLE/FAULT...................................6V Junction Temperature………….-40°C to +150°C Continuous Power Dissipation (TA = +25°C)(2) ……………………………………………….2.5W Storage Temperature ............... -65°C to +155°C QFN10 .................................... 50 ...... 12 ... °C/W Recommended Operating Conditions Input Voltage Operating Range……….4V to 10V Operating Junct. Temp (TJ)…….-40°C to +125°C MP5001 Rev.0.94 9/2/2014 (3) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Measured on JESD51-7 4-layer board. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2014 MPS. All Rights Reserved. 2 MP5001 – 5V, 1A- 5A PROGRAMMABLE CURRENT LIMIT SWITCH ELECTRICAL CHARACTERISTICS VCC = 5V, RLIMIT=22Ω, COUT= 10μF, TJ=25°C, unless otherwise noted. Parameters Power FET Symbol Delay Time tDLY ON Resistance (4) RDSon Off State Output Voltage Continuous Current VOFF ID Thermal Latch Shutdown Temperature Under/Over Voltage Protection Condition Min Enabling of chip to ID=100mA with a 12Ω resistive load TJ=25°C Note 4, TJ=80°C VCC=18V, Enable=0V, RL=500Ω 2 0.5 in pad, TJ=25°C minimum copper, TJ=80°C VCLAMP Under Voltage Lockout Under Voltage Lockout (UVLO) Hysteresis Current Limit (4) Hold Current Trip Current dv/dt Circuit Rise Time Enable/Fault Low Level Input Voltage VUVLO Overvoltage Protection VCC=8V Turn on, Voltage going high 44 95 Units ms 82 120 mΩ mV 4.2 2.3 A 175 °C 5.95 6.65 7.35 V 3.2 3.6 4.0 V 0.1 VHYST ILIM-SS ILIM-OL Max 0.2 TSD Output Clamping Voltage Typ V RLIMIT=22Ω RLIMIT=22Ω 1.5 2.1 3.3 2.8 A A Tr Float dv/dt pin, Note 5 0.64 1.1 2.0 ms VIL Output Disabled Thermal Fault, Disabled Output Enabled 0.5 V 2.0 V -50 V V μA 3 Units VCC V Intermediate Level Input Voltage VI (INT) High Level Input Voltage High State Maximum Voltage Low Level Input Current (Sink) VIH VI (MAX) IIL Maximum Fanout for Fault Signal Output 0.82 2.5 VENABLE=0V Total number of chips that can be connected for simultaneous shutdown Note 6 Maximum Voltage on Enable Pin Total Device VMAX Bias Current IBIAS Device Operational Thermal Shutdown Minimum Operating Voltage for UVLO VMIN Enable