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MP5002DQ-LF-Z

MP5002DQ-LF-Z

  • 厂商:

    MPS(美国芯源)

  • 封装:

    VFDFN10

  • 描述:

    IC PWR SWITCH N-CHAN 1:1 10QFN

  • 数据手册
  • 价格&库存
MP5002DQ-LF-Z 数据手册
MP5002 3.3V, 1A-3A Programmable Current Limit Switch The Future of Analog IC Technology DESCRIPTION FEATURES The MP5002 is a protection device designed to protect circuitry on the output (VOUT) from transients on the input (VIN). It also protects VIN from undesired shorts and transients coming from the load. • • • • • • At start up, inrush current is limited by limiting the slew rate at VOUT. The slew rate is controlled by a small capacitor at the dv/dt pin. The dv/dt pin has an internal circuit that allows the customer to float this pin (no connect) and still receive a 1.1ms ramp time at VOUT. Integrated 44mΩ Power FET Enable/Fault Pin Adjustable Slew Rate for Output Voltage Adjustable Current Limit: 1A-3A Thermal Protection Over Voltage Limit APPLICATIONS • • • • The max load at the output (VOUT) is current limited. This is accomplished by utilizing a sense FET topology. The magnitude of the current limit is controlled by an external resistor connected between the ILIMIT pins. Hot Swap PC Cards Cell Phones Laptops “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. An internal charge pump drives the gate of the power device, allowing a very low on-resistance DMOS power FET of just 44mΩ. VOUT is protected from VIN being too low or too high. Under Voltage Lockout (UVLO) assures that the input is above the minimum operating threshold, before the power device is turned on. If VIN goes above the high output threshold, the output voltage will be limited. TYPICAL APPLICATION VIN 11 RLIMIT 6 +ILIMIT VIN 7 -ILIMIT 8 EN Enable/Fault VOUT VOUT VOUT MP5002 Cdv/dt (Optional) MP5002 Rev. 0.93 10/15/2010 9 dv/dt 10 GND VOUT 5 VOUT 4 3 2 VOUT 1 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 1 MP5002 – 3.3V, 1A-3A PROGRAMMABLE CURRENT LIMIT SWITCH ORDERING INFORMATION Part Number* Package Top Marking Free Air Temperature (TA) MP5002DQ QFN10 (3x3) 3H –40°C to +85°C * For Tape & Reel, add suffix –Z (e.g. MP5002DQ–Z); For RoHS compliant packaging, add suffix –LF; (eg. 5002DQ–LF–Z) PACKAGE REFERENCE TOP VIEW VOUT 1 VOUT 2 VOUT 3 VOUT 4 VOUT 5 10 GND EXPOSED PAD VIN 9 dv/dt 8 ENABLE/FAULT 7 -ILIMIT 6 +ILIMIT ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VIN, VOUT, ILIMIT .............................................. 22V dv/dt, ENABLE/FAULT .................................. 6V Continuous Power Dissipation (TA = +25°C) (2) ............................................................. 2.5W Storage Temperature............... -65°C to +155°C Junction Temp…………………..-40°C to +150°C QFN10 ....................................50 ...... 12 ... °C/W Recommended Operating Conditions Input Voltage Operating Range……….2.5V to 4V Operating Junct. Temp (TJ)…….-40°C to +125°C MP5002 Rev. 0.93 10/15/2010 (3) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Measured on JESD51-7 4-layer board. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 2 MP5002 – 3.3V, 1A-3A PROGRAMMABLE CURRENT LIMIT SWITCH ELECTRICAL CHARACTERISTICS VIN = 3.3V, RLIMIT=24Ω, COUT= 10µF, TJ=25°C, unless otherwise noted. Parameters Power FET Symbol Delay Time tDLY ON Resistance (4) RDSon Off State Output Voltage Thermal Latch Shutdown Temperature Under/Over Voltage Protection VOFF Min Enabling of chip to ID=100mA with a 12Ω resistive load VCLAMP Under Voltage Lockout VUVLO 44 95 TJ=+80°C Enable=0V, RL=500Ω Overvoltage Protection VIN = 6V Turn on, Voltage going high ILIM-OL RLIMIT=24Ω Tr Float dv/dt pin, Note 5 VIL Output Disabled Thermal Fault, Output Disabled Output Enabled High Level Input Voltage High State Maximum Voltage Low Level Input Current (Sink) VIH VI (MAX) IIL Maximum Fanout for Fault Signal 82 VMAX Bias Current IBIAS Device Operational Thermal Shutdown Minimum Operating Voltage for UVLO VMIN Enable
MP5002DQ-LF-Z 价格&库存

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