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MP5003EQ-LF-P

MP5003EQ-LF-P

  • 厂商:

    MPS(美国芯源)

  • 封装:

    VFDFN10

  • 描述:

    IC PWR SWITCH N-CHAN 1:1 10QFN

  • 数据手册
  • 价格&库存
MP5003EQ-LF-P 数据手册
MP5003 3.3V, 1A-3A Programmable Current Limit Switch with Auto Enable The Future of Analog IC Technology DESCRIPTION FEATURES The MP5003 is a protection device designed to protect circuitry on the output (VOUT) from transients on the input (VIN). It also protects VIN from undesired shorts and transients coming from the load.      At start up, inrush current is limited by limiting the slew rate at VOUT. The slew rate is controlled by a small capacitor at the dv/dt pin. The dv/dt pin has an internal circuit that allows the customer to float this pin (no connect) and still receive a 1.1ms ramp time at VOUT.  Integrated 44mΩ Power FET Enable/Fault Pin Adjustable Slew Rate for Output Voltage Adjustable Current Limit: 1A-3A Automatically Startup after Thermal Protection Over Voltage Limit APPLICATIONS     The max load at the output (VOUT) is current limited. This is accomplished by utilizing a sense FET topology. The magnitude of the current limit is controlled by an external resistor connected between the ILIMIT pins. Hot Swap PC Cards Cell Phones Laptops “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. An internal charge pump drives the gate of the power device, allowing a very low on-resistance DMOS power FET of just 44mΩ. VOUT is protected from VIN being too low or too high. Under Voltage Lockout (UVLO) assures that the input is above the minimum operating threshold, before the power device is turned on. If VIN goes above the high output threshold, the output voltage will be limited. TYPICAL APPLICATION VIN 11 6 +ILIMIT VIN MP5003 RLIMIT 7 -ILIMIT 8 EN Enable/Fault 9 dv/dt Cdv/dt (Optional) MP5003 Rev. 0.921 2/29/2012 VOUT 10 GND VOUT VOUT VOUT 5 VOUT 4 3 2 VOUT 1 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 1 MP5003 – 3.3V, 1A-3A PROGRAMMABLE CURRENT LIMIT SWITCH WITH AUTO ENABLE ORDERING INFORMATION Part Number* Package Top Marking Free Air Temperature (TA) MP5003EQ QFN10 (3x3) 7M -20C to +85C * For Tape & Reel, add suffix –Z (e.g. MP5003EQ–Z); For RoHS Compliant Packaging, add suffix –LF (e.g. MP5003EQ–LF–Z) PACKAGE REFERENCE TOP VIEW VOUT 1 VOUT 2 VOUT 3 VOUT 4 VOUT 5 10 GND EXPOSED PAD VIN ABSOLUTE MAXIMUM RATINGS (1) VIN, VOUT, +ILIMIT, -ILIMIT .................................. 22V dv/dt, ENABLE/FAULT .................................. 6V Continuous Power Dissipation (TA=+25oC) (2) ............................................................. 2.5W Storage Temperature ............... -65°C to +155C Junction Temperature…..……..-20C to +150C Recommended Operating Conditions Input Voltage Operating Range……….2.5V to 6V Operating Junct.Temp(TJ)……..-20C to +125C MP5003 Rev. 0.921 2/29/2012 9 dv/dt 8 ENABLE/FAULT 7 -ILIMIT 6 +ILIMIT Thermal Resistance (3) θJA θJC QFN10 .................................... 50 ...... 12 ... C/W Notes: 1) Exceeding these ratings may damage the device.. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX) , the junction-toambient thermal resistance JA,and the ambient temperature TA, the maximum allowable power dissipation at any ambient temperature is calculated using: PD(MAX)=(TJ(MAX)-TA)/ JA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. o Reduce 0.2 Watts for every 10 C ambient temperature increasing 3) Measured on JESD51-7 4-layer board. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2012 MPS. All Rights Reserved. 2 MP5003 – 3.3V, 1A-3A PROGRAMMABLE CURRENT LIMIT SWITCH WITH AUTO ENABLE ELECTRICAL CHARACTERISTICS VIN = 3.3V, RLIMIT=24Ω, COUT= 10μF, TJ=25C, unless otherwise noted. Parameters Power FET Symbol Delay Time tDLY ON Resistance RDSon Condition Enabling of chip to ID=100mA with a 12Ω resistive load TJ=+25°C TJ=+80°C, Note 4 Off State Output Voltage VOFF Enable=0V,RL=500Ω Thermal Latch Shutdown Temperature Under/Over Voltage Protection TSD Note 4 Output Clamping Voltage VCLAMP Under Voltage Lockout VUVLO Under Voltage Lockout (UVLO) Hysteresis Current Limit Short Circuit Current Limit (Hold Current) Trip Current dv/dt Circuit Rise Time Enable/Fault Low Level Input Voltage High Level Input Voltage High State Maximum Voltage Low Level Input Current (Sink) Min Overvoltage Protection VIN = 6V Turn on, Voltage going high Typ Max 0.2 44 95 Units ms 82 120 175 mΩ mV °C 3.63 4.03 4.43 V 2.15 2.35 2.5 V 100 400 mV VHYST ILIM RLIMIT=24Ω, Note 4 1.2 1.55 1.9 A ILIM-OL RLIMIT=24Ω, Note 4 2.0 2.5 3.0 A Tr Float dv/dt pin, Note 5 0.64 1.1 2.0 ms VIL VIH Output Disabled Output Enabled 0.5 -75 V V V μA 5 Units VIN V VI (MAX) IIL Maximum Fanout for Fault Signal 2.5 VENABLE=0V Total number of chips that can be connected for simultaneous shutdown Note 6 Maximum Voltage on Enable Pin Total Device VMAX Bias Current IBIAS Device Operational Thermal Shutdown Minimum Operating Voltage for UVLO VMIN Enable
MP5003EQ-LF-P 价格&库存

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