MP5011DQ-LF-Z

MP5011 12V, 5A Switch with Programmable Current Limit DESCRIPTION FEATURES The MP5011 is a device designed to protect circuitry on the output (source) from transients on the input (VCC). It also protects the input from undesirable shorts and transients coming from the source.       At start up, the limited slew rate at the source limits the inrush current. A small capacitor at the dv/dt pin controls this slew rate. The dv/dt pin has an internal circuit that allows the customer to float this pin and still achieve a 1.4ms ramp time at the source. The maximum load at the output is currentlimited by using a sense MOSFET topology. An external resistor from the I-LIMIT pin to the source pin controls the magnitude of the current limit. Integrated 44mΩ Power MOSFET Enable/Fault Pin Adjustable Slew Rate for Output Voltage Adjustable Current Limit: 1A-5A Thermal Protection Over-Voltage Protection APPLICATIONS    Hot Swap PC Cards Laptops All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. An internal charge pump drives the gate of the power device, allowing for the use of a DMOS power MOSFET with an ON resistance of just 44mΩ. The device also includes protective features to protect the source against an input voltage that is outside the operating range. TYPICAL APPLICATION MP5011 Rev. 1.01 11/8/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH ORDERING INFORMATION Part Number* MP5011DQ Package QFN10 (3x3mm) Top Marking ACN * For Tape & Reel, add suffix –Z (e.g. MP5011DQ–Z); For RoHS Compliant Packaging, add suffix –LF (e.g. MP5011DQ–LF–Z) PACKAGE REFERENCE ABSOLUTE MAXIMUM RATINGS (1) VCC, SOURCE, I-LIMIT .................. -0.3V to 22V VCC, SOURCE, I-LIMIT Transient (100ms) ...25V dv/dt, ENABLE/FAULT..................... -0.3V to 6V Storage Temperature ............... -65°C to +155°C Continuous Power Dissipation (TA = 25°C) (2) ............................................................2.5W Operating Junction Temperature -40°C to 150°C Recommended Operating Conditions (3) Supply Voltage VIN ............................. 9V to 15V Maximum Junction Temp. (TJ) ............... 125°C MP5011 Rev. 1.01 11/8/2013 Thermal Resistance (4) θJA θJC QFN10 (3x3mm) ..................... 50 ...... 12 ... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7 4-layer board. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 2 MP5011 – 12V, 1A-5A PROGRAMMABLE CURRENT LIMIT SWITCH ELECTRICAL CHARACTERISTICS VCC = 12V, RLIMIT=15.4Ω, Capacitive Load = 100μF, TA=25°C, unless otherwise noted. Parameters Power FET Symbol Delay Time tDLY ON Resistance (5) Off-State Output Voltage Continuous Current Thermal Latch (5) Shutdown Temperature Under/Over-Voltage Protection RDSon VOFF ID Enabling of chip to ID=100mA with a 1A resistive load TJ=25°C TJ=80°C VCC=18Vdc, VENABLE=0Vdc, RL= 500Ω 2 0.5 in pad, Minimum Copper, TA=80°C TSD Output Clamping Voltage VCLAMP Under-Voltage Lockout VUVLO Under-Voltage Lockout Hysteresis Current Limit (5) Hold Current Trip Current dv/dt Circuit (6) Rise Time Enable/Fault Low Level Input Voltage VHYST ILIM-SS ILIM-OL tr VIL Intermediate-Level Input Voltage VI (INT) High-Level Input Voltage High-State Maximum Voltage Low-Level Input Current (Sink) VIH VI (MAX) IIL Maximum Fanout for Fault Signal Maximum Voltage on Enable/Fault (7) Pin Total Device Condition Overvoltage Protection VCC=17V Turn on, Voltage going high Min Typ Max Units 0.1 0.15 0.2 ms 44 52 55 120 4.2 2.3 mΩ mV A 150 175 200 °C 13.8 15 16.2 V 7.7 8.5 9.3 V 0.80 V RLIM=15.4Ω RLIM=15.4Ω, 3.8 4.5 5.3 5.2 A A Float dv/dt pin 0.8 1.4 2.0 ms 0.5 V 1.95 V -50 V V μA 3 Units VCC V Output Disabled Thermal Fault, Output Disabled Output Enabled VENABLE=0V Total number of chips that can be connected for simultaneous shutdown 0.82 1.4 2.5 4.8 -28 VMAX Bias Current IBIAS Device Operational Thermal Shutdown Minimum Operating Voltage for UVLO VMIN Enable