MP5402MGR-P

MP5402M The Future of Analog IC Technology 5A, 36V, Frequency Selectable Step-Down Converter with Smart Dual USB Charging Ports DESCRIPTION FEATURES The MP5402M integrates a monolithic, stepdown, switch-mode converter with two USB current-limit switches and a charging port identification circuit. It achieves 5A of continuous output current over a wide input supply range with excellent load and line regulation. • • The output of the USB switch is current limited. Both USB ports support DCP schemes for the battery charging specification (BC1.2), the divider mode, and the 1.2V/1.2V mode, eliminating outside user interaction. The output voltage has programmable line drop compensation. Fault condition protection includes hiccup current limiting, output OVP, and thermal shutdown (TSD). The MP5402M requires a minimum number of readily available, standard, external components and is available in a QFN-26 (4mmx4mm) package. EMI Reduction Technique Wide 7V to 36V Operating Input Voltage Range Fixed 5V Output Voltage with Line Drop Compensation Accurate USB1/USB2 Output Current Limit 40mΩ/32mΩ Low-RDS(ON) Internal Buck Power MOSFETs 24mΩ/24mΩ Low-RDS(ON) Internal USB1/USB2 Power MOSFETs 350kHz/250kHz/150kHz Frequency Selectable Programmable Line Drop Compensation Output Over-Voltage Protection Hiccup Current Limit Supports DCP Schemes for BC1.2, Divider Mode, and 1.2V/1.2V Mode ±8kV HBM ESD Rating for USB, DP, and DM Available in a QFN-26 (4mmx4mm) Package • • • • • • • • • • • APPLICATIONS • • USB Dedicated Charging Ports (DCP) Smart Cigarette Lighter Adapter USB Chargers All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION MP5402M Rev.1.0 10/10/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 1 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS ORDERING INFORMATION Part Number* MP5402MGR Package QFN-26 (4mmx4mm) Top Marking See Below * For Tape & Reel, add suffix –Z (e.g. MP5402MGR–Z) TOP MARKING MPS: MPS prefix Y: Year code WW: Week code M5402M: Product code LLLLLL: Lot number PACKAGE REFERENCE TOP VIEW QFN-26 (4mmx4mm) MP5402M Rev.1.0 10/10/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 2 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance Supply voltage (VIN) ..................................... 40V VSW ...................................................................... –0.3V (-5V for 2V, OC TJ = -40°C to +125°C VOUT = 5V, VBUS connected to GND, TJ = +25°C VOUT = 5V, VBUS connected to GND, TJ = -40°C to +125°C mΩ A mV mV mV V 2.5 VMIDDLE TSS 2.9 500 VCC0.4V VHIGH THICP_ON1 Hiccup mode on time TJ = +25°C Max load 2.4A, VDROP = float, TJ = +25°C Max load 2.4A, VDROP = high Max load 2.4A, VDROP = GND 24 2.75 400 280 130 Max Units V 1 1.6 0.4 2.2 V 0.9 1.6 2.4 50 50 3(7) 70 75 Ω 3.5 5 6.5 ms 3 5 7 6.5 8.5 10.5 6 8.5 11 125 155 125 160 2.7 2.7 22 22 2.82 2.85 23 28 ms s BC1.2 DCP Mode DP and DM short resistance VDP = 0.8V, IDM = 1mA, TJ = +25°C RDP/DM_Short VDP = 0.8V, IDM = 1mA, TJ = -40°C to +125°C Ω Divider Mode DP/DM output voltage VDP/DM_Divider DP/DM output impedance RDP/DM_Divider MP5402M Rev.1.0 10/10/2015 VOUT = 5V, TJ = +25°C VOUT = 5V, TJ = -40°C to +125°C TJ = +25°C TJ = -40°C to +125°C 2.54 2.5 20 18 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. V kΩ 5 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS ELECTRICAL CHARACTERISTICS VIN = 12V, VEN = 5V, TJ = -40°C to +125°C(6). Typical value is tested at TJ = +25°C unless otherwise noted. Parameter 1.2V/1.2V Mode Symbol DP/DM output voltage VDP/DM_1.2V DP/DM output impedance RDP/DM_1.2V Condition Min Typ Max Units VOUT = 5V, TJ = +25°C VOUT = 5V, TJ = -40°C to +125°C TJ = +25°C TJ = -40°C to +125°C 1.16 1.15 60 55 1.25 1.25 68 68 1.34 1.35 75 88 V kΩ NOTES: o 6) All min/max parameters are tested at TJ = 25 C. Limits over temperature are guaranteed by design, characterization, and correlation. 7) Guaranteed by design. MP5402M Rev.1.0 10/10/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 6 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS TYPICAL PERFORMANCE CHARACTERISTICS VIN = 12V, VOUT = 5V, L = 22µH, TA = 25°C, unless otherwise noted. MP5402M Rev.1.0 10/10/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 7 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN = 12V, VOUT = 5V, L = 22µH, TA = 25°C, unless otherwise noted. MP5402M Rev.1.0 10/10/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 8 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS PIN FUNCTIONS QFN 4x4 Pin # Name 1, 2 USB1 3, 15, 25 4, 14 5, 6, 12, 13 7 8 9, 10, 26 11 16, 17 18 19 20 21 22 23 24 MP5402M Rev.1.0 10/10/2015 Description USB1 output. Buck output. OUT is the power input for USB1 and USB2. The internal circuit OUT senses OUT voltage and regulates it at 5V. Supply voltage. The MP5402M operates from a 7V to 36V input voltage. CIN prevents large voltage spikes at the input. Place CIN as close to the IC as IN possible. IN is the drain of the internal power device and also provides the power supply for the entire chip. Power ground. PGND is the reference ground of the regulated output voltage. PGND PGND requires extra care during PCB layout. Connect to GND with copper traces and vias. Frequency selection. Floating FREQ sets the frequency at 150kHz. Pulling FREQ FREQ to ground sets the frequency at 250kHz. Pulling FREQ to 5V sets the frequency at 350kHz. EN On/off control input. SW Switch output. Use a wide PCB trace to make the connection. Bootstrap. A 0.1μF capacitor is connected between SW and BST to form a BST floating supply across the high-side switch driver. USB2 USB2 output. AGND Analog ground. Connect AGND to PGND. VCC Internal 5V LDO regulator output. Decouple with a 0.22µF capacitor. Line drop compensation selection. Refer to the EC table for detailed VDROP specifications. D- data line to USB connector. Input/output is used for handshaking with DM2 portable devices. D+ data line to USB connector. Input/output is used for handshaking with DP2 portable devices. D+ data line to USB connector. Input/output used for handshaking with DP1 portable devices. D- data line to USB connector. Input/output is used for handshaking with DM1 portable devices. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 9 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS FUNCTIONAL BLOCK DIAGRAM IN EN 1MΩ 12KΩ Current Sense Amplifier VCC 7.6V Regulator VCC Σ Oscillator Reference Bootstrap Regulator FREQ HS Driver Current Limit Comparator Control Logic OUT Rtop SS Rbot VCC PGND Error Amplifier OVP Comparator PWM Comparator Curent Sense USB1 Discharge Curent Sense Charge Pump UVLO Thermal Sense Discharge SW LS Driver Line Drop Compensation VDROP BST USB2 Control Logic Current Limit Discharge 2.7V AGND 1.2V DP1 Auto Detect DM1 DP2 DM2 Figure 1: Functional Block Diagram MP5402M Rev.1.0 10/10/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 10 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS OPERATION BUCK CONVERTER The MP5402M integrates a monolithic, synchronous, rectified, step-down, switch-mode converter with internal power MOSFETs and two USB current-limit switches with charging port auto-detection. It offers a compact solution to achieve 5A of continuous output current over a wide input supply range with excellent load and line regulation. The MP5402M operates in a fixed frequency, peak-current-mode control to regulate the output voltage. The internal clock initiates the PWM cycle, which turns on the integrated highside power MOSFET (HS-FET). The HS-FET remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle begins. If the duty cycle reaches 88% (350kHz switching frequency) in one PWM period, the current in the power MOSFET will not reach the COMP set current value, and the power MOSFET will turn off. Error Amplifier (EA) The error amplifier (EA) compares the internal feedback voltage against the internal 1V reference (REF) and outputs a COMP voltage. This COMP voltage controls the power MOSFET current. The optimized internal compensation network minimizes the external component count and simplifies the control loop design. Internal VCC Regulator The 5V internal regulator powers most of the internal circuitries. This regulator takes VIN and operates in the full VIN range. When VIN exceeds 5.0V, the output of the regulator is in full regulation. If VIN is less than 5.0V, the output decreases with VIN. VCC requires an external 0.22µF ceramic decoupling capacitor. Enable Control (EN) The MP5402M has enable control (EN). Pulling EN high enables the IC; pulling EN low disables the IC. Connect EN to VIN through a resistor for automatic start-up. An internal 1MΩ resistor from EN to GND allows EN to float to shut down the IC. EN is clamped internally using a 7.6V series Zener diode (see Figure 2). Connect EN through a pull-up resistor to any voltage MP5402M Rev.1.0 10/10/2015 connected to VIN. This requires limiting the amplitude of the voltage source to below 10V and the EN input current to less than 230µA to prevent damage to the Zener diode. For example, connecting 36V to VIN, RPULLUP ≥ (36V – 10V)/230µA = 113kΩ. EN 1MΩ GND 12kΩ 7.6V EN Logic Figure 2: Zener Diode between EN and GND Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) protects the chip from operating at an insufficient supply voltage. The UVLO comparator monitors the input voltage. The UVLO rising threshold is 5.7V, and its falling threshold is 4.7V. Internal Soft Start (SS) The soft start (SS) prevents the converter output voltage from overshooting during startup. When the chip starts up, the internal circuitry generates an SS voltage that ramps up from 0V to 5V. When SS is lower than REF, the error amplifier uses SS as the reference. When SS is higher than REF, the error amplifier uses REF as the reference. The SS time is set to 1.65ms internally. If the output of the MP5402M is pre-biased to a certain voltage during start-up, the IC disables the switching of both the high-side and low-side switches until the voltage on the internal SS capacitor exceeds the internal feedback voltage. Buck Over-Current Protection (OCP) The MP5402M has a cycle-by-cycle, overcurrent limit when the inductor peak current exceeds the current-limit threshold, and FB voltage drops below the under-voltage (UV) threshold (70% below the reference, typically). Once UV is triggered, the MP5402M enters hiccup mode to restart the part periodically. This protection mode is especially useful when the output is dead-shorted to ground. This greatly reduces the average short-circuit current, www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 11 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS alleviates thermal issues, and protects the regulator. The MP5402M exits hiccup mode once the over-current condition is removed. Buck Output Over-Voltage Protection (OVP) The MP5402M has output over-voltage protection (OVP). If the output is higher than 6V, the high-side switch stops switching, and the low-side switch turns on to discharge the output voltage until the output decreases to 5.75V. The chip then returns to normal operation. If the output over voltage cannot be discharged to 5.75V, the low-side switch turns off after the inductor current reaches a negative current limit. The low-side switch turns on again when the next clock cycle begins. Floating Driver and Bootstrap Charging An external bootstrap capacitor powers the floating power MOSFET driver. This floating driver has its own UVLO protection. The UVLO’s rising threshold is 2.2V with a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, M1, C4, L1, and C2 (see Figure 3). If VBST-VSW exceeds 5V, U1 regulates M1 to maintain a 5V BST voltage across C4. Buck Output Discharge The buck portion of the device involves a discharge function that provides a resistive discharge path for the external output capacitor. The function is active when the part is disabled (input voltage is under UVLO, EN off) and is done in a very limited time. After VCC discharges below 1V, the buck output discharge resistor disconnects. USB CURRENT-LIMIT SWITCH Current-Limit Switch The MP5402M integrates two USB current-limit switches. It provides a built-in soft-start circuitry, which controls the rising slew rate of the output voltage to limit the inrush current and voltage surges. When the load current reaches the current-limit threshold (2.75A, typically), the USB power MOSFET switches into foldback current-limit mode, 70% of the current limit (see Figure 4). If the over-current limit condition lasts for more than 3ms, the USB channel enters hiccup mode with a 3ms on time and a 8.5s off time. D1 VIN M1 BST 5V U1 C4 VOUT SW L1 C2 Figure 3: Internal Bootstrap Charging Circuit Start-Up and Shutdown If both VIN and EN exceed their respective thresholds, the chip is enabled. The reference block starts first, generating a stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides a stable supply for the remaining circuitries. Several events can shut down the chip: EN low, VIN low, and thermal shutdown. In shutdown, the signaling path is blocked to avoid any fault triggering, and the COMP voltage and the internal supply rail are pulled down. The floating driver is not subject to this shutdown command. MP5402M Rev.1.0 10/10/2015 Figure 4: Over-Current Limit During VIN or EN start-up, ensure that the CC load current does not exceed 70% of the current limit to avoid triggering a foldback current limit and start-up failure. Output Line Drop Compensation The MP5402M can compensate an outputvoltage drop—such as high impedance caused by a long trace—to keep a fairly constant 5V load-side voltage. The internal comparator compares the currentsense output voltage of the two current-limit switches and uses the larger current-sense output voltage to compensate the line drop voltage. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 12 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS Since the trace resistance is different for different cables, the MP5402M provides selectable line drop compensation through VDROP. The line drop compensation amplitude increases linearly as the load current increases; it also has an upper limitation. USB Output Over-Voltage Protection In order to protect the device at the cable terminal, each USB switch output has an independently dynamic over-voltage protection threshold. Based on different USB loading currents, the MP5402M adjusts the OVP threshold accordingly. The intelligent line drop compensation and dynamic over-voltage protection control scheme ensure that the voltage at the cable terminal meets the 4.75V-5.25V specifications. USB Output Discharge Each USB portion involves a discharge function that provides a resistive discharge path for the external output capacitor. The function is active when the part is disabled (input voltage is under UVLO, EN off) and is done in a very limited time. MP5402M Rev.1.0 10/10/2015 Auto Detection The MP5402M integrates the USB dedicated charging port auto-detect function. This function recognizes most mainstream portable devices. It supports the following charging schemes: • USB battery charging specification BC1.2/ Chinese telecommunications industry standard YD/T 1591-2009 • Divider mode • 1.2V/1.2V mode The auto-detect function is a state machine that supports all of the DCP charging schemes above. SYSTEM Thermal Shutdown (TSD) Thermal shutdown prevents the chip from operating at exceedingly high temperatures. When the silicon die temperature exceeds 165°C, the entire chip shuts down. When the temperature falls below its lower threshold (145°C, typically), the chip is enabled. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 13 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS APPLICATION INFORMATION COMPONENT SELECTION Selecting the Inductor For most applications, an inductor with a DC current rating at least 25% higher than the maximum load current is recommended. Select an inductor with small DC resistance for optimum efficiency. The inductor value for most designs can be derived from Equation (1): L1 = VOUT × (VIN − VOUT ) VIN × ΔIL × fOSC (1) Where ΔIL is the inductor ripple current. Set the inductor ripple current to approximately 30% of the maximum load current. The maximum inductor peak current is shown in Equation (2): IL(MAX ) = ILOAD + ΔI L 2 (2) Typically, 22μH inductance is recommended to improve EMI. Selecting the Buck Input Capacitor The input current to the step-down converter is discontinuous and therefore requires a capacitor to supply the AC current while maintaining the DC input voltage. Use low ESR capacitors for optimum performance. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For a CLA application, a 100µF electrolytic capacitor and two 10µF ceramic capacitors are recommended. Since the input capacitor (C1) absorbs the input switching current, it requires an adequate ripplecurrent rating. The RMS current in the input capacitor can be estimated with Equation (3): I C1 = ILOAD × VOUT ⎛⎜ VOUT × 1− VIN ⎜⎝ VIN ⎞ ⎟ ⎟ ⎠ (3) The worse case condition occurs at VIN = 2VOUT, shown in Equation (4): IC1 I = LOAD 2 (4) For simplification, choose an input capacitor with an RMS current rating of greater than half of the maximum load current. MP5402M Rev.1.0 10/10/2015 The input capacitor can be electrolytic, tantalum, or ceramic. When using an electrolytic capacitor, place two additional high-quality ceramic capacitors as close to VIN as possible. Estimate the input voltage ripple caused by the capacitance with Equation (5): ΔVIN = ⎛ ⎞ ILOAD V V × OUT × ⎜ 1 − OUT ⎟ fS × C1 VIN ⎝ VIN ⎠ (5) Selecting the Buck Output Capacitor The device requires an output capacitor (C2) to maintain the DC output voltage. Estimate the output voltage ripple with Equation (6): ΔVOUT = ⎞ (6) VOUT ⎛ VOUT ⎞ ⎛ 1 × ⎜1 − ⎟ ⎟ × ⎜ RESR + fS × L1 ⎝ VIN ⎠ ⎝ 8 × fS × C2 ⎠ Where L1 is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. For an electrolytic capacitor, ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated with Equation (7): ΔVOUT = VOUT ⎛ V × ⎜ 1 − OUT fS × L1 ⎝ VIN ⎞ ⎟ × RESR ⎠ (7) The characteristics of the output capacitor affect the stability of the regulatory system. A low ESR electrolytic capacitor is recommended for a low output ripple and good control loop stability. For a CLA application, a 1µF ceramic capacitor and a 270µF polymer/electrolytic capacitor with ~20mΩ ESR are recommended. PCB Layout Guidelines(8) Efficient PCB layout is critical for achieving stable operation and thermal dissipation. For best results, refer to Figure 5 and follow the guidelines below: 1. Use short, direct, and wide traces to connect OUT. Adding vias under the IC and routing the OUT trace on both PCB layers is highly recommended. 2. Use a large copper plane for PGND. Add multiple vias to improve thermal dissipation. 3. Connect AGND www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. to PGND. 14 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS 4. Use a large copper plane for SW, USB1, and USB2. 5. Route the USB1 and USB2 traces on both PCB layers. 6. Add multiple vias. 7. Place two ceramic input decoupling capacitors as close as possible to IN and PGND to improve EMI performance. 8. Place a VCC decoupling capacitor as close as possible to VCC. NOTE: 8) The recommended layout is based on the typical application circuit on the next page (see Figure 6) . (4.78cm х 1.38cm) For CLA application (4 layer), 2Oz per layer PCBA is recommended Figure 5: PC Board Layout MP5402M Rev.1.0 10/10/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 15 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS TYPICAL APPLICATION CIRCUITS C4 100nF L2 2.2μH C1C 10μF L1 22μH 11 VIN 12V 9,10,26 4,14 C1 100μF + C1A 10μF 3,15,25 R1 300kΩ 8 C1B 10μF C2A 1μF + C2 270μF 20mΩ ESR 1,2 C5 10μF 24 D- 23 D+ U S B USB1, 2.4A U S B USB2, 2.4A 16,17 20 Float C6 10μF 7 Float 19 D- 22 D+ 5,6,12,13 18 C3 220nF 21 Figure 6: USB1 = 5V/2.4A, USB2 = 5V/2.4A MP5402M Rev.1.0 10/10/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 16 MP5402M – STEP-DOWN CONVERTER WITH SMART DUAL USB CHARGING PORTS PACKAGE INFORMATION QFN-26 (4mmx4mm) NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP5402M Rev.1.0 10/10/2015 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 17