MP5403B
Mini PMIC with Dual 4A/5A Peak Bucks,
One 2A Load Switch, and
Input Power Supervisory
DESCRIPTION
The MP5403B is a monolithic power
management unit containing two high-efficiency,
step-down, switching converters and a load
switch. The two regulators supply peak currents
up to 5A and 4A separately, and the load switch
supplies up to 3A of load current with an
extremely low RDS(ON). With an input range of up
to 6V, the MP5403B is ideal for powering ASIC
and SOC for solid-state drives (SSD) and other
compact power systems.
The peak-current-mode control scheme with
pulse-skip mode operation provides the two
switchers with fast transient response, high lightload efficiency, and a minimal number of
capacitors by using an interleaving PWM clock
between the two switchers. The 3A load switch
with a low 20mΩ on resistance provides flexible
system configuration.
A full set of enable control pins and power good
open-drain
indicators
allow
for
easy
implementation of the start-up and shutdown
sequences.
Full protection features include over-current
protection (OCP) and thermal shutdown.
The MP5403B requires a minimal number of
readily available, standard, external components
and is available in a small UTQFN-20
(2.5mmx3mm) package.
FEATURES
Up to 6V Operating Input Range
Low IQ: 85µA for Two Switchers Total
Two Buck Converters
o Peak 5A with 55mΩ/20mΩ RDS(ON)
o Peak 4A with 65mΩ/22mΩ RDS(ON)
o 1.5MHz Switching Frequency
o 180° Interleaving Operation
o 100% Duty Cycle
o Load Switch Mode by Pulling FB Low
o Latch-Off Short-Circuit Protection (SCP)
o Internal Soft Start (SS) and Output
Discharge
o Optimized Light-Load Efficiency
One Load Switch with 20mΩ RDS(ON)
o 3A with 20mΩ RDS(ON)
o Soft Start (SS) and Output Discharge
o Over-Current Protection (OCP)
EN and Power Good (PG) for Power
Sequencing
Input Power Good (PG) Indicator with
Adjustable Threshold and Delay
Thermal Shutdown
Available in a UTQFN-20 (2.5mmx3mm)
Package
APPLICATIONS
Solid-State Drives (SSD)
Portable Instruments
Battery-Powered Devices
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive.
For MPS green status, please visit the MPS website under Quality
Assurance. “MPS” and “The Future of Analog IC Technology” are registered
trademarks of Monolithic Power Systems, Inc.
MP5403B Rev. 1.0
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1
MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
TYPICAL APPLICATION
VSUS
PFL
CDELAY
SW1
R6
R5
Input Voltage
C1
PFL_ADJ
VIN1
C2
R1
FB1
MP5403B
SW2
FB2
VIN2
Output Voltage 1
Peak 5A
L1
C1A
R2
Output Voltage 2
Peak 4A
L2
R3
C1B
R4
VIN3
EN1
EN2
EN3
PG1
C2A
PG2
PG3
Output Voltage 3
3A DC
VOUT3
GND, AGND
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
ORDERING INFORMATION
Part Number*
MP5403BGQBU
Package
UTQFN-20 (2.5mmx3mm)
Top Marking
See Below
* For Tape & Reel, add suffix –Z (e.g. MP5403BGQBU–Z)
TOP MARKING
AWF: Product code of MP5403BGQBU
Y: Year code
WW: Week code
LLL: Lot number
PACKAGE REFERENCE
OUT3
VIN3
CDELAY 1
PFL
TOP VIEW
20
19
18
17 PG3
15 PG1
AGND 4
14 SW1
GND 5
13 VSUS
VIN2 6
12 SW2
FB1 7
8
9
10
EN2
VIN1 3
EN1
16 PG2
FB2
PFL_ADJ 2
11 EN3
UTQFN-20 (2.5mmx3mm)
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
ABSOLUTE MAXIMUM RATINGS (1)
Supply voltage (VIN1/2/3) ............................... 6.5V
VSW1/2................................. -0.3V (-5V for UVLO)
........................................................... 0.5V to 6V
Supply voltage (VIN3) (If VIN1 < UVLO)
........................................................... 2.7V to 6V
Output voltage (VOUT1/2) .................. 0.6V to VIN1/2
Output voltage (VOUT3)................................... VIN3
Operating junction temp. (TJ) ... -40°C to +125°C
Thermal Resistance
θJA
θJC
UTQFN-20 (2.5mmx3mm)
EV5403-QB-02A (4) ............... 35 ........ 7 .... °C/W
JESD51-7 (5) .......................... 60 ....... 13 ... °C/W
NOTES:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation produces an excessive die temperature, causing
the regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its operating
conditions.
4) Measured on EV5403-QB-02A, 4-layer PCB.
5) Measured on JESD51-7, 4-layer PCB.
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
ELECTRICAL CHARACTERISTICS
VIN1/2 = 3.6V, VIN3 = 3.6V, TJ = -40°C to 125°C(7), typical value tested at TJ = 25°C unless otherwise
noted.
Parameters
Symbol
Condition
Min
For Buck Regulators (VIN1 provides control voltage if VIN3 is lower than 2.7V)
Input voltage range
VIN1
For VIN1
2.7
Under-voltage lockout threshold
VIN1_UVLO_R For VIN1
2.3
rising
Under-voltage lockout threshold
VIN1_UVLO_H For VIN1
hysteresis
Input voltage range for rail 2
VIN2
VIN1 > VIN1_UVLO_R
2
VIN2 under-voltage lockout
VIN2_UVLO_R For VIN2
threshold rising
VIN2 under-voltage lockout
VIN2_UVLO_H For VIN2
threshold hysteresis
Supply current (shutdown)
ISD
VEN1/2/3 = 0V, TJ = 25°C
VEN1/2 = 2V, VEN3 = 0V,
Supply current (quiescent)
IQ1+Q2
VFB1/2 =1V
High-side switch on resistance
RDSON1_H
for peak 5A switcher
Low-side switch on resistance
RDSON1_L
for peak 5A switcher
High-side switch on resistance
RDSON2_H
for peak 4A switcher
Low-side switch on resistance
RDSON2_L
for peak 4A switcher
VEN1/2 = 0V, VIN1/2 = 6V,
Switch leakage current
ILK_SW1/2
VSW1/2 = 0V and 6V,
TJ = 25°C
High-side current limit for peak
ILIM1_H
6.2
5A switcher
High-side current limit for peak
ILIM2_H
5
4A switcher
Low-side zero crossing current
IZCD1/2
For both channels
Oscillator frequency
FSW1/2
CCM
1.2
Phase shift
PhS
CCM
(6)
Minimum on time
TMIN_ON
(6)
Minimum off time
TMIN_OFF
Maximum duty cycle (6)
DMAX
TJ = 25°C
594
Feedback voltage
VFB1/2
(7)
TJ = -40°C to 125°C
591
Feedback currents
IFB1/2
FB1/2 = 0.65V
Internal soft-start time
TSS1/2
For both channels
Typ
2.5
Max
Units
6
V
2.65
V
250
1.8
mV
6
V
1.85
V
300
85
mV
1
μA
110
μA
55
mΩ
20
mΩ
65
mΩ
22
mΩ
0
1
μA
8.5
A
7
A
0.1
1.5
180
70
100
100
600
600
10
0.35
MP5403B Rev. 1.0
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1.8
606
609
50
A
MHz
degree
ns
ns
%
mV
mV
nA
ms
5
MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
ELECTRICAL CHARACTERISTICS (continued)
VIN1/2 = 3.6V, VIN3 = 3.6V, TJ = -40°C to 125°C(7), typical value tested at TJ = 25°C unless otherwise
noted.
Parameters
Output discharge resistor
EN high logic
EN low hysteresis
Symbol
Issres1/2
EN1/2_H
EN1/2_L_HYS
EN1/2 input current
IEN1/2
EN1 turn-on delay
ENTD_1
EN2 turn-on delay
ENTD_2
Power good upper trip threshold
PG1/2_H
Power good lower trip threshold
PG1/2_L
Power good hysteresis
Power good delay for rising
Power good delay for falling
Power good sink current
capability
Power good leakage current
Load Switch
Input voltage range
Under voltage lockout threshold
rising
Under voltage lockout threshold
hysteresis
Supply current (quiescent)
On resistor
EN3 high logic threshold
EN3 low hysteresis
Condition
For both channels
Min
1.05
VEN = 2V
VEN = 0V
For channel 1
For channel 2, VIN1 >
VIN1_UVLO_R
FB with respect to the
regulation
FB with respect to the
regulation
PGHY
PDTD_1/2 H
PDTD_1/2 L
VPG_LO_1/2
Sink 1mA
PGLK_1/2
VPGBUS = 1.8V
Typ
13
1.3
150
1
0
100
%
-10
%
5
20
60
%
μs
μs
0.4
2.3
VIN3_UVLO_H
For VIN3
200
From VIN3, VEN1/2 = 0V,
VEN3 = 3.6V
160
ENTD_3
EN3 input current
IEN3
PG3 high logic threshold
PG3_H
PG3 low logic threshold
PG3_L
Power good delay for rising
Power good sink current
capability
Power good leakage current
PDTD_3
1.05
VIN1 > VIN1_UVLO_R
VIN1 < VIN1_UVLO_R
VEN3 = 2V
VEN3 = 0V
VIN3 - VOUT3 is smaller
than the range
VIN3 - VOUT3 is larger than
the range
VPG_LO_3
Sink 1mA
PGLK_3
VPGBUS = 1.8V
2.5
20
1.3
150
70
6
6
V
V
2.65
V
mV
250
μA
1.5
mΩ
V
mV
µs
70
1
0
150
V
μA
1
For VIN3
EN3 turn on delay
μs
+30
VIN3_UVLO_R
RDSON
EN3_H
EN3_ L_HYS
μA
μs
0.6
2.7
IQ3
1.5
Units
Ω
V
mV
100
VIN1 > VIN1_UVLO_R
VIN1 < VIN1_UVLO_R
VIN3
Max
μA
200
mV
250
mV
40
μs
0.4
1
MP5403B Rev. 1.0
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V
μA
6
MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
ELECTRICAL CHARACTERISTICS (continued)
VIN1/2 = 3.6V, VIN3 = 3.6V, TJ = -40°C to 125°C(7), typical value tested at TJ = 25°C unless otherwise
noted.
Parameters
Current limit
Internal soft-start time
Output resistor
Power Failure Circuitry
VSUS voltage
Symbol
ILIM3
Tss3
Issres
Min
VSUS
VSUS leakage current
ISUS_LK
PFL_ADJ reference
PFL_ADJ
PFL hysteresis
PFL high-to-low delay
CDELAY internal current source
Power good sink current
capability
Power good leakage current
Thermal shutdown (6)
Thermal hysteresis (6)
Condition
Typ
6.2
0.35
13
Max
3.6
VSUS = 3.6V, VIN1 = VIN3 =
0V, TJ = 25°C
TA = 25°C
TJ = -40°C to 125°C (7)
TPFL_HL
IDELAY
VPFL_LO
Sink 1mA
PFLLK
TSD
THYS
VPGBUS = 1.8V
0.594
0.591
Units
A
ms
Ω
V
0
1
μA
0.6
0.6
3
1
3.1
0.606
0.609
V
V
%
μs
μA
0.4
V
1
160
30
μA
°C
°C
NOTES:
6) Guaranteed by engineering sample characterization, not tested in production.
7) Guaranteed by characterization test, not tested in production.
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise noted.
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise noted.
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise noted.
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.2V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise noted.
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.2V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise noted.
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.2V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise noted.
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.2V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise noted.
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
PIN FUNCTIONS
Pin #
Name
1
CDELAY
2
PFL_ADJ
3
VIN1
4
5
AGND
GND
6
VIN2
7
FB1
8
FB2
9
EN1
10
EN2
11
EN3
12
SW2
13
VSUS
14
SW1
15
PG1
16
PG2
17
PG3
18
19
VIN3
OUT3
20
PFL
Description
Programmable PFL low-to-high delay time. When CDELAY is floated, the delay time is
minimized.
Power failure threshold adjust. A resistor divider connected to the voltage rails is
used to program the power failure threshold. The resistor divider must be monitored.
Input supply voltage to the peak 5A switching regulators. Place a small decoupling
capacitor as close as possible to VIN1 and GND as possible.
Analog ground.
Ground.
Input supply voltage to the peak 4A switching regulators. Place a small decoupling
capacitor as close to VIN2 and GND as possible.
Feedback voltage sense for the peak 5A regulator. Connect the output voltage of
the peak 5A regulator through a resistor divider to FB1 to achieve voltage regulation.
Pull FB1 to ground to operate the peak 5A regulator in 100% duty cycle on mode.
Feedback voltage sense for the peak 4A regulator. Connect the output voltage of
the peak 4A regulator through a resistor divider to FB2 to achieve output voltage
regulation. Pull FB2 to ground to operate the peak 4A regulator in 100% duty cycle on
mode.
Enable on/off control for the peak 5A regulator. There is a 2MΩ resistor from EN1
to GND internally. Float or ground EN1 to turn off the peak 5A regulator.
Enable on/off control for the peak 4A regulator. There is a 2MΩ resistor from EN2
to GND internally. Float or ground EN2 to turn off the peak 4A regulator.
Enable on/off control for the load switch. There is a 2MΩ resistor from EN3 to GND
internally. Float or ground EN3 to turn off the load switch.
Switch output for the peak 4A regulator. A thick, wide power routing trace is
recommended for SW2 to conduct current.
Sustain voltage. Place a small decoupling capacitor as close to VSUS and GND as
possible.
Switch output for the peak 5A regulator. A thick and wide power routing trace is
recommended for SW1 to conduct current.
Power good for the peak 5A regulator. PG1 is an open-drain output. When the output
voltage is between -10% to +30% of the regulation windows, PG1 is pulled high
externally. When there is no supply, PG1 is pulled low internally.
Power good for peak 4A regulator. PG2 is an open-drain output. When the output
voltage is between -10% to +30% of the regulation windows, PG2 is pulled high
externally. When there is no supply, PG2 is pulled low internally.
Power good for the load switch. PG3 is an open-drain output. When the output
voltage is below 200mV compared with the input voltage, PG3 is pulled high externally.
Input supply voltage for the load switch.
Output voltage for the load switch.
Power failure indicator. PFL is an open-drain output. When the PFL_ADJ voltage is
less than 0.6V, PFL is pulled low immediately.
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
BLOCK DIAGRAM
PFL
CDELAY
Vsus
PFL_ADJ
Delay
Control
+
_
PG1
Vsus
Ctrl
0.6V
Ref1
+
_
VIN1
ULVO
FB1
Internal
Soft Start
HS
FB1
Ref1
+
+
_
PWM
SW1
Driver
LS
Mode Ctrl
Slope
Comp
EN1
Output
Discharge
+
_
1.5MHz
Osc
VIN2
Slope
Comp
EN2
Internal
Soft Start
FB2
Ref2
HS
+
+
_
PWM
SW2
Driver
LS
Output
Discharge
Mode Ctrl
PG2
+
_
Ref2
+
_
FB2
Output
Clamping
VIN3
OUT3
VIN1
EN3
Charge
Pump
Soft Start
Output
Discharge
PG3
+
_
Ctrl
GND,AGND
Figure 1: Functional Block Diagram
MP5403B Rev. 1.0
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MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
OPERATION
The MP5403B has two step-down regulators and
one load switch integrated into an ultra-small
UTQFN-20 package. The two buck regulators
are able to run up to a peak 5A and peak 4A load
current, respectively. With a peak-current-mode
control scheme and an interleaving PWM clock,
the MP5403B minimizes the input voltage ripple
and achieves a fast dynamic load response. A
3A load switch with only 20mΩ of RDS(ON) can
achieve extremely small conduction loss and
provide tight regulation with a high load current.
The load switch can also clamp VOUT to 5.5V.
The MP5403B can be used in compact solidstate drives (SSD), portable instruments, and
battery-powered devices.
Peak-Current-Mode Control
The two buck regulators of the MP5403B
operate at an 180° phase shift to reduce the
input current ripple and the required input
capacitor. In continuous conduction mode
(CCM), two internal clocks control the switching
behavior. The high-side MOSFET (HS-FET)
turns on at the corresponding clock’s rising edge.
Two clocks are at an 180° phase shift. With the
high-side switch current increases and reaches
the internal compensation voltage, the high-side
switch is turned off, and the low-side switch is
turned on to conduct current.
Figure 2: Phase Shift
The switching frequency is 1.5MHz, typically,
running in CCM. With a lower input voltage, the
switching frequency falls and works with a large
duty cycle and a fixed off-time mode.
Light-Load Operation
In light-load mode, the MP5403B uses a
proprietary control scheme to save power and
improve efficiency. The MP5403B turns off the
low-side switch when the inductor current begins
reversing.
Then
MP5403B
works
in
discontinuous
conduction
mode
(DCM)
operation. With light-load mode control, the
switching loss can be reduced greatly due to the
lower switching frequency.
A zero-current cross detection (ZCD) circuit is
used to detect if the inductor current begins
reversing. Considering the internal circuit
propagation time, the typical delay is 50ns. This
means that the inductor current continues falling
after ZCD is triggered in this delay. If the inductor
current falling slew rate is fast (VOUT is high or
close to VIN), the low-side MOSFET (LS-FET) is
turned off, and the inductor current may be
negative. This prevents the MP5403B from
entering DCM operation. If DCM operation is
required, the off time of the LS-FET in CCM
should be longer than 100ns. For example, if VIN
is 3.6V and VOUT is 3.4V, then the off time in CCM
is 37ns. It is difficult to enter DCM at light load.
Using a smaller inductor can improve this and
make it easier to enter DCM.
Enable (EN)
When VIN1 is greater than the under-voltage
lockout (UVLO) threshold (typically 2.7V), the
regulators or the load switch can be enabled by
pulling its EN pins above the EN UVLO
threshold. Leave the EN pins floating or pull the
EN pins down to ground to disable the
corresponding channel. There is an internal 2MΩ
resistor from the EN pins to ground. There is a
delay of about 100µs for VIN1 and VIN2 enable
start-up. The VIN3 enable start-up delay is
shorter (around 70µs).
Soft Start (SS) and Output Discharge
The MP5403B has a built-in soft start (SS) that
ramps up the output voltage at a controlled slew
rate to prevent overshooting at start-up for both
step-down regulators and the load switch. The
soft-start time is set to around 0.35ms. When the
regulators are disabled, the internal discharge
resistor discharges VOUT. The discharge resistor
is biased by VSUS (see Table 1).
MP5403B Rev. 1.0
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12/5/2017
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17
MP5403B – DUAL BUCK AND ONE LOAD SWITCH PMIC
Table 1: Output Discharge Conditions
Output Discharge
VIN
EN
No
>UVLO
High
Yes
>UVLO
Low
Yes
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