MP5403
Configurable 2.7V-6V Mini PMIC
with Dual 2.5A/3.5A Buck, One Load Switch,
and Input Power Supervisory
DESCRIPTION
FEATURES
The MP5403 is a monolithic power
management unit containing two highefficiency, step-down, switching converters and
a load switch. The two regulators supply current
up to 3.5A and 2.5A separately, and the load
switch supplies up to 3A of load current with an
extremely low RDS(ON). With an input range of up
to 6V, the MP5403 is ideal for powering ASIC
and SOC for solid-state drives and other
compact power systems.
The peak-current-mode control scheme with
pulse-skip-mode operation provides the two
switchers with fast transient response, high
light-load efficiency, and minimum capacitance
by using an interleaving PWM clock between
the two switchers. The 3A load switch with a
low 20mΩ on resistance provides flexible
system configuration.
A full set of enable control pins and power good
open-drain
indicators
allow
for
easy
implementation of the start-up and shutdown
sequences.
Full protection features include over-current
protection (OCP) and thermal shutdown.
The MP5403 requires a minimal number of
readily
available,
standard,
external
components and is available in a small UTQFN20 (2.5mmx3mm) package.
Low Iq: 85µA for Two Switchers Total
Two Buck Converters
o 3.5A with 55mΩ/20mΩ RDS(ON)
o 2.5A with 60mΩ/22mΩ RDS(ON)
o 1.5MHz Switching Frequency
o 180° Interleaving Operation
o 100% Duty Cycle
o Load Switch Mode by Pulling FB Low
o Latch-Off Short-Circuit Protection (SCP)
o Parallel Capability by Connecting SW
Nodes Together
o Internal Soft Start and Output Discharge
o Optimized Light-Load Efficiency
Available Fixed Output Options via Package
Trim:
Ch1: 0.9V, 1.1V, 2.5V, 2.85V
Ch2: 0.9V, 1.2V, 1.8V, 2.5V
One Load Switch
o 3A with 20mΩ RDS(ON)
o Soft Start and Output Discharge
o Over-Current Protection (OCP)
EN and Power Good for Power Sequencing
Input Power Failure Indicator (PFL) with
Adjustable Threshold and Delay
Thermal Shutdown
Available in Ultra-Thin UTQFN-20
(2.5mmx3mm) Package
APPLICATIONS
Solid-State Drives
Hybrid Drives
Low Voltage System Power
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For
MPS green status, please visit the MPS website under Quality
Assurance. “MPS” and “The Future of Analog IC Technology” are registered
trademarks of Monolithic Power Systems, Inc.
MP5403 Rev. 1.0
9/20/2016
www.MonolithicPower.com
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© 2016 MPS. All Rights Reserved.
1
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
TYPICAL APPLICATION
VSUS
PFL
CDELAY
SW1
R6
R5
Input Voltage
C1
PFL_ADJ
VIN1
C2
SW2
FB2
VIN2
C1A
R1
FB1
MP5403
Output Voltage 1
3.5A DC
L1
R2
Output Voltage 2
2.5A DC
L2
C1B
R3
R4
VIN3
EN1
EN2
EN3
C2A
PG2
PG3
Output Voltage 3
3A DC
OUT3
PG1
GND, AGND
Two Bucks and One Load Switch
VSUS
PFL
CDELAY
R6
R5
Input Voltage
C1
PFL_ADJ
VIN1
C2
SW1
SW2
L1
R1
FB1
FB2
C1A
C1B
R2
MP5403
VIN2
VIN3
EN1
EN2
EN3
OUT3
PG1
C2A
PG2
PG3
GND, AGND
One Parallel Buck and One Load Switch
MP5403 Rev. 1.0
9/20/2016
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© 2016 MPS. All Rights Reserved.
2
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
ORDERING INFORMATION
Part Number*
MP5403GQBU
Package
UTQFN-20 (2.5mmx3mm)
Top Marking
See Below
* For Tape & Reel, add suffix –Z (e.g. MP5403GQBU–Z)
TOP MARKING
APZ: Product code of MP5403GQBU
Y: Year code
WW: Week code
LLL: Lot number
PACKAGE REFERENCE
OUT3
VIN3
CDELAY 1
PFL
TOP VIEW
20
19
18
17 PG3
15 PG1
AGND 4
14 SW1
GND 5
13 VSUS
VIN2 6
12 SW2
FB1 7
8
9
10
EN2
VIN1 3
EN1
16 PG2
FB2
PFL_ADJ 2
11 EN3
UTQFN-20 (2.5mmx3mm)
MP5403 Rev. 1.0
9/20/2016
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© 2016 MPS. All Rights Reserved.
3
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
ABSOLUTE MAXIMUM RATINGS (1)
Supply voltage (VIN1/2/3) ...........................6.5V
VSW1/2 ................................ -0.3V (-5V for UVLO, supply voltage (VIN3) ..............
......................................................... 0.5V to 6V
If VIN1 < UVLO, supply voltage (VIN3) ..............
......................................................... 2.7V to 6V
Output voltage (VOUT1/2) ............... 0.6V to VIN1/2
Output voltage (VOUT3)................................ VIN3
Operating junction temp. (TJ) ... -40°C to +125°C
MP5403 Rev. 1.0
9/20/2016
Thermal Resistance (4)
θJA
θJC
UTQFN-20 (2.5mmx3mm) ..... 60 ....... 13 ... °C/W
NOTES:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation produces an excessive die temperature, causing
the regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
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4
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
ELECTRICAL CHARACTERISTICS
VIN1/2 = 3.6V, VIN3 = 3.6V, TJ = -40°C to 125°C (7), typical value is tested at TJ = 25°C unless
otherwise noted.
Parameters
Symbol
Buck Regulators
Condition
Min
VIN1
For VIN1
2.7
VIN1_R
For VIN1
2.3
VIN1_HYS
For VIN1
Input voltage range
Under-voltage lockout threshold
rising
Under-voltage lockout threshold
hysteresis
Input voltage range for Rail2
VIN2 under-voltage lockout threshold
rising
VIN2 under-voltage lockout threshold
hysteresis
Supply current (shutdown)
Supply current (quiescent)
High-side switch on resistance for
3.5A switcher
Low-side switch on resistance for
3.5A switcher
High-side switch on resistance for
2.5A switcher
Low-side switch on resistance for
2.5A switcher
Switch leakage current
High-side current limit for 3.5A
switcher
High-side current limit for 2.5A
switcher
Low-side zero crossing current
Oscillator frequency
Phase shift
Minimum on time (6)
Minimum off time (6)
Maximum duty cycle (6)
VIN2
VIN1 > VIN1_R
2.5
Max
Units
6
V
2.65
V
250
2
VIN2_R
For VIN2
1.8
VIN2 _HYS
For VIN2
300
ISD
IQ1+Q2
VEN1/2/3 = 0V, TJ = 25°C
VEN1/2 = 2V, VEN3 = 0V,
VFB1/2 = 1V
85
mV
6
V
1.85
V
mV
1
μA
110
μA
RDS(ON)1_H
55
mΩ
RDS(ON)1_L
20
mΩ
RDS(ON)2_H
65
mΩ
RDS(ON)2_L
22
mΩ
ILK_SW1/2
VEN1/2 = 0V, VIN1/2 = 6V,
VSW1/2 = 0V and 6V,
TJ = 25°C
0
1
μA
ILIM1_H
Duty = 33%
4.5
5.6
A
ILIM2_H
Duty = 33%
3.5
4.7
A
IZCD1/2
FSW1/2
For both channels
CCM
1.2
0.1
1.5
A
MHz
PhS
TMIN_ON
TMIN_OFF
DMAX
CCM
1.8
180
70
100
100
degree
ns
ns
%
TJ = 25°C
594
600
606
mV
TJ = -40°C to 125°C (7)
591
600
609
mV
10
50
nA
Feedback voltage
VFB1/2
Feedback currents
IFB1/2
FB1/2 = 0.65V
Internal soft-start time
TSS1/2
From 10% VOUT to 90%
VOUT
Output discharge resistor
RDIS1/2
MP5403 Rev. 1.0
9/20/2016
Typ
(5)
0.35
ms
13
Ω
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5
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
ELECTRICAL CHARACTERISTICS (continued)
VIN1/2 = 3.6V, VIN3 = 3.6V, TJ = -40°C to 125°C (7), typical value is tested at TJ = 25°C unless
otherwise noted.
Parameters
Symbol
EN high logic
EN hysteresis
EN1/2_H
EN1/2_HYS
EN1/2 input current
IEN1/2
EN1 turn-on delay
ENTD_1
EN2 turn-on delay
ENTD_2
Power good upper trip threshold
PG1/2_H
Power good lower trip threshold
PG1/2_L
Power good hysteresis
Power good delay for rising
Power good delay for falling
Power good sink current capability
Power good leakage current
Load Switch
Input voltage range
Under-voltage lockout threshold
rising
Under-voltage lockout threshold
hysteresis
Supply current (quiescent)
Max
Units
1.05
1.3
150
1
0
1.5
V
mV
VEN = 2V
VEN = 0V
For channel 1
For channel 2,
VIN1 > VIN1_R
FB with respect to the
regulation
FB with respect to the
regulation
μs
100
μs
+30
%
-10
%
5
20
60
%
μs
μs
V
μA
0.4
1
VIN3_R
For VIN3
2.3
VIN3_HYS
For VIN3
200
From VIN3, VEN1/2 = 0V,
VEN3 = 3.6V
160
IQ3
ENTD_3
EN3 input current
IEN3
PG3 high logic threshold
PG3_H
PG3 low logic threshold
PG3_L
PDTD_3
VPG_LO_3
PGLK_3
ILIM3
μA
100
0.6
2.7
EN3 turn-on delay
MP5403 Rev. 1.0
9/20/2016
Typ
VIN1 > VIN1_R
VIN1 < VIN1_R
VIN3
RDSON
EN3_H
EN3_HYS
Current limit
Min
PGHY
PDTD_1/2 H
PDTD_1/2 L
VPG_LO_1/2 Sink 1mA
PGLK_1/2 VPG = 1.8V
On resistor
EN3 high logic threshold
EN3 hysteresis
Power good delay for rising
Power good sink current capability
Power good leakage current
Condition
1.05
2.5
20
1.3
150
6
6
V
V
2.65
V
mV
250
μA
1.5
mΩ
V
mV
VIN1 > VIN1_R
70
VIN1 < VIN1_R
70
VEN3 = 2V
VEN3 = 0V
VIN3 - VOUT3 is smaller
than the range
VIN3 - VOUT3 is larger than
the range
1
0
μA
200
mV
250
mV
40
1
μs
V
μA
5.6
A
Sink 1mA
VPG = 1.8V
150
µs
0.4
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6
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
ELECTRICAL CHARACTERISTICS (continued)
VIN1/2 = 3.6V, VIN3 = 3.6V, TJ = -40°C to 125°C (7), typical value is tested at TJ = 25°C unless
otherwise noted.
Parameters
Symbol
Internal soft-start time
Tss3
Output resistor
Power Failure Circuitry
VSUS voltage
VSUS leakage current
PFL_ADJ reference
PFL hysteresis
PFL high-to-low delay
CDELAY internal current source
Power good sink current capability
Power good leakage current
Thermal shutdown (6)
Thermal hysteresis (6)
Condition
Min
From 10% VOUT to 90%
VOUT
Typ
Max
Units
0.35
ms
RDIS
13
Ω
VSUS
3.6
V
VSUS = 3.6V, VIN1 = VIN3
= 3.6V, TJ = 25°C
TA = 25°C
PFL_ADJ
TA = -40°C to 125°C (7)
PFL_HYS
ISUS_LK
TPFL_HL
IDELAY
VPFL_LO
PFLLK
TSD
THYS
594
591
0
1
μA
600
600
3
606
609
mV
%
1
3.1
Sink 1mA
VPFL = 1.8V
0.4
1
160
30
μs
μA
V
μA
°C
°C
NOTES:
5) VIN1 provides control voltage if VIN3 is lower than 2.7V.
6) Guaranteed by design.
7) Guaranteed by characterization test, not production tested.
MP5403 Rev. 1.0
9/20/2016
www.MonolithicPower.com
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© 2016 MPS. All Rights Reserved.
7
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise noted.
MP5403 Rev. 1.0
9/20/2016
www.MonolithicPower.com
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© 2016 MPS. All Rights Reserved.
8
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise
noted.
MP5403 Rev. 1.0
9/20/2016
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© 2016 MPS. All Rights Reserved.
9
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.8V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise
noted.
MP5403 Rev. 1.0
9/20/2016
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© 2016 MPS. All Rights Reserved.
10
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.2V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise
noted.
MP5403 Rev. 1.0
9/20/2016
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© 2016 MPS. All Rights Reserved.
11
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.2V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise
noted.
MP5403 Rev. 1.0
9/20/2016
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© 2016 MPS. All Rights Reserved.
12
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 5V, VOUT1 = 1.2V, VOUT2 = 1.2V, L1 = 0.47µH, L2 = 0.47µH, TA = +25°C, unless otherwise
noted.
MP5403 Rev. 1.0
9/20/2016
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13
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
PIN FUNCTIONS
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
MP5403 Rev. 1.0
9/20/2016
Name
Description
Programmable PFL low-to-high delay time. When CDELAY is floated, the delay time is
CDELAY
minimized.
Power failure threshold adjust. A resistor divider connected to the voltage rails is
PFL_ADJ used to program the power failure threshold. The resistor divider needs to be
monitored.
Input supply voltage to the 3.5A switching regulators and internal logic module.
VIN1
Place a small decoupling capacitor as close to VIN1 and GND as possible.
Analog ground.
AGND
Ground.
GND
Input supply voltage to the 2.5A switching regulators. Place a small decoupling
VIN2
capacitor as close to VIN2 and GND as possible.
Feedback voltage sensing for the 3.5A regulator. Connect the output voltage of the
FB1
3.5A regulator through a resistor divider to FB1 to achieve output voltage regulation.
Pull FB1 to ground to operate the 3.5A regulator in 100% duty cycle on mode.
Feedback voltage sensing for the 2.5A regulator. Connect the output voltage of the
FB2
2.5A regulator through a resistor divider to FB2 to achieve output voltage regulation.
Pull FB2 to ground to operate the 2.5A regulator in 100% duty cycle on mode.
Enable on/off control for the 3.5A regulator. There is a 2MΩ resistor from EN1 to
EN1
GND internally. Float or ground EN1 to turn off the 3.5A regulator.
Enable on/off control for the 2.5A regulator. There is a 2MΩ resistor from EN2 to
EN2
GND internally. Float or ground EN2 to turn off the 2.5A regulator.
Enable on/off control for the load switch. There is a 2MΩ resistor from EN3 to GND
EN3
internally. Float or ground EN3 to turn off the load switch.
Switch output for the 2.5A regulator. A thick and wide power routing trace is
SW2
recommended for SW2 to conduct current.
Sustain voltage. Place a small decoupling capacitor as close to VSUS and GND as
VSUS
possible.
Switch output for the 3.5A regulator. A thick and wide power routing trace is
SW1
recommended for SW1 to conduct current.
Power good for the 3.5A regulator. PG1 is an open-drain output. When the output
PG1
voltage is between -10% to +30% of the regulation, PG1 is pulled high externally.
When there is no supply, PG1 is pulled low internally.
Power good for the 2.5A regulator. PG2 is an open-drain output. When the output
PG2
voltage is between -10% to +30% of the regulation, PG2 is pulled high externally.
When there is no supply, PG2 is pulled low internally.
Power good for the load switch. PG3 is an open-drain output. When the output
PG3
voltage is below 200mV compared with the input voltage, PG3 is pulled high externally.
Input supply voltage for the load switch.
VIN3
Output voltage for the load switch.
OUT3
Power failure indicator. PFL is an open-drain output. When the PFL_ADJ voltage is
PFL
less than 0.6V, PFL is pulled low immediately.
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14
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
BLOCK DIAGRAM
PFL
CDELAY
Vsus
PFL_ADJ
Delay
Control
+
_
PG1
Vsus
Ctrl
0.6V
Ref1
+
_
VIN1
ULVO
FB1
Internal
Soft Start
HS
FB1
Ref1
+
+
_
PWM
SW1
Driver
LS
Mode Ctrl
Slope
Comp
EN1
Output
Discharge
+
_
1.5MHz
Osc
VIN2
Slope
Comp
EN2
Internal
Soft Start
FB2
Ref2
HS
+
+
_
PWM
SW2
Driver
LS
Output
Discharge
Mode Ctrl
PG2
+
_
Ref2
+
_
FB2
Output
Clamping
VIN3
OUT3
VIN1
EN3
Charge
Pump
Soft Start
Output
Discharge
PG3
+
_
Ctrl
GND, AGND
Figure 1: Functional Block Diagram
MP5403 Rev. 1.0
9/20/2016
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15
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
OPERATION
The MP5403 has two step-down regulators and
one load switch integrated into an ultra-small
UTQFN-20 package. The two buck regulators
are able to run up to 3.5A and 2.5A of load
current, respectively. With a peak current mode
control scheme and an interleaving PWM clock,
the MP5403 minimizes the input voltage ripple
and achieves a fast dynamic load response.
The load switch has 3A and only 20mΩ of
RDS(ON), achieves extremely small conduction
loss, and provides tight regulation with a high
load current. The load switch can also clamp
VOUT to 5.5V. The MP5403 can be used in
compact solid-state drives (SSD), portable
instruments, and battery-powered devices.
Peak-Current Mode Control
The two buck regulators of the MP5403 operate
at an 180° phase shift to reduce the input
current ripple and the required input capacitor.
In continuous conduction mode (CCM), two
internal clocks control the switching behavior.
The high-side MOSFET (HS-FET) turns on at
the corresponding clock’s rising edge. The two
clocks are at an 180o phase shift. When the
high-side switch current increases and reaches
the internal compensation voltage, the high-side
switch is turned off, and the low-side switch is
turned on to conduct current.
Figure 2: Phase Shift
The switching frequency is 1.5MHz, typically,
running in CCM. With a lower input voltage, the
switching frequency falls and works with a large
duty cycle and a fixed off-time mode.
MP5403 Rev. 1.0
9/20/2016
Light-Load Operation
In light load mode, the MP5403 uses a
proprietary control scheme to save power and
improve efficiency. The MP5403 turns off the
low-side switch when the inductor current
begins reversing. The MP5403 then works in
discontinuous
conduction
mode
(DCM)
operation. With light-load mode control, the
switching loss can be greatly reduced due to
the lower switching frequency.
A zero-current cross detection (ZCD) circuit is
used to detect if the inductor current begins
reversing. Considering the internal circuit
propagation time, the typical delay is 50ns. This
means that the inductor current continues
falling after ZCD is triggered in this delay. If the
inductor current falling slew rate is fast (VOUT is
high or close to VIN), the low-side MOSFET
(LS-FET) is turned off, and the inductor current
may be negative. This prevents the MP5403
from entering DCM operation. If DCM operation
is required, the off time of the LS-FET in CCM
should be longer than 100ns. For example, if
VIN is 3.6V and VOUT is 3.4V, then the off time
in CCM is 37ns. It is difficult to enter DCM at
light load. Using a smaller inductor can improve
this and make it easier to enter DCM.
Enable (EN)
When VIN1 is greater than the under-voltage
lockout (UVLO) threshold (typically 2.5V), the
regulators or the load switch can be enabled by
pulling its EN pins above the EN UVLO
threshold. Leave the EN pins floating or pull the
EN pins down to ground to disable the
corresponding channel. There is an internal
2MΩ resistor from the EN pins to ground. There
is a delay of about 100µs for the VIN1 and VIN2
enable start-up. The VIN3 enable start-up delay
is shorter (around 70µs).
Soft Start (SS) and Output Discharge
The MP5403 has a built-in soft start (SS) that
ramps up the output voltage at a controlled slew
rate to prevent overshooting at start-up for both
step-down regulators and the load switch. For
the step-down regulator, the soft-start time is
about 500µs, typically. For the load switch, the
soft-start time is set to around 350µs. When the
regulators are disabled, the internal discharge
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16
MP5403 – CONFIGURABLE 2.7V-6V MINI PMIC WITH DUAL 2.5A/3.5A BUCK,
ONE LOAD SWITCH, AND INPUT POWER SUPERVISORY
resistor discharges VOUT. The discharge resistor
is biased by VSUS (see Table 1).
Table 1: Output Discharge Conditions
Output Discharge
VIN
EN
No
>UVLO
High
Yes
>UVLO
Low
Yes
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