MP6005A
420kHz, 8V to 80V Input Voltage Range,
High-Efficiency Flyback/Forward Controller
DESCRIPTION
FEATURES
The MP6005A is a peak current mode flyback
and forward controller. It is specifically designed
for
wide-input,
high-frequency
flyback
application,
and active-clamped forward
application.
The MP6005A operates within a wide 8V to 80V
input voltage range. Current mode control
provides simple loop compensation and cycleby-cycle current limit. The MP6005A provides a
420kHz frequency to minimize external
components. The 2A GATE driver minimizes
the power loss of the external MOSFET. The
0.8A SYNC driver provides a high-efficiency
solution for active-clamped forward topology.
The MP6005A also features frequency
dithering, soft start, overload protection (OLP)
and over-voltage protection (OVP).
Wide 8V to 80V Input Voltage Range
420kHz Fixed Switching Frequency
2A GATE and 0.8A SYNC Drivers
Internal VCC Supply Compatible with 16V
External Power
160mV Switching Current-Sense (CS) Limit
Synchronous SYNC Driver for HighEfficiency, Active-Clamped Forward
Solution
Hiccup Protection for Overload Protection
(OLP), Short-Circuit Protection (SCP), OverVoltage Protection (OVP) and Thermal
Shutdown
EMI Reduction with Frequency Dithering
Available in a QFN-10 (3mmx3mm)
Package
APPLICATIONS
The MP6005A is available in a QFN-10
(3mmx3mm) package.
Security Cameras
Video Telephones
Wireless Access Points (WAPs)
Point-of-Sale (POS) Systems
Power over Ethernet (PoE) Systems
Industrial Isolated Power Supplies
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under
Quality Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are
trademarks of Monolithic Power Systems, Inc. or its subsidiaries.
TYPICAL APPLICATION
Efficiency
Flyback mode, VOUT = 12V
D1
VIN
R4
C1
100
VOUT
C4
MP6005A
90
C2
D2
80
EN
R5
SYNC
U2A
VCC
C3
COMP
Q1
SENSE
U2B
C5
R6
R1
GATE
DT GND OV
R3
Q2
TL431
R2
EFFICIENCY (%)
VIN
70
60
50
VIN=9V
VIN=24V
VIN=36V
40
30
0
0.5
1
1.5
LOAD CURRENT (A)
MP6005A Rev. 1.0
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7/16/2021
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1
MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
ORDERING INFORMATION
Part Number*
MP6005AGQ
Package
QFN-10 (3mmx3mm)
Top Marking
See Below
MSL Rating
1
* For Tape & Reel, add suffix -Z (e.g. MP6005AGQ-Z).
TOP MARKING
BKL: Product code of MP6005AGQ
Y: Year code
LLL: Lot number
PACKAGE REFERENCE
TOP VIEW
VCC
10 GATE
1
SENSE 2
9
SYNC
EN 3
8
GND
VIN 4
7
OV
DT 5
6
COMP
QFN-10 (3mmx3mm)
MP6005A Rev. 1.0
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2
MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
PIN FUNCTIONS
Pin #
Name
Description
Internal circuit supply pin. VCC is powered through the internal LDO from VIN. Connect a
capacitor from VCC to GND to bypass the internal regulator. The VCC capacitor must be at
minimum 1μF for flyback application and 4.7μF for forward application. VCC also can be
powered by an external power source to save internal LDO loss.
Current sense and frequency dither setting pin. See the Current Sense and Over-Current
Protection (OCP) section on page 14, as well as the Frequency Dithering section on page 14,
for more details.
Controller on/off control pin. The EN pin is internally connected to GND through a 2.5MΩ
resistor.
1
VCC
2
SENSE
3
EN
4
VIN
5
DT
6
COMP
7
OV
8
GND
Ground. The GND pin is the power return for the controller.
9
SYNC
Synchronous MOSFET gate driver pin.
10
GATE
Main MOSFET gate driver pin.
Input power supply pin. Connect a bypass capacitor from VIN to GND.
Dead time setting pin. The DT pin can configure the dead time between the GATE and
SYNC pins. A resistor below 33kΩ must be connected from DT to GND. See the Dead Time
Setting section on page 16 for more details.
Feedback pin through the optocoupler. COMP is internally pulled up to 5V through a 10kΩ
resistor.
Over-voltage monitor pin. When the voltage on the OV pin exceeds 2.5V, over-voltage
protection (OVP) is triggered. Connect OV to GND if OVP is not required.
ABSOLUTE MAXIMUM RATINGS
(1)
VIN ............................................ -0.3V to +100V
VCC, GATE, SYNC ................... -0.3V to +18V
EN .......................................... -0.3V to +6.5V (2)
OV .......................................... -0.5V to +5.5V (3)
All other pins ............................... -0.3V to +5.5V
EN sinking current ............................... 0.5mA (2)
OV sinking current ............................... .±2mA (3)
Continuous power dissipation (TA = 25°C)
QFN-10 (3mmx3mm) ....................... 2.66W (4) (6)
Junction temperature ............................... 150°C
Lead temperature .................................... 260°C
Storage temperature ................ -65°C to +150°C
Recommended Operating Conditions (5)
Supply voltage (VIN) ........................... 8V to 80V
Maximum VCC, GATE, SYNC voltage ....... ±16V
Maximum EN sinking current ............... 0.4mA (2)
Maximum OV sinking current .................. 1mA (3)
Operating junction temp (TJ). ... -40°C to +125°C
Thermal Resistance
θJA
θJC
QFN-10 (3mmx3mm)
EV6005A-Q-00A (6) ..................47.......8.....°C/W
JESD51-7 (7).............................50…...12....°C/W
Notes:
1) Exceeding these ratings may damage the device.
2) When the EN pull-up voltage is high, a current flows into the
EN pin. The current should be limited by an external pull-up
resistor. See the Enable Control Setting section on page 16
for more details.
3) OV is clamped by the internal circuit. The sink/source current
should be limited.
4) The maximum allowable power dissipation is a function of the
maximum junction temperature, TJ (MAX), the junction-toambient thermal resistance, θJA, and the ambient
temperature, TA. The maximum allowable continuous power
dissipation at any ambient temperature is calculated by P D
(MAX) = (TJ (MAX) - TA) / θJA. Exceeding the maximum
allowable power dissipation can cause excessive die
temperature, and the regulator may go into thermal shutdown.
Internal thermal shutdown circuitry protects the device from
permanent damage.
5) The device is not guaranteed to function outside of its
operating conditions.
6) Measured on EV6005A-Q-00A, 2-layer 90mmx35mm PCB.
7) The value of θJA given in this table is only valid for comparison
with other packages and cannot be used for design purposes.
These values were calculated in accordance with JESD51-7,
and simulated on a specified JEDEC board. They do not
represent the performance obtained in an actual application.
MP6005A Rev. 1.0
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7/16/2021
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
ELECTRICAL CHARACTERISTICS
VIN = 48V, VEN = 5V, TJ = -40°C to 125°C (8), typical value is tested at 25°C, unless otherwise noted.
Parameter
Symbol Condition
Min
Typ
Max
Units
Power supply and UVLO
VIN UVLO rising threshold
VIN-R
VIN rising, start charging VCC
4.5
5.5
6.5
V
VIN UVLO falling threshold
VCC regulation voltage
VCC dropout voltage
VCC UVLO rising threshold
VCC UVLO falling threshold
VIN-F
VCC
VIN falling
Load = 0mA to 20mA
VIN = 8V, IVCC = 10mA
VIN exceeds VIN-R, VCC rising
VIN exceeds VIN-R, VCC falling
DT = 0V, VCOMP = 0V, IQ = IIN-ICOMP,
GATE and SYNC floating
VEN = 0V
3.8
4.8
8.5
1.5
5.7
5.3
5.8
V
V
V
V
V
Start switching
Stop switching
1.93
VCC-DROP
VCC-R
VCC-F
Quiescent current
IQ
Shutdown current
Enable Control
ISD
EN turn-on threshold
EN turn-on hysteresis
EN high micro-power
threshold
EN low micro-power
threshold
EN input current
EN turn-on delay
OVP Monitor
OVP threshold
OV leakage current
OVP hiccup off time
Error Amplifier
VEN-R
VEN-HYS
VEN-H
Start internal logic
VEN-L
Stop internal logic
IEN
COMP high voltage
COMP internal pull-up
resistor
Soft Start
VCOMP
Internal soft-start time
tSS
6.0
5.6
μA
550
2
0.2
1
μA
2.07
V
V
1.0
V
0.4
VEN = 5V
EN on to GATE output
VOVP
IOV
5.4
5.0
V
μA
μs
2
500
2.4
VOV = 2V
DT = 0V, float COMP
When DT = 0V, test COMP from
1.5V to 3.5V
2.5
2.6
V
10
340
50
nA
ms
5
V
10
kΩ
20
ms
Current Sense
Maximum current sense limit
SCP limit
Current leading-edge
blanking time
Current-sense amplifier gain
SENSE input bias current
PWM Switching
ILIMIT-MAX
140
160
180
mV
240
300
360
mV
tLEB
250
ns
GCS
11
10
50
V/V
nA
VSENSE = 160mV
Switching frequency
fSW
Dead Time, Dither (DT and SENSE Pin)
378
420
462
kHz
DT pin detection current
SENSE pin detection current
35
90
40
100
45
110
μA
μA
IDT
ISENSE
MP6005A Rev. 1.0
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
ELECTRICAL CHARACTERISTICS (continued)
VIN = 48V, VEN = 5V, TJ = -40°C to 125°C (8), typical value is tested at 25°C, unless otherwise noted.
Parameter
DT pin and SENSE pin detection
period
DT pin and SENSE pin detection
threshold voltage (9)
Symbol Condition
Min
tDT,
tSENSE
VDT,
VSENSE
Typ
Max
μs
200
Voltage level 1 range
Voltage level 2 range
Voltage level 3 range
Voltage level 4 range
0.15
0.4
0.85
1.5
0.25
0.55
1.1
Units
V
V
V
V
GATE Driver Signal
GATE driver impedance
(sourcing)
GATE driver impedance (sinking)
GATE source current capability
IGATE
IGATE = -20mA
IGATE
IGATE = 20mA
VCC = 8.5V, GATE = 10nF,
test gate rising speed
VCC = 8.5V, GATE = 10nF,
test gate falling speed
(10)
GATE sink current capability (10)
GATE output high voltage
VGATE
GATE output low voltage
Minimum GATE on time
GATE maximum duty cycle
SYNC driver signal
VGATE
tON-MIN
DMAX
SYNC driver impedance
(sourcing)
SYNC driver impedance (sinking)
Ω
2
A
1.7
A
VCC 0.05
V
0.05
250
70
V
ns
%
5
Ω
ISYNC
IGATE = 20mA
2
Ω
0.8
A
1.2
A
VCC = 8.5V, SYNC =
10nF, test SYNC rising
speed
VCC = 8.5V, SYNC =
10nF, test SYNC falling
speed
SYNC sink current capability (10)
SYNC output high voltage
VSYNC
SYNC output low voltage
Protection
VSYNC
Thermal shutdown hysteresis (10)
1.7
IGATE = -20mA
(10)
(10)
Ω
ISYNC
SYNC source current capability
Overload protection hiccup on
time (10)
Overload protection hiccup off
time (10)
Thermal shutdown temperature
2
VCC 0.05
V
0.05
V
4.8
ms
340
ms
TSD
150
°C
THYS
20
°C
Notes:
8) Not tested in production. Guaranteed by over-temperature correlation.
9) See Table 1 and Table 2 on page 14 for the different voltage options.
10) Guaranteed by engineering sample characterization.
MP6005A Rev. 1.0
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7/16/2021
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
TYPICAL CHARACTERISTICS
VIN = 48V, VEN= 5V, TA = 25°C, unless otherwise noted.
VCC Load Regulation
Quiescent Current vs. Input Voltage
9
700
650
7
600
6
5
IQ (μA)
VCC VOLTAGE (V)
8
4
3
VIN=8V
VIN=48V
2
500
450
1
0
550
5
10
15
VCC LOAD CURRENT (mA)
400
20
0
60
80
VIN UVLO vs. Junction Temperature
500
6
400
5.5
VIN UVLO (V)
ISHUTDOWN (nA)
40
INPUT VOLTAGE (V)
Shutdown Current vs. Input Voltage
300
200
100
5
4.5
4
Rising
Falling
3.5
0
3
0
20
40
60
INPUT VOLTAGE (V)
80
-50
VCC UVLO vs. Junction Temperature
2.1
5.6
2
5.2
4.8
Rising
Falling
4.4
4
-50
0
50
100
JUNCTION TEMPERATURE (℃)
150
0
50
100
JUNCTION TEMPERATURE (℃)
150
EN UVLO vs. Junction Temperature
6
EN UVLO(V)
VCC UVLO (V)
20
1.9
1.8
1.7
Rising
Falling
1.6
1.5
-50
0
50
100
JUNCTION TEMPERATURE (℃)
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6
MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
TYPICAL CHARACTERISTICS (continued)
VIN = 48V, VEN = 5V, TA = 25°C, unless otherwise noted.
OVP Threshold vs. Junction
Temperature
Frequency vs. Junction Temperature
280
2.6
270
2.55
260
fsw (kHz)
VOVP (V)
2.5
2.45
250
240
230
2.4
220
2.35
210
2.3
-50
0
50
100
JUNCTION TEMPERATURE (℃)
150
200
-50
0
50
100
JUNCTION TEMPERATURE (℃)
150
Current Limit vs. Junction
Temperature
180
VLIMIT (mV)
170
160
150
140
130
120
-50
0
50
100
JUNCTION TEMPERATURE (℃)
150
MP6005A Rev. 1.0
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 24V, VEN = 5V, VOUT = 12V, POUT = 20W, TA = 25°C, unless otherwise noted.
Efficiency
Load Regulation
100
0.2
90
LOAD REGULATION (%)
EFFICIENCY (%)
80
70
60
50
VIN=9V
VIN=24V
VIN=36V
40
30
0
0.5
1
1.5
LOAD CURRENT (A)
2
Vin=9V
Vin=24V
Vin=36V
0.1
0
-0.1
-0.2
0
0.5
1
1.5
LOAD CURRENT (A)
2
Line Regulation
0.2
LINE REGULATION (%)
0.1
0
-0.1
IOUT=0A
IOUT=1A
IOUT=1.67A
-0.2
0
10
20
30
INPUT VOLTAGE (V)
40
MP6005A Rev. 1.0
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VEN = 5V, VOUT = 12V, POUT = 20W, TA = 25°C, unless otherwise noted.
Steady State
Steady State
IOUT = 0A
IOUT = 1.67A
CH1:
VOUT/AC
CH1:
VOUT/AC
CH2: VIN
CH3: SW
CH2: VIN
CH3: SW
CH4: IPRI
CH4: IPRI
Start-Up through VIN
Start-Up through VIN
IOUT = 0A
IOUT = 1.67A
CH1: VOUT
CH1: VOUT
CH2: VIN
CH2: VIN
CH3: SW
CH3: SW
CH4: IPRI
CH4: IPRI
Shutdown through VIN
Shutdown through VIN
IOUT = 0A
IOUT = 1.67A
CH1: VOUT
CH1: VOUT
CH2: VIN
CH2: VIN
CH3: SW
CH3: SW
CH4: IPRI
CH4: IPRI
MP6005A Rev. 1.0
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VEN = 5V, VOUT = 12V, POUT = 20W, TA = 25°C, unless otherwise noted.
Start-Up through EN
Start-Up through EN
IOUT = 0A
IOUT = 1.67A
CH1: VOUT
CH1: VOUT
CH2: VEN
CH2: VEN
CH3: SW
CH3: SW
CH4: IPRI
CH4: IPRI
Shutdown through EN
Shutdown through EN
IOUT = 0A
IOUT = 1.67A
CH1: VOUT
CH1: VOUT
CH2: VEN
CH2: VEN
CH3: SW
CH3: SW
CH4: IPRI
CH4: IPRI
SCP Entry
SCP Entry
IOUT = 0A to short
IOUT = 1.67A to short
CH1: VOUT
CH1: VOUT
CH2: VIN
CH2: VIN
CH3: SW
CH3: SW
CH4: IPRI
CH4: IPRI
MP6005A Rev. 1.0
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 24V, VEN = 5V, VOUT = 12V, POUT = 20W, TA = 25°C, unless otherwise noted.
SCP Recovery
SCP Recovery
IOUT = Short to 0A
IOUT = Short to 1.67A
CH1: VOUT
CH1: VOUT
CH2: VIN
CH2: VIN
CH3: SW
CH3: SW
CH4: IPRI
CH1: VOUT/AC
CH4: IOUT
CH4: IPRI
Load Transient
Load Transient
IOUT = 0A to 0.8A, IRAMP = 50mA/µs,
RSENSE-GND = 6.8kΩ
IOUT = 0.8A to 1.67A, IRAMP = 50mA/µs,
RSENSE-GND = 6.8kΩ
CH1: VOUT/AC
CH4: IOUT
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
FUNCTIONAL BLOCK DIAGRAM
VIN
Enable
Control
EN
VIN UVLO
Regulator
VCC
VCC UVLO
Driver
Oscillator and
Slope
Compensation
GND
VCC
-
Dither
PSM
PWM
Logic
+
5V
PWM
Comparator
10kΩ
Driver
OCP
Protection
Cycle by Cycle
Hiccup Mode
SYNC
GND
COMP
Frequency Soft Start
DT
GATE
Current-Sense
Amplifier
SENSE
+
-
Dead Time
OCP
OLP
OV
+
2.5V
5ms
OLP
+
50µs
Timer
0.16V
-
OVP
-
OLP, SCP, and OVP Lead
to Hiccup Protection
SCP
+
-
0.3V
+
Dither
-
Dither Threshold
Figure 1: Functional Block Diagram
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
OPERATION
Start-Up and Power Supply
The MP6005A features an 80V internal start-up
circuit. When VIN exceeds 5.5V, the capacitor at
VCC is charged through the internal LDO.
Generally, VCC is regulated at 8.5V (if VIN is
sufficiently high), and the VCC under-voltage
lockout (UVLO) threshold is 5.7V. As well as
VCC UVLO, the MP6005A has an EN UVLO
threshold at 2V. When VCC is charged above its
5.7V UVLO threshold, and the EN pin is high,
the MP6005A begins working.
VCC can be powered from the transformer
auxiliary winding to save IC power loss after the
MP6005A starts switching. The auxiliary power
must exceed VCC regulation to override the
internal LDO. There is one internal reverse
blocking circuit, which means that VCC can
exceed VIN if VCC has biased power. VCC should
stay below 16V due to its voltage rating.
If VIN is below 8.5V and VCC cannot be
regulated to 8.5V, the internal, high-voltage
VCC LDO has a 1.5V voltage drop. This means
that the MP6005A can work when its input is as
low as 8V.
Enable Control
The EN pin enables and disables the
MP6005A. When the EN voltage exceeds 1V,
the MP6005A starts up some of the internal
circuits (micro-power mode). If the EN voltage
exceeds the turn-on threshold (2V), the
MP6005A enables all functions and starts the
GATE/SYNC driver signal. The GATE/SYNC
signal can be disabled when the EN voltage
drops to about 1.8V, but micro-power mode is
disabled only after the EN voltage falls below
0.4V. After shutdown, the MP6005A sinks a
maximum 1µA of current from the input power.
The EN pin can configure the VIN start-up
voltage through a resistor divider. The
maximum recommended voltage on the EN pin
is 6.5V. If the resistor divider voltage on EN
rises above 6.5V, the resistor divider should be
carefully considered to limit the current on the
EN pin. One internal Zener diode on EN clamps
the EN voltage when the resistor divider voltage
exceeds 6.5V. This ensures that the clamped
current flowing into EN is below 0.4mA with an
external pull-up resistor.
Pulse-Width Modulation (PWM) Operation
The MP6005A can be set to flyback and
forward topology. In flyback topology, the
external N-channel MOSFET turns on at the
beginning of each cycle and forces the current
in the transformer to increase. The current
through the MOSFET can be sensed. When the
sum of the SENSE current and slope
compensation signal rise above the voltage set
by the COMP pin, the external MOSFET turns
off. The transformer current then transmits
energy from the primary-side winding to the
secondary-side winding, and charges the output
capacitor through the Schottky diode.
The transformer’s primary-side current is
controlled by the COMP voltage (VCOMP). VCOMP
is then controlled by the output feedback
voltage through an external TL431 regulator
and the optocoupler. Therefore, the output
voltage controls the transformer current to
satisfy the load. In forward topology, the energy
is transferred from the primary-side to
secondary-side winding while the primary-side
N-channel MOSFET is on. The primary-side
peak current is also controlled by VCOMP.
Voltage Control
The output voltage (VOUT) feedback signal from
the optocoupler is amplified by secondary
circuitry, then directly fed back the signal to
COMP pin.
Under light-load conditions, the MP6005A
maintains a fixed frequency. The peak current
can drop when the COMP voltage decreases.
This current drop can trigger the power-save
mode (PSM) threshold.
Dead Time Setting
The DT pin can configure the dead time
between the GATE and SYNC pins. Table 1
lists the available configurations. The resistor
on the DT pin must be below 33kΩ.
After the MP6005A is enabled, there is a 500µs
period before the device starts switching. The
dead time and dither settings can be detected
by the MP6005A during this period.
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
Table 1: Dead Time Configurations
DT-to-GND Resistor (kΩ) (1%)
Min
Typ
Max
Dead Time
(ns)
0
0
3.3
100
7.32
16
32.4
7.5
16.9
32.4
8.2
18.7
33
150
200
300
The DT pin detection current lasts for about
200µs. Generally, it is sufficient to connect one
resistor from DT to GND. In noisy environments,
a capacitor can be placed between DT and
GND to provide filtering. It is recommended for
this capacitor to be below 100pF so that the DT
pin voltage can rise to a steady state before the
MP6005A detects the DT pin voltage. Do not
float the DT pin.
Frequency Dithering
The MP6005A integrates a frequency dithering
circuit to minimize EMI emissions. During
steady state, the frequency is fixed internally. A
frequency dithering circuit can be added to the
configured frequency with 1.5kHz modulation.
Frequency dithering can be configured to
±12.5kHz, ±25kHz, or ±37.5kHz by connecting
a resistor from the SENSE pin to GND (see
Table 2).
Table 2: Dithering Configurations
SENSE-to-GND Resistor (kΩ)
(1%)
Min
Typ
Max
0
3
6.2
12.7
0
3.3
6.8
12.7
1.3
3.6
7.5
13
Dither
Range (kHz)
0
±12.5
±25
±37.5
The SENSE pin detection current lasts for
about 200µs after start-up. Generally, it is
sufficient to connect one resistor to the SENSE
pin. In noisy environments, a capacitor can be
placed between SENSE and GND to provide
filtering.
Current Sense and Over-Current Protection
(OCP)
The MP6005A is a peak current mode
flyback/forward controller. The current through
the external MOSFET can be sensed through a
current-sense resistor that is connected in
series with the MOSFET’s source. The sensed
voltage on the SENSE pin is then amplified and
fed to the high-speed current comparator for
current mode control. The current comparator
takes this sensed voltage (plus slope
compensation) as one of its inputs, then
compares this value with VCOMP. When the
amplified current signal exceeds VCOMP, the
comparator outputs low, and the power
MOSFET turns off.
If the voltage on the SENSE pin exceeds the
current-limit threshold (about 160mV), the
MP6005A turns off the GATE output for the
cycle. The current is sensed again after the
internal oscillator starts the next cycle. The
MP6005A limits the MOSFET’s current cycle by
cycle.
Over-Voltage Protection (OVP)
The MP6005A provides over-voltage protection
(OVP). If the voltage on the OV pin exceeds
2.5V, the MP6005A shuts off the gate driving
signal and enters hiccup mode immediately.
The MP6005A restarts after 340ms and
resumes normal operation if the fault is
removed. Connect the OV pin to GND if OVP is
not required.
To avoid mistriggering due to the oscillation of
the leakage inductance and the parasitic
capacitance, there is an OVP blanking time.
Overload Protection (OLP)
The MP6005A limits the peak current cycle by
cycle during over-current (OC) conditions. If the
load continues increasing after triggering OCP,
the output voltage drops, and the peak current
triggers OCP every cycle.
The MP6005A sets the overload detection by
continuously monitoring the SENSE pin voltage.
Once internal soft start finishes, overload
protection (OLP) is enabled. If an OCP signal is
detected and lasts longer than 5ms, the
MP6005A turns off the GATE driver. After a
340ms delay, the MP6005A restarts with a new
start-up cycle.
During OLP, a 50µs one-shot timer is activated.
This timer also remains active for 50µs after
one OCP pulse. This means that if there is one
OCP pulse in a 50µs period, the MP6005A
registers OCP. If the OC condition is removed
within 4.95ms, the MP6005A resumes normal
operation.
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
Short-Circuit Protection (SCP)
When the output is shorted to the ground, the
part triggers over-current protection (OCP).
During OCP, the current is limited cycle by
cycle, and overload protection (OLP) may be
triggered as a result.
If the peak current cannot be limited by the
160mV SENSE voltage in every cycle due to
minimum gate on time, the current may run out
of control, and the transformer may saturate. If
the monitored SENSE voltage reaches 300mV,
the part turns off GATE and immediately runs in
hiccup mode with a 340ms off time.
If the short circuit is removed, the output
voltage recovers after the next restart cycle with
a 340ms delay.
Soft Start
The MP6005A provides soft start by charging
an internal capacitor with a current source.
During soft start, the SS signal controls COMP
and ramps up slowly. The soft-start capacitor is
discharged completely in the event of a
commanded shutdown, thermal shutdown, or
protection condition.
To avoid triggering short-circuit protection (SCP)
when the MP6005A starts up with a large
output capacitor, the MP6005A includes a
frequency soft-start function. The switching
frequency is controlled by the COMP voltage
(VCOMP). The frequency is about 100kHz when
VCOMP = 1.5V, and it linearly increases to
420kHz when VCOMP = 2.5V. Generally, it takes
about 20ms for VCOMP to ramp up from 1.5V to
3.5V. After soft start finishes, the soft start
function is disabled.
Minimum On Time
The transformer parasitic capacitance and gate
driver signal induce a current spike on the
sense resistor when the power switch turns on.
The MP6005A includes a 250ns leading edge
blanking period to avoid falsely terminating the
switching pulse. During this blanking period, the
current-sense comparator is disabled, and the
gate driver cannot switch off.
Gate Driver
The MP6005A integrates one high-current gate
driver for the primary-side N-channel MOSFET.
The high-current gate driver provides a strong
driving capability and benefits MOSFET
selection. If QG (the external MOFET’s total
gate charge) is low, then the switching speed
should remain low as well. It is recommended
to use a series resistance of 5Ω to reduce EMI.
The MP6005A also integrates one SYNC driver
pin. The SYNC pin turns the synchronous
switch off when SYNC is high, then turns the
synchronous switch on when SYNC is low.
Figure 2 shows the phase and dead time
relationship between GATE and SYNC.
If the MP6005A turns off due to under-voltage
lockout (UVLO) or a protection, both the GATE
and SYNC pins stay at a low voltage.
50%
GATE
tD
tD
SYNC 50%
Figure 2: GATE and SYNC Driver
Over-Temperature Protection (OTP)
Thermal shutdown is implemented to prevent
the chip from thermal runaway. When the
silicon die temperature exceeds its upper
threshold, the MP6005A shuts down the whole
chip. When the temperature drops below the
lower threshold, thermal shutdown is removed,
and the chip is enabled again with a new start
cycle.
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
APPLICATION INFORMATION
Output Voltage Setting
The output voltage is set by an external TL431
regulator. If the TL431’s reference voltage is
2.5V, and expected output voltage is 12V, then
the upper and lower resistor divider ratio should
be 3.8. Then TL431 generates an amplified
signal that controls the MP6005A’s COMP pin
through an optocoupler, such as the PC357.
COMP controls the current, which regulates
VOUT using a feedback signal.
winding to save high-voltage LDO power loss
(see Figure 4).
Dead Time Setting
The DT pin can configure the dead time
between the GATE and SYNC pins (see Table
1 on page 14).
In flyback mode, the auxiliary winding supply
voltage (VCC) can be calculated with Equation
(1):
Enable Control Setting
The EN pin can configure the VIN start-up
voltage through a resistor divider (see Figure
3).
RENH
EN
GND
NA
VCC
RVCC DVCC
CVCC
Figure 4: Flyback Mode VCC from NA Winding
VCC
NA
(VOUT VDOF ) VDVCCF
NS
(1)
Where VDVCCF is the diode (DVCC) voltage drop
from auxiliary winding.
In forward mode, the VCC capacitor is
recommend to be at minimum 4.7μF. VCC can
also be powered from transformer auxiliary
winding (see Figure 5).
VIN
RENL
GND
6.5V
GND
GND
Figure 3: Configuring the UVLO Threshold
through EN
The maximum recommended voltage on the EN
pin is 6.5V. If the resistor divider voltage on the
EN pin exceeds 6.5V, the RENH resistance
should be high enough to limit the current
flowing into the EN pin. An internal Zener diode
on the EN pin clamps the EN voltage when the
divider voltage exceeds 6.5V. Ensure that the
Zener diode clamps the current flowing into EN
below 0.4mA.
VCC Power Supply Setting
The VCC voltage is regulated by the internal
LDO from VIN. Generally, VCC is regulated at
8.5V. It is recommended to place a decoupling
capacitor between VCC and GND.
In flyback mode, the VCC capacitor is
recommend to be 1μF at minimum. VCC can
also be powered from transformer auxiliary
VCC
LVCC
NA
DVCC
CVCC
Figure 5: Forward Mode VCC from NA Winding
In forward mode, the auxiliary winding supply
voltage (VCC) can be estimated with Equation
(2):
VCC
NA
VOUT
NS
(2)
VCC should be below 16V.
Frequency Dithering Setting
The SENSE pin can set the frequency dithering
function. Once enabled, the MP6005A outputs
a 100µA current to the SENSE pin to detect the
SENSE resistance. Based on the resistance,
the MP6005A determines the frequency
dithering value (see Table 2 on page 14).
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
Current-Sense Resistor Setting
The MP6005A is a peak current mode
flyback/forward controller. The current through
the external MOSFET can be sensed through a
current-sense resistor. If the voltage sensed on
the SENSE pin exceeds the current-limit
threshold voltage (about 160mV), the MP6005A
turns off the GATE output for that cycle.
The on resistance of the MOSFET determines
the conduction loss. To reduce conduction loss,
the on resistance should be as low as possible.
To avoid reaching the current limit, the voltage
across the current-sense resistor (RSENSE)
should be below 80% of the current limit voltage
(about 160mV). RSENSE can be calculated with
Equation (3):
Consider the turn-on threshold voltage (VTH).
GATE is powered by VCC, so VTH must be
below VCC.
RSENSE
0.8 160mV
IPEAK
(3)
Where IPEAK is the primary-side peak current.
Selecting the Power MOSFET
The MP6005A is capable of driving a wide
variety of N-channel power MOSFETS. The
critical parameters for selecting a MOSFET are
the maximum drain-to-source voltage (VDS(MAX)),
maximum current (ID(MAX)), on resistance
(RDS(ON)), total gate charge (QG), and the turn-on
threshold (VTH).
In flyback mode, the off-state voltage (VMOSFET)
across the MOSFET can be calculated with
Equation (4):
VMOSFET VIN N VOUT
(4)
Where N is the transformer primary winding to
output winding ratio.
Consider the voltage spike when the power
MOSFET turns off. VDS(MAX) should be greater
than 1.5 times VMOSFET.
In forward mode, VMOSFET can be estimated with
Equation (5):
VMOSFET
D VIN
VIN
1 D
(5)
Where D is the duty cycle. The maximum duty
cycle is typically limited at 70%.
The current through the power MOSFET is at
its maximum when the input voltage is at its
minimum and the output power is at its
maximum. The current rating of the MOSFET
should be greater than 1.5 x IRMS.
QG is vital for MOSFET selection since it
determines the commutation time. A high QG
leads to high switching loss, while a low QG
may cause fast turn-on/off speeds. The turnon/off speeds determine the spike and kick.
Selecting the Transformer for Flyback Mode
In flyback mode, a transformer determines the
duty cycle, peak current, efficiency, MOSFET,
and output diode rating. A good transformer
should consider the winding ratio, primary-side
inductance,
saturation
current,
leakage
inductance, current rating, and core selection.
The transformer winding ratio determines the
duty cycle (D). Calculate D with Equation (6):
D
N VOUT
N VOUT VIN
(6)
Where N is the transformer primary winding to
output winding ratio. Typically, a duty cycle of
about 45% is recommended for most
applications.
The primary-side inductance affects the input
current ripple ratio factor. A higher inductance
results in a physically large transformer and
higher costs. A lower inductance results in a
high switching peak current and RMS current,
which reduces efficiency. Choose a primaryside inductance that makes the current ripple
ratio factor about 30% to 50%. Estimate the
primary-side inductance with Equation (7):
LP
VIN D2
2 n IIN fSW
(7)
Where n is the current ripple ratio, IIN is the
input current, and LP is the primary inductance.
Calculate LP based on the minimum input
voltage condition.
The transformer should have a high saturation
current to support the switching peak current.
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
Otherwise,
the
transformer
inductance
decreases sharply. The SENSE resistor can
limit the switching peak current. The energy
stored in the leakage inductance cannot couple
to the secondary side, which may a high spike
when the MOSFET turns off. This reduces
efficiency and increases MOSFET stress.
Normally, the transformer leakage inductance
can be controlled below 2% of the transformer
inductance.
The current rating uses the maximum RMS
current (IRMS), which allows current to flow
through each winding. The current density
should be controlled, as an unregulated current
can cause a high resistive power loss.
Selecting the RCD Snubber for Flyback
Mode
The transformer leakage inductance causes
spikes and excessive ringing on the MOSFET
drain voltage waveform, and the RCD snubber
circuit limits the MOSFET voltage spike (see
Figure 6).
T1
RSN
CSN
NP
NS
AGND
MOSFET
GATE
PGND
Figure 6: RCD Snubber
The power dissipation (PSN) in the snubber
circuit can be estimated with Equation (8):
PSN
1
LK IPEAK 2 fSW
2
RSN
(10)
A 15% ripple is allowed.
Selecting the Output Diode for Flyback
Mode
The flyback output rectifier diode supplies
current to the output capacitor when the
primary-side MOSFET is off. Use a Schottky
diode to reduce losses from the diode forward
voltage and recovery time. The diode should be
rated for a reverse voltage 1.5 times greater
than VDIODE. VDIODE can be calculated with
Equation (11):
VDIODE
VIN
VOUT
N
(11)
Where N is the transformer primary winding to
output winding ratio.
The average current rating must exceed the
maximum expected load current, and the peak
current rating must exceed the output winding
peak current. It is recommended to use an RC
snubber circuit for the output diode.
The transformer winding ratio determines the
duty cycle (D). D can be estimated with
Equation (12):
(8)
D
Where LK is the leakage inductance and IPEAK is
the peak switching current. Since RSN
consumes the leakage inductance power loss,
RSN can be calculated with Equation (9):
VSN2
PSN
VSN
RSN CSN fSW
Selecting the Transformer for Forward Mode
In forward mode, the transformer transfers
energy to the output when the power MOSFET
turns on. The key parameters for this
transformer are the winding ratio, primary
winding turns, current rating, and core selection.
DSN
MP6005A
VSN
(9)
Where VSN is the expected snubber voltage on
CSN.
Calculate the voltage ripple (ΔVSN) on the
snubber due to the snubber capacitor (CSN) with
Equation (10):
VOUT N
VIN
(12)
Where N is the transformer primary winding to
output winding ratio. A duty cycle of about 45%
is recommended for most applications.
When the power MOSFET turns on, the
transformer transfers energy to the output,
while VIN generates a primary-side inductance
current in the transformer. There must be
enough primary winding to prevent the
transformer from saturating.
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
The peak exciting current can be calculated
with Equation (13):
IEXC
VOUT N
2 LP fSW
(13)
Where IEXC is the primary-side inductance peak
current, and LP is the primary inductance. Use
IEXC to calculate the primary winding. Certain
margins are required for extreme conditions,
such as load transient and over-current
protection (OCP).
The current rating counts on the maximum
RMS current, which flows through each
winding. The current density should be
controlled. An unregulated current density can
cause a high resistive power loss.
Selecting the SYNC MOSFET for Forward
Mode
The MP6005A supports active-clamp forward
mode. The active clamp P-channel MOSFET
must have the same maximum voltage as the
main switch power MOSFET. The P-channel
MOSFET’s maximum current should exceed
the primary-side inductance peak current and
RMS current.
Selecting the Output MOSFET for Forward
Mode
The forward mode output uses two diodes to
conduct the current. If higher efficiency is
required, the diodes can be replaced with
MOSFETs (QF and QR) (see Figure 7).
L
QF
Ns
VOUT
COUT
QR
Figure 7: Forward Mode Output MOSFET
The MOSFET voltage rating should exceed its
maximum VDS voltage. The QR maximum VDS
voltage (VR) can be calculated with Equation
(14):
VR
D VIN
N (1 D)
(14)
The QF maximum VDS voltage (VF) can be
estimated with Equation (15):
VF
VIN
N
(15)
Where N is the transformer primary winding to
output winding ratio, and D is the primary
MOSFET duty cycle. Generally, a margin is
required.
The MOSFET current rating should exceed its
maximum RMS current and peak current, The
QR RMS current (IR) can be estimated with
Equation (16):
IR IOUT D 1
1 IPP 2
(
)
3 IOUT
(16)
Where IPP is the inductor’s peak to peak current.
The QF RMS current (IF) can be calculated with
Equation (17):
IF IOUT 1 D 1
1 IPP 2
(
)
3 IOUT
(17)
The QR MOSFET’s gate driving voltage is equal
to VF, and the QF MOSFET’s gate driving
voltage is equal to VR. If the driving voltage
exceeds the MOSFETs’ maximum gate voltage,
a clamp circuit is required.
The MOSFET’s on resistance determines the
conduction loss, while QG determines the driver
circuit loss. Both the MOSFET’s on resistance
and QG should be low enough to obtain higher
efficiency and a lower rising temperature.
Selecting the Output Inductor for Forward
Mode
The forward mode output inductor must supply
constant current to the output load while the
main power MOSFET turns on. A larger-value
inductor results in less ripple current and a
lower output ripple voltage. However, a largervalue inductor has a larger physical size, higher
series resistance, and lower saturation current.
A good rule to determine the inductance is to
allow the peak-to-peak ripple current in the
inductor to be approximately 30% to 50% of the
maximum output current. The inductance value
(L) can be calculated with Equation (18):
L
VOUT
V N
(1 OUT
)
fSW IL
VIN
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
Where VOUT is the output voltage, VIN is the
input voltage, fSW is the switching frequency,
and ΔIL is the peak-to-peak inductor ripple
current.
Choose an inductor that does not saturate
under the maximum inductor peak current.
Selecting the Input Capacitor
An input capacitor is required to supply the AC
ripple current to the inductor while limiting noise
at the input source. A low-ESR capacitor is
required to keep the noise near the IC at a
minimum.
Ceramic
capacitors
are
recommended, but tantalum or low-ESR
electrolytic capacitors are sufficient. For
ceramic capacitors, the capacitance dominates
the input voltage ripple at the switching
frequency.
In flyback mode, the input ripple can be
estimated with Equation (19):
VIN
VIN IIN
fSW CIN (N VOUT VIN )
(19)
In forward mode, the input voltage ripple can be
calculated with Equation (20):
V N
IIN
(1 OUT
)
fSW CIN
VIN
VOUT
N VOUT
I
OUT
(VIN N VOUT ) fSW COUT
(21)
If the voltage ripple is too high, a π filter is
required. Choose the inductor to be between
0.1μH and 0.47μH for a good output voltage
ripple and system stability.
In forward mode, the output voltage ripple can
be calculated with Equation (22):
VOUT
VOUT
V N
(1 OUT
) (22)
8 fSW L COUT
VIN
2
Design Example
Table 3 shows a flyback design example that
follows the application guidelines for the
specifications below.
Table 3: Flyback Mode Design Example
Where ΔVIN is the input voltage ripple, IIN is the
input current, and CIN is the input capacitor.
VIN
In flyback mode, the output ripple can be
estimated with Equation (21):
(20)
VIN
VOUT
IOUT
9V to 36V
12V
1.67A
Figure 11 on page 22 shows the detailed
application
schematic.
The
Typical
Performance Characteristics section on page 8
shows the typical performance and circuit
waveforms. For more device applications, refer
to related the evaluation board datasheet.
Selecting the Output Capacitor
The output capacitor maintains the DC output
voltage. For the best results, use ceramic
capacitors or low-ESR capacitors to minimize
the output voltage ripple. For ceramic
capacitors, the capacitance dominates the
output ripple at the switching frequency.
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
PCB Layout Guidelines
Efficient layout of the high-frequency switching
power supply is critical for stable operation.
Poor layout may result in reduced performance,
excessive EMI, resistive loss, and system
instability. For the best results, follow the
guidelines below.
Flyback Mode
1. Keep the input loop between the input
capacitor, transformer, Q1, sense resistor,
and GND plane as short as possible for
minimal noise and ringing.
2. Keep the output loop between the rectifier
diode, output capacitor, and transformer as
short as possible.
3. The clamp loop circuit between D2, C4, and
the transformer should be as small as
possible.
4. The VCC capacitor must be placed close to
the VCC pin for decoupling.
5. The COMP feedback trace should be routed
far away from noise sources, such as SW.
6. Use a single-point connection between
power GND and signal GND.
Figure 8 shows the recommended flyback
layout.
Forward Mode
1. Keep the input loop between the input
capacitor, transformer, Q1, sense resistor,
and GND plane as short as possible for
minimal noise and ringing.
2. Keep the active-clamp loop between the
input capacitor, transformer, C4, and Q2 as
short as possible for minimal noise and
ringing.
3. Keep the output high-frequency current loop
between the transformers, D1, and D2 as
short as possible.
4. The VCC capacitor must be placed close to
the VCC pin for decoupling.
5. The COMP feedback trace should be routed
away from noise sources, such as SW.
6. Use a single-point connection between
power GND and signal GND.
Figure 9 shows the recommended forward
layout.
Via
Top Layer
Bottom Layer
VIN
C1
Q2
L1
C4
D2
VIN
GND
T1
R3
VO
D1
C2
Q1
C3
Via
Top Layer
Bottom Layer
VOGND
C5
U1
Q1
C6
D1
D3
U2
R6
U3
R5
R4
T1
R3
Figure 9: Recommended Forward PCB Layout
D2
GND
Vo
R4
C1
C4
C2
VIN
Figure 10 shows the schematic for forward
mode.
GND
C3
U1
R1
R2
VIN
C1
C5
U2
T1
Q2
VOUT
R6
D2
VIN
R5
R2
R1
Figure 8: Recommended Flyback PCB Layout
OV
EN
Sync Gate
R6
DT
C6
SYNC
D3
C3
D1
R4
U1
Q1
U2A
R1
GATE
VCC
SENSE
COMP
For more details, refer to the related evaluation
board datasheet.
C4
C2
GND
Sync Gate
Q2
R3
U2B
C5
Q2
TL431
R5
R2
Figure 10: Forward Layout Guide Schematic
For more details, refer to the related evaluation
board datasheet.
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MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
TYPICAL APPLICATION CIRCUIT
VIN
C1A
220μF
VINGND
C1B
10μF
R4A
20kΩ
R11
69.8kΩ
C4
0.1μF
EN
SYNC
1
VCC
GATE
10
1μF
PGND
SENSE
GND
2
7
R10
VOUT
R5
Q1
SGND
10Ω
R7
4.02kΩ
FDMS86102LZ
6.8kΩ
R3A
R3B
0.047Ω
R14
100kΩ
0.047Ω
PGND
PC357
PGND
OV
VOGND
SGND
SGND
NP2
8
5
U2B
COMP
DT
6
C2C
220μF
9
MP6005A
C3A VCC
C2B
22μF
10Ω
SGND
U1
30kΩ
12V/1.67A
C2A
22μF
NS
BAV21
VIN
3
SBRT15U100SP5
C7
R8
NP1
PGND
R12
0.47μH
D2
470pF
PGND
PGND
R4B
20kΩ
4
9V to 36V
VOUT
L2
D1
T1
R15
20kΩ
R13 PGND
0Ω
D3
1N4148
76.8kΩ
R9
100Ω
C3B
R17
20kΩ
D5
BAV99
1μF
VCC
R1
U2A
4.7nF
1kΩ
TL431
C8
1000pF/2000V
PGND
PGND
R6
Q2
PGND
PGND
C5
SGND
C14
1μF
SGND
R2
20kΩ
SGND
Figure 11: Typical Flyback Application Circuit (VIN = 9V to 36V, VOUT = 12V, IOUT = 1.67A)
MP6005A Rev. 1.0
MonolithicPower.com
7/16/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
22
MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
PACKAGE INFORMATION
QFN-10 (3mmx3mm)
2.90
3.10
0.30
0.50
PIN 1 ID
MARKING
0.18
0.30
2.90
3.10
PIN 1 ID
INDEX AREA
1.45
1.75
PIN 1 ID
SEE DETAIL A
10
1
2.25
2.55
0.50
BSC
5
6
TOP VIEW
BOTTOM VIEW
PIN 1 ID OPTION A
R0.20 TYP.
PIN 1 ID OPTION B
R0.20 TYP.
0.80
1.00
0.20 REF
0.00
0.05
SIDE VIEW
DETAIL A
NOTE:
2.90
0.70
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX.
4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION VEED-5.
5) DRAWING IS NOT TO SCALE.
1.70
0.25
2.50
0.50
RECOMMENDED LAND PATTERN
MP6005A Rev. 1.0
MonolithicPower.com
7/16/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
23
MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
CARRIER INFORMATION
Part Number
Package
Description
Quantity/
Reel
Quantity/
Tube
Quantity/
Tray
Reel
Diameter
Carrier
Tape
Width
Carrier
Tape
Pitch
MP6005AGQ-Z
QFN-10
(3mmx3mm)
5000
N/A
N/A
13in
12mm
8mm
MP6005A Rev. 1.0
MonolithicPower.com
7/16/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
24
MP6005A – 420kHz, WIDE-INPUT FLYBACK AND FORWARD CONTROLLER
REVISION HISTORY
Revision #
Revision Date
1.0
07/16/2021
Description
Pages Updated
Initial Release
-
Notice: The information in this document is subject to change without notice. Users should warrant and guarantee that thirdparty Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP6005A Rev. 1.0
MonolithicPower.com
7/16/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
25
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