0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
MP62130ES-LF-Z

MP62130ES-LF-Z

  • 厂商:

    MPS(美国芯源)

  • 封装:

    SOIC-8

  • 描述:

    IC PWR SWITCH 1:1 8SOIC

  • 数据手册
  • 价格&库存
MP62130ES-LF-Z 数据手册
MP62130/MP62131 3.3V/5V, Single-Channel 500mA Current-Limited Power Distribution Switch with Output Discharge EC R NE O EF W M ER D M E E TO S ND I E G M N D P6 S F O 20 R 55 The Future of Analog IC Technology DESCRIPTION FEATURES The MP62130/MP62131 Power Distribution Switch features internal current limiting to prevent damage to host devices due to faulty load conditions. The MP62130/MP62131 Analog switch features 90mΩ on-resistance and operates from 2.7V to 5.5V input. It is available with a guaranteed current limit, making it ideal for load switching applications. The MP62130/MP62131 has built-in protection for both over current and increased thermal stress. For over current, the device will limit the current by changing to a constant current mode. • • • • • • • • • • • • As the temperature increases as a result of short circuit, the device will shut off. The device will recover once the device temperature reduces to approx 120°C. The MP62130/MP62131 is available in MSOP8 and SOIC8 packages. 500mA Continuous Current Accurate Current Limit Output Discharge Function 2.7V to 5.5V Supply Range 95µA Quiescent Current 90mΩ MOSFET Thermal-Shutdown Protection Under-Voltage Lockout 8ms FLAG Deglitch Time No FLAG Glitch During Power Up Reverse Current Blocking MSOP8 and SOIC8 Packages APPLICATIONS • • • • Smartphone and PDA Portable GPS Device Set-top-box USB Power Distribution “MPS” and “The Future of Analog IC Technology” are Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION R +5V 3 GND N O T MP62130/ MP62131 7 1 OFF ON IN EN* OUT 6, 8 To VBUS USB Ports FLAG 2 *EN is active high for 62131 SINGLE-CHANNEL MP62130/MP62131 Rev. 0.9 www.MonolithicPower.com 6/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 1 MP62130/MP62131 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH ORDERING INFORMATION Typical ShortMaximum Continuous Circuit Current Load Current @ TA=25℃ Package Top Marking SOIC8 MSOP8 SOIC8 MP62130 62130 MP62131 MSOP8 62131 Free Air Temperature (TA) EC R NE O EF W M ER D M E E TO S ND I E G M N D P6 S F O 20 R 55 Part Number Enable MP62130ES MP62130EK* MP62131ES Active Low MP62131EK* Switch Single 500mA 650mA Active High -20°C to +85°C * For Tape & Reel, add suffix –Z (e.g. MP62130/MP62131EK–Z). For RoHS Compliant packaging, add suffix –LF (e.g. MP62130/MP62131EK–LF–Z); PACKAGE REFERENCE TOP VIEW TOP VIEW EN* 1 8 OUT FLAG 2 7 IN GND 3 6 OUT NC 4 5 NC EN* 1 8 OUT FLAG 2 7 IN GND 3 6 OUT NC 4 5 NC MSOP8 SOIC8 * EN is active high for MP6231 Thermal Resistance IN .................................................-0.3V to +6.5V EN, FLAG, OUT to GND ..............-0.3V to +6.5V (2) Continuous Power Dissipation (TA = +25°C) MSOP8 .................................................... 0.83W SOIC8..................................................... 1.4W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature............... -65°C to +150°C Operating Junct. Temp (TJ)...... -20°C to +125°C MSOP8 .................................. 150 ..... 65... °C/W SOIC8..................................... 90 ...... 42... °C/W N O T R ABSOLUTE MAXIMUM RATINGS (1) (3) θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Measured on JESD51-7 4-layer PCB. MP62130/MP62131 Rev. 0.9 www.MonolithicPower.com 6/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 2 MP62130/MP62131 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH ELECTRICAL CHARACTERISTICS (4) EC R NE O EF W M ER D M E E TO S ND I E G M N D P6 S F O 20 R 55 VIN=5V, TA=+25°C, unless otherwise noted. Parameter Condition IN Voltage Range Supply Current Shutdown Current Off Switch Leakage Current Limit Single Channel Device Disable, VOUT=float, VIN=5.5V Device Disable, VIN=5.5V Under-voltage Lockout Under-voltage Hysteresis FET On Resistance EN Input Logic High Voltage EN Input Logic Low Voltage FLAG Output Logic Low Voltage FLAG Output High Leakage Current Thermal Shutdown Thermal Shutdown Hysteresis Current Ramp (slew rate≤100A/s) on Output Rising Edge 1.95 100 2.3 250 90 Units 5.5 160 V µA µA µA mA 1100 A 0.8 0.4 V mV mΩ V V V 1 µA 140 20 0.9 1.7 0.1 0.1 1.8 2 2.7 0.5 0.5 3 °C °C ms ms ms ms ms 2 10 ms ISINK=5mA VIN=VFLAG=5.5V Turn Off Time, Toff (6) CL=100µF, RL=11Ω Discharge Resistance FLAG Deglitch Time EN Input Leakage Reverse Leakage Current 95 1 1 650 Max 2.65 400 130 2 Turn On Time, Ton (6) (5) Typ 1.2 IOUT=100mA (-20°C≤ TA ≤85°C) VIN=5.5V, CL=1µF, RL=11Ω VIN=2.7V, CL=1µF, RL=11Ω VIN=5.5V, CL=1µF, RL=11Ω VIN=2.7V, CL=1µF, RL=11Ω CL=100µF, RL=11Ω VOUT Rising Time, Tr (5) R 2.7 75 550 Trip Current VOUT Falling Time, Tf Min 4 VOUT=5.5V, VIN=GND 100 8 1 0.2 15 Ω ms µA µA N O T Notes: 4) Production test at +25°C. Specifications over the temperature range are guaranteed by design and characterization. 5) Measured from 10% to 90% output signal. 6) Measured from 50% EN signal to 90% output signal. MP62130/MP62131 Rev. 0.9 www.MonolithicPower.com 6/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 3 MP62130/MP62131 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH PIN FUNCTIONS 1 2 3 4, 5 6, 8 7 Name Description EC R NE O EF W M ER D M E E TO S ND I E G M N D P6 S F O 20 R 55 Pin # ——— EN * Enable Input. Active High(MP62131); Active Low(MP62130) FLAG IN-to-OUT Over-current, active-low output flag. Open-Drain. GND Ground. NC OUT IN Power-Distribution Switch Output. Input Voltage. Accepts 2.7V to 5.5V input. TYPICAL PERFORMANCE CHARACTERISTICS N O T R TA = +25ºC, unless otherwise noted. Figure 1—Test Circuit and Voltage Waveforms MP62130/MP62131 Rev. 0.9 www.MonolithicPower.com 6/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 4 MP62130/MP62131 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH TYPICAL PERFORMANCE CHARACTERISTICS 1.6 2.7 3 2.5 2 1.5 1.5 2.6 1.4 RISE TIME(ms) TURN OFF DELAY (ms) 3.5 TURN ON DELAY (ms) EC R NE O EF W M ER D M E E TO S ND I E G M N D P6 S F O 20 R 55 VIN =5V, VEN=0V for MP62130 or 5v for MP62131, CL = 1µF, TA = +25ºC, unless otherwise noted. 2.5 2.4 1.3 1.2 1.1 1 2.3 0.9 0.8 2.2 1 2.5 3 3.5 4 4.5 5 INPUT VOTAGE (V) 5.5 6 2.5 3 3.5 4 4.5 5 INPUT VOTAGE (V) 5.5 2.5 6 110 100 50 90 45 80 40 70 35 30 3 3.5 4 4.5 5 5.5 INPUT VOLTAGE (V) 6 60 2.5 R 2.5 Static Drain-Source On-State Resistance vs. Input Voltage 130 120 110 6 IOUT=0.5A 92 91.5 91 90.5 100 90 90 80 2.5 3 3.5 4 4.5 5 5.5 INPUT VOLTAGE (V) 6 89.5 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 OUTPUT CURRENT (A) 6 IOUT=0.1A 30 25 20 15 10 5 0 -5 -10 -15 -20 -25 -30 -30 -15 0 15 30 45 60 75 90 Input to Output Voltage vs. Load Current Static Drain-Source On-State Resistance vs. Output Current T O N 140 3 3.5 4 4.5 5 5.5 INPUT VOLTAGE (V) INPUT TO OUTPUT VOLTAGE (mV) 55 3.5 4 4.5 5 5.5 INPUT VOTAGE (V) Static Drain-Source On-State Resistance Variation vs. Ambient Temperature STATIC DRAIN-SOURCE ON-STATE RESISTANCE VARIATION (%) Supply Current, Output Enabled vs. Input Voltage 3 90 80 Vin=2.7V 70 60 50 Vin=3.3V Vin=5.5V 40 Vin=5V 30 Vin=4V 20 10 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 OUTPUT CURRENT (A) MP62130/MP62131 Rev. 0.9 www.MonolithicPower.com 6/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 5 MP62130/MP62131 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH TYPICAL PERFORMANCE CHARACTERISTICS (continued) EC R NE O EF W M ER D M E E TO S ND I E G M N D P6 S F O 20 R 55 VIN =5V, VEN=0V for MP62130 or 5v for MP62131, CL = 1µF, TA = +25ºC, unless otherwise noted. Current Limit vs. Input Voltage 0.75 0.7 0.65 TRIP CURRENT (A) CURRENT LIMIT (A) 0.8 Threshold Trip Current vs. Input Voltage Current Limit Response vs. Peak Current 1.4 28 1.3 24 20 1.2 16 1.1 12 1 8 0.9 0.6 2.5 3 3.5 4 4.5 5 5.5 0.8 2.5 6 INPUT VOLTAGE (V) 4 3 3.5 4 4.5 5 5.5 INPUT CURRENT (V) 6 0 0 2 4 6 8 10 12 14 PEAK CURRENT (A) Turn Off Delay and Fall Time with Output Discharge IOUT=0A VOUT 2V/div EN 5V/div VOUT 2V/div EN 5V/div EN 5V/div Flag 5V/div IOUT 500mV/div Flag 5V/div IOUT 500mV/div N O T R Flag 5V/div IOUT 500mV/div VOUT 2V/div VOUT 2V/div EN 5V/div Flag 5V/div IOUT 500mV/div VOUT 2V/div EN 5V/div IOUT 200mA/div Flag 5V/div IOUT 500mV/div EN 5V/div MP62130/MP62131 Rev. 0.9 www.MonolithicPower.com 6/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 6 MP62130/MP62131 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH TYPICAL PERFORMANCE CHARACTERISTICS (continued) EC R NE O EF W M ER D M E E TO S ND I E G M N D P6 S F O 20 R 55 VIN =5V, VEN=0V for MP62130 or 5v for MP62131, CL = 1µF, TA = +25ºC, unless otherwise noted. Threashold Trip Current with Ramped Load on Enabled Device VOUT 2V/div Ramped Load on Enabled Device Inrush Current with Different Load Capacitance IOUT=0.5A Flag 5V/div IOUT 200mA/div IOUT 500mA/div IOUT 500mA/div 4ms/div Flag 5V/div IOUT 1A/div EN 5V/div 2ms/div 1ms/div N O T R 2ms/div MP62130/MP62131 Rev. 0.9 www.MonolithicPower.com 6/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 7 MP62130/MP62131 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH EC R NE O EF W M ER D M E E TO S ND I E G M N D P6 S F O 20 R 55 FUNCTION BLOCK DIAGRAM UVLO IN Current Sense -- -- -- OUT -- -- -- -- Charge Pump -- Vref -- --- AMP + + Logic -- -- EN* FLAG Deglitch -- -- Thermal Sense GND * EN is active high for MP62131 N O T R Figure 2—Functional Block Diagram MP62130/MP62131 Rev. 0.9 www.MonolithicPower.com 6/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 8 MP62130/MP62131 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH DETAILED DESCRIPTION EC R NE O EF W M ER D M E E TO S ND I E G M N D P6 S F O 20 R 55 Over Current When the load exceeds trip current (minimum threshold current triggering constant-current mode) or a short is present, MP62130/MP62131 switches into to a constant-current mode (current limit value). MP62130/MP62131 will be shutdown only if the overcurrent condition stays long enough to trigger thermal protection. Thermal Protection The purpose of thermal protection is to prevent damage in the IC by allowing exceptive current to flow and heating the junction. The die temperature is internally monitored until the thermal limit is reached. Once this temperature is reached, the switch will turn off and allow the chip to cool. The switch has a built-in hysteresis. Trigger overcurrent protection for different overload conditions occurring in applications: 1) The output has been shorted or overloaded before the device is enabled or input applied. MP62130/MP62131 detects the short or overload and immediately switches into a constant-current mode. Enable The logic pin disables the chip to reduce the supply current. The device will operate once the enable signal reaches the appropriate level. The input is compatible with both COMS and TTL. Output Discharge The part involves a discharge function that provides a resistive discharge path for the external output capacitor. The function will be active when the part is disabled (Input voltage is under UVLO or enable is deasserted) and it will be done in a very limited time. T R 2) A short or an overload occurs after the device is enabled. After the current-limit circuit has been tripped (reached the trip current threshold), the device switches into constantcurrent mode. However, high current may flow for a short period of time before the current-limit circuit can react. 3) Output current has been gradually increased beyond the recommended operating current. The load current rises until the trip current threshold is reached or until the thermal limit of the device is exceeded. The MP62130/MP62131 is capable of delivering current up to the trip current threshold without damaging the device. Once the trip threshold has been reached, the device switches into its constant-current mode. Under-Voltage Lockout (UVLO) This circuit is used to monitor the input voltage to ensure that the MP62130/MP62131 is operating correctly. This UVLO circuit also ensures that there is no operation until the input voltage reaches the minimum spec. N O Flag Response The FLAG pin is an open drain configuration. This FAULT will report a fail mode after an 8ms deglitch timeout. This is used to ensure that no false fault signals are reported. This internal deglitch circuit eliminates the need for extend components. The FLAG pin is not deglitched during an over temperature or voltage lockout. MP62130/MP62131 Rev. 0.9 www.MonolithicPower.com 6/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 9 MP62130/MP62131 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH APPLICATION INFORMATION heavy. This precaution reduces power-supply transients that may cause ringing on the input. Optionally, bypassing the output with a 0.01µF to 0.1µF ceramic capacitor improves the immunity of the device to short-circuit transients. EC R NE O EF W M ER D M E E TO S ND I E G M N D P6 S F O 20 R 55 Power-Supply Considerations A 10µF bypass capacitor between IN and GND, close to the device, is recommended. Placing a high-value electrolytic capacitor on the output pin(s) is recommended when the output load is +5V 3 GND MP62130/ MP62131 7 1 OFF ON IN EN* OUT 6, 8 To VBUS USB Ports FLAG 2 *EN is active high for 62131 SINGLE-CHANNEL N O T R Figure 3—Application Circuit MP62130/MP62131 Rev. 0.9 www.MonolithicPower.com 6/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 10 MP62130/MP62131 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH EC R NE O EF W M ER D M E E TO S ND I E G M N D P6 S F O 20 R 55 PACKAGE INFORMATION MSOP8 0.114(2.90) 0.122(3.10) 5 8 0.114(2.90) 0.122(3.10) PIN 1 ID (NOTE 5) 0.010(0.25) 0.014(0.35) 0.187(4.75) 0.199(5.05) 4 1 0.0256(0.65)BSC BOTTOM VIEW TOP VIEW GAUGE PLANE 0.010(0.25) 0.030(0.75) 0.037(0.95) 0.043(1.10)MAX SEATING PLANE 0.002(0.05) 0.006(0.15) T O N NOTE: 0.181(4.60) 0.040(1.00) 0.016(0.40) 0.004(0.10) 0.008(0.20) SIDE VIEW R FRONT VIEW 0o-6o 0.016(0.40) 0.026(0.65) 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) PIN 1 IDENTIFICATION HAS HALF OR FULL CIRCLE OPTION. 6) DRAWING MEETS JEDEC MO-187, VARIATION AA. 7) DRAWING IS NOT TO SCALE. 0.0256(0.65)BSC RECOMMENDED LAND PATTERN MP62130/MP62131 Rev. 0.9 www.MonolithicPower.com 6/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 11 MP62130/MP62131 –CURRENT-LIMITED POWER DISTRIBUTION SWITCH EC R NE O EF W M ER D M E E TO S ND I E G M N D P6 S F O 20 R 55 SOIC8 0.189(4.80) 0.197(5.00) 0.050(1.27) 0.024(0.61) 8 5 0.063(1.60) PIN 1 ID 0.150(3.80) 0.157(4.00) 1 0.228(5.80) 0.244(6.20) 0.213(5.40) 4 TOP VIEW RECOMMENDED LAND PATTERN 0.053(1.35) 0.069(1.75) SEATING PLANE 0.004(0.10) 0.010(0.25) 0.013(0.33) 0.020(0.51) 0.0075(0.19) 0.0098(0.25) SEE DETAIL "A" 0.050(1.27) BSC SIDE VIEW R FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) N O T GAUGE PLANE 0.010(0.25) BSC 0o-8o 0.016(0.41) 0.050(1.27) DETAIL "A" NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP62130/MP62131 Rev. 0.9 www.MonolithicPower.com 6/15/2010 MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 12
MP62130ES-LF-Z 价格&库存

很抱歉,暂时无法提供与“MP62130ES-LF-Z”相匹配的价格&库存,您可以联系我们找货

免费人工找货