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MP6219DN-LF

MP6219DN-LF

  • 厂商:

    MPS(美国芯源)

  • 封装:

    SOIC8_150MIL_EP

  • 描述:

    IC CURR LIMIT SWITCH

  • 数据手册
  • 价格&库存
MP6219DN-LF 数据手册
MP6219 5V, 1A – 2A Programmable Current Limit Power Distribution Switch EC R NE O EF W M ER D ME E N TO SI D ED G M N P5 S FO 07 R 5 The Future of Analog IC Technology DESCRIPTION FEATURES The MP6219 is a protection device designed to protect circuitry on the output from transients on input. It also protects input from undesired shorts and transients coming from the output. • • • • • • The MP6219 is an integrated power switch with programmable current limit. The max load at the output is current limited. This is accomplished by utilizing a sense FET topology. The magnitude of the current limit is controlled by an external resistor. An internal charge pump drives the gate of the power device. It features a 44mΩ switch for high efficiency and requires minimal external components. The MP6219 features current protection and thermal shutdown for fault control. It also involves UVLO and output over voltage protection. Integrated 44mΩ FET Adjustable Current Limit to 2A Optimized for 5V Inputs Enable Active High 1.1ms Soft-Start Rise Time UL File # E322138 APPLICATIONS • • • • • USB Power Distribution PCI Bus Power Notebook PC Inrush Current Limit Heavy Capacitive Loads “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. The MP6219 is available in an 8-pin SOICE package. R TYPICAL APPLICATION 1 N O T Input +5V 2 To USB Peripheral OUT 3 OUT 4 GND IN EN/FAULT MP6219 N.C. OUT IPRGM 8 7 ON/OFF Input or Fault Output 6 5 RPRGM UL Recognized Component MP6219 Rev.0.93 10/20/2010 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 1 MP6219 – PROGRAMMABLE CURRENT LIMIT (2A) POWER DISTRIBUTION SWITCH ORDERING INFORMATION Package Top Marking Free Air Temperature (TA) MP6219DN SOIC8E (Exposed Pad) MP6219DN –40°C to +85°C EC R NE O EF W M ER D ME E N TO SI D ED G M N P5 S FO 07 R 5 Part Number* * For Tape & Reel, add suffix –Z (e.g. MP6219DN–Z). For RoHS Compliant packaging, add suffix –LF (e.g. MP6219DN–LF–Z) PACKAGE REFERENCE TOP VIEW 1 8 2 7 3 6 4 5 ABSOLUTE MAXIMUM RATINGS (1) R IN, OUT, IPRGM ................................................ 8V EN/FAULT ..................................................... 6V Junction Temperature………….–40°C to +150°C (2) Continuous Power Dissipation (TA = +25°C) ............................................................. 2.5W Storage Temperature.............. –65°C to +155°C Recommended Operating Conditions N O T Input Voltage…………………………….5V ± 10% Operating Junct.Temp. ........... .-40°C to +125°C MP6219 Rev.0.93 10/20/2010 Thermal Resistance (3) θJA θJC SOIC8E ...................................50 ...... 10 ... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Measured on JESD51-7 4-layer board. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2010 MPS. All Rights Reserved. 2 MP6219 – PROGRAMMABLE CURRENT LIMIT (2A) POWER DISTRIBUTION SWITCH ELECTRICAL CHARACTERISTICS EC R NE O EF W M ER D ME E N TO SI D ED G M N P5 S FO 07 R 5 VIN = 5V, RPRGM=24Ω, COUT = 10µF, TJ=25°C, unless otherwise noted. Parameters Power FET Symbol Delay Time tDLY ON Resistance RDSon Off State Output Voltage VOFF Thermal Latch Shutdown Temperature Under/Over Voltage Protection TSD VCLAMP Under Voltage Lockout Under Voltage Lockout (UVLO) Hysteresis Current Limit Current Limit Trip Current Slew Rate Output Rise Time EN/Fault Low Level Input Voltage VUVLO ILIM-SS ILIM-OL Intermediate Level Input Voltage VI (INT) High Level Input Voltage High State Maximum Voltage Low Level Input Current (Sink) VIH VI (MAX) IIL R Output Clamping Voltage T N O Supply Current Enabling of chip to ID=100mA, 12Ω resistive load TJ=25°C TJ=80°C, Note 4 VIN=8Vdc, Enable=0Vdc, RL=500Ω Overvoltage Protection VIN=8V Turn on, VIN rising RPRGM=24Ω RPRGM=24Ω VIL Output Disabled Thermal Fault, Output Disabled Output Enabled VMIN Max 0.2 44 95 Units ms 82 120 mΩ mV °C 5.95 6.65 7.35 V 3.2 3.6 4.0 V 0.1 Note 5 VMAX Typ 175 Tr IQ Minimum Operating Voltage for UVLO Min VHYST Maximum Fanout for Fault Signal Maximum Voltage on Enable Pin Total Device Condition 1.4 2.0 3.0 V 2.7 1.1 0.80 1.6 ms 0.5 V 2.0 V 2.5 VENABLE=0V Total number of chips that can be connected for simultaneous shutdown Note 6 Device Operational, No load Thermal Shutdown Enable
MP6219DN-LF 价格&库存

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