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MP6526GY-Z

MP6526GY-Z

  • 厂商:

    MPS(美国芯源)

  • 封装:

    SOIC28

  • 描述:

    HEX HALF-BRIDGE MOTOR DRIVER WIT

  • 数据手册
  • 价格&库存
MP6526GY-Z 数据手册
MP6526 Hex Half-Bridge Motor Driver with Serial Input Control DESCRIPTION FEATURES The MP6526 is a six-half-bridge, DMOS, output driver with integrated power MOSFETs that can drive up to six different loads.   The six half-bridges can be controlled separately from a standard serial data interface and have various diagnostic functions. The MP6526 has very low quiescent current in standby mode, making it suitable for a wide range of applications.     Full protection features include short-circuit protection (SCP), under-voltage protection (UVP), and thermal shutdown.    The MP6526 requires a minimal number of readily available, standard, external components and is available in SOIC-28, QFN-24 (4mmx4mm), and QFN-24 (5mmx5mm) packages.     Up to 0.9A Output Current Total Max Current 2.4A (All Outputs Combined) RDS(ON) (HS + LS) Typically 1.1Ω at 25°C, Maximum 2Ω at 150°C Very Low Quiescent Current IVS < 6μA in Standby Mode Versus Total Temperature Range Outputs Short-Circuit Protected Over-Temperature Protection (OTP) and Pre-Warning Under-Voltage Protection (UVP) Serial Data Interface Various Diagnostic Functions: Shorted Output, Open-Load, Over-Temperature, and Under-Voltage Fault Output Flag Daisy-Chaining Possible Serial Interface Clock Frequency up to 3MHz, 5V Compatible Available in SOIC-28, QFN-24 (4mmx4mm) and QFN-24 (5mmx5mm) Packages APPLICATIONS   Drive Various Loads in Automotive and Industrial Applications DC Motor All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are trademarks of Monolithic Power Systems, Inc. or its subsidiaries. MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 1 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL TYPICAL APPLICATION Serial Load Configuration Parallel Load Configuration (Independent Motor Operation) MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 2 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL ORDERING INFORMATION Part Number* MP6526GY MP6526GR MP6526GU Package SOIC-28 QFN-24 (4mmx4mm) QFN-24 (5mmx5mm) Top Marking See Below See Below See Below * For Tape & Reel, add suffix –Z (e.g.: MP6526GY–Z). TOP MARKING (MP6526GY) MPS: MPS prefix YY: Year code WW: Week code MP6526: Product code of MP6526GY LLLLLLLLL: Lot number TOP MARKING (MP6526GR) MPS: MPS prefix Y: Year code WW: Week code MP6526: Product code of MP6526GR LLLLLL: Lot number TOP MARKING (MP6526GU) MPS: MPS prefix YY: Year code WW: Week code MP6526: Product code of MP6526GU LLLLLLL: Lot number MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 3 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL PACKAGE REFERENCE PGND PGND OUT6 DI TOP VIEW OUT5 TOP VIEW PGND TOP VIEW 24 23 22 21 20 19 2 17 CS VS 3 16 AGND VS 4 15 FAULT VS 5 14 VCC OUT3 6 13 DO SOIC-28 8 9 10 11 12 EN 7 OUT1 VS PGND CLK PGND 18 OUT2 1 PGND OUT4 QFN-24 (4mmx4mm) QFN-24 (5mmx5mm) PIN FUNCTIONS SOIC-28 QFN (4x4) QFN (5x5) Pin # Pin # Pin # 1, 3, 12, 14, 7, 9, 10, 21, 7, 9, 10, 21, 15, 28 22, 24 22, 24 2 23 23 4 1 1 5, 10, 17, 26 2, 5 6-9 2-5 3, 4 11 6 6 13 8 8 16 11 11 Name Description PGND Power ground. OUT5 OUT4 NC VS OUT3 OUT2 OUT1 Half-bridge output 5. Half-bridge output 4. No connection. Power supply. Half-bridge output 3. Half-bridge output 2. Half-bridge output 1. Enable. Drive EN low to put the device in standby mode. Drive EN high for normal operation. Serial data output. Logic supply voltage. Fault output. A low output at FAULT indicates that the IC has detected an over-temperature or over-current condition. This output is open-drain. Analog ground. Chip select input. Serial clock input. Serial data input. Half-bridge output 6. 18 12 12 EN 19 20 13 14 13 14 DO VCC 21 15 15 FAULT 22 23 24 25 27 16 17 18 19 20 16 17 18 19 20 AGND CS CLK DI OUT6 MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 4 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance (5) Supply voltage (VVS) ..................................... 40V VOUTx ........................................ -0.3 to VVS + 0.3V Logic supply voltage (VVCC) ........... -0.3 to +6.5V Logic input voltage ................ -0.3 to VVCC + 0.3V Logic output voltage .............. -0.3 to VVCC + 0.3V Voltage at all other pins ................. -0.3 to +6.5V Continuous power dissipation (TA = +25°C) (2) SOIC-28 ...................................................... 2.1W QFN-24 (4mmx4mm) ..................................... 3W QFN-24 (5mmx5mm) .................................. 3.5W Junction temperature ................................ 150°C Lead temperature...................................... 260°C Storage temperature ................... -60°C to 150°C SOIC-28 ................................. 60 ...... 30 ... °C/W QFN-24 (4mmx4mm) ............. 42 ....... 9 .... °C/W QFN-24 (5mmx5mm) ............. 36 ....... 8 .... °C/W Recommended Operating Conditions (4) Supply voltage (VS) ............................. 7V to 28V Logic supply voltage (VVCC) ........ 4.75V to 5.25V Operating junction temp. (TJ) ....-40°C to +150°C MP6526 Rev. 1.0 3/5/2019 θJA θJC NOTES: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the (MAX), the maximum junction temperature TJ junction-to-ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) Devices are ESD sensitive. Handling precaution is recommended. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 5 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL ELECTRICAL CHARACTERISTICS 7V < VVS < 28V, VVCC = 5V, TA = -40°C to +125°C, unless otherwise noted. Parameters Symbol Operating supply current (VS) IVS Operating supply current (VCC) IVCC Quiescent current (VS) IVS Quiescent current (VCC) IVCC Discharge current (VS) IVS Internal oscillator frequency fOSC Power-on reset threshold VVCC Power-on reset delay Condition 85 After switching on VVCC IOCP Dead time EN Input EN low-level threshold EN high-level threshold Pull-down current of EN input MP6526 Rev. 1.0 3/5/2019 6 2.7 6 2.75 6 67 90 μA 1.8 6 μA 23 35 μA 3 mA 166 kHz 120 2.6 3.0 V 100 190 μs 6.5 V V 14 23 ms 1.1 1.7 2 15 1.8 0.3 0.72 2.4 60 Ω Ω mJ A mA μs 1 0.1 0.28 1.4 1.3 0.21 0.53 1.9 2 20 50 μs 2 20 45 μs 2 3 10 ms μs 0.8 VEN = VVCC mA 30 TJ = -40°C to +125°C TJ = +150°C (6) Bit14 (SCT) = low, VVS = 13V Bit14 (SCT) = high, VVS = 13V Bit13 (OLD) = low, output off VVS = 13V, RLOAD = 50Ω VVS = 13V, 10% to 90% VOUT, RLOAD = 50Ω VVS = 13V, 10% to 90% VOUT, RLOAD = 50Ω VVS =13V, RLOAD = 50Ω Units 2.3 7 Inductive shutdown energy (7) Over-current limit OUTx falling time 2.6 0.6 RDS(ON) OUTx rising time Max 5.5 HS + LS switch-on resistance Open-load detection current Output switch-on/-off delay Typ VVS = 40V, EN = low Under-voltage lockout threshold rising Under-voltage lockout threshold hysteresis Under-voltage lockout delay time Output Specification Over-current shutdown delay time Min VVS < 28V normal operation, all output stages off VVS < 28V normal operation, all output low stages on, no load VVS < 28V normal operation, all output high stages on, no load 4.75V < VVCC < 5.25V, normal operation VVS = 28V, VVCC = 0V or VVCC = 5V, EN = low, or VVCC = 5V, bit SE = low, output pins to VS and GND 4.75V < VVCC < 5.25V, EN or bit SE = low 1.7 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 80 V V μA 6 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL ELECTRICAL CHARACTERISTICS (continued) 7V < VVS < 28V, VVCC = 5V, TA = -40°C to +125°C, unless otherwise noted. Parameters Symbol Thermal Shutdown and Pre-Warning (7) Thermal pre-warning threshold Thermal pre-warning hysteresis Thermal shutdown threshold Thermal shutdown hysteresis Ratio thermal shutdown/thermal pre-warning MP6526 Rev. 1.0 3/5/2019 Condition Min Typ Max Units 120 145 15 175 15 170 °C °C °C °C 150 1.05 200 1.2 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 7 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL SERIAL INTERFACE TIMING ELECTRICAL CHARACTERISTICS (7) 7V < VVS < 28V, VVCC = 5V, TA = -40°C to +125°C, unless otherwise noted. Parameters Logic Inputs (DI, CLK, CS) Symbol Condition Min Typ Input low-level threshold VDI, VCLK = VVCC VCS = 0V 0.7 x VVCC 2 2 0V < VDO < VVCC, VCS = VVCC VVCC 0.7V -10 Input high-level threshold Pull-down current of DI, CLK Pull-up current of CS Logic Output (DO) Output low level Output high level Leakage current (tri-state) Timing Characteristics DO enable after CS falling edge DO disable after CS rising edge DO falling/rising time DO valid time CS set-up time (high to low) CS set-up time (low to high) T10 T4 T8 CS high time T9 CLK high time CLK low time CLK period time CLK set-up time (high to low) CLK set-up time (low to high) DI set-up time DI hold time T5 T6 T1 T2 CDO = 100pF CDO = 100pF CDO = 100pF CDO = 100pF Bit14 (SCT) = high Bit14 (SCT) = low T7 T3 T11 T12 150 150 0.75 0.3 150 150 333 150 150 26 26 Max Units 0.3 x VVCC V V 50 50 μA μA 0.5 V V 10 μA 200 200 100 200 ns ns ns ns ns ns ms ms ns ns ns ns ns ns ns NOTES: 6) Guaranteed by characterization, not tested in production. 7) Not subject to production test, specified by design. MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 8 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL SERIAL INTERFACE TIMING DIAGRAMS MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 9 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL TYPICAL PERFORMANCE CHARACTERISTICS VVS = 13V, VVCC = 5V, TA = 25°C, unless otherwise noted. MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 10 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL TYPICAL PERFORMANCE CHARACTERISTICS (continued) VVS = 13V, VVCC = 5V, TA = 25°C, unless otherwise noted. SCP Output Delay Time Output Delay Time SCT=0, OUT1 short to OUT2 HS ON HS OFF VOUT1 10V/div. VCLK 2V/div. VCLK 2V/div. VOUT2 10V/div. ISC 1A/div. VCS 2V/div. VCS 2V/div. VOUT 5V/div. VOUT 5V/div. Output Delay Time Output Delay Time LS OFF LS ON VCLK 2V/div. VCLK 2V/div. VCS 2V/div. VCS 2V/div. VOUT 5V/div. VOUT 5V/div. MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 11 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL BLOCK DIAGRAM Serial interface Input register Output register CS DI CLK DO EN SRR TP LS1 SLS1 HS1 SHS1 LS2 SLS2 HS2 SHS2 LS3 SLS3 HS3 SHS3 LS4 SLS4 HS4 SHS4 LS5 SLS5 HS5 SHS5 LS6 SLS6 HS6 SHS6 OLD SCD SCT EN SE PSF HS Gate Driver GH1 GH2 GH3 GH4 GH5 GH6 LS Gate Driver GL1 GL2 GL3 GL4 GL5 GL6 Control Logic Charge Pump VS GH1 GH2 GH3 GH4 GH5 GH6 OUT1 OUT2 Power-on reset VCC OUT3 OUT4 FAULT Fault Handling AGND UVLO Comparator TSD OUT5 Over-load and shortcircuit protection OUT6 GL1 GL2 GL3 GL4 GL5 GL6 PGND UVLO_REF VS Figure 1: Functional Block Diagram MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 12 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL OPERATION The MP6526 is a six-half-bridge motor driver that can drive up to six different loads with separate controls for high-side or low-side MOSFETs from a standard serial data interface. Serial Interface Data transfer starts with the falling edge of the CS signal (see Figure 2). Execution of new input data is enabled on the rising edge of the CS signal. Data must appear at DI synchronized to CLK and is accepted on the falling edge of the CLK signal. The LSB (bit0, SRR) must be transferred first. The output data at DO is enabled on the falling edge of CS. The output data changes state with the rising edge of CLK and remains stable until the next rising edge of CLK appears. When CS is high, DO is in a tri-state condition. The LSB (bit0, TP) is transferred first. Figure 2: Data Transfer Table 1: Input Data Protocol Bit Input Register 0 SRR 1 2 3 4 5 6 7 8 9 10 11 12 13 LS1 HS1 LS2 HS2 LS3 HS3 LS4 HS4 LS5 HS5 LS6 HS6 OLD 14 SCT 15 SE MP6526 Rev. 1.0 3/5/2019 Function Status register reset (high = reset. The bits PSF, SCD, and over-temperature shutdown in the output data register are set to low). Controls output LS1 (high = switch output LS1 on). Controls output HS1 (high = switch output HS1 on). Controls output LS2 (high = switch output LS2 on). Controls output HS2 (high = switch output HS2 on). Controls output LS3 (high = switch output LS3 on). Controls output HS3 (high = switch output HS3 on). Controls output LS4 (high = switch output LS4 on). Controls output HS4 (high = switch output HS4 on). Controls output LS5 (high = switch output LS5 on). Controls output HS5 (high = switch output HS5 on). Controls output LS6 (high = switch output LS6 on). Controls output HS6 (high = switch output HS6 on). Open-load detection (low = on). Programmable time delay for short circuit (shutdown delay high/low = 12ms/1.5ms). Software enable. Low = standby, high = normal operation (data transfer is not affected by standby function because the digital part is still powered). www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 13 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL Table 2: Output Data Protocol Bit Input Register 0 TP 1 Status LS1 2 Status HS1 3 4 5 6 7 8 9 10 11 12 Status LS2 Status HS2 Status LS3 Status HS3 Status LS4 Status HS4 Status LS5 Status HS5 Status LS6 Status HS6 13 SCD 14 EN 15 PSF Function Temperature pre-warning: high = warning (over-temperature shutdown see remark below). Normal operation: high = output is on, low = output is off. Open-load detection: high = open load, low = no open load (correct load condition is detected if the corresponding output is switched off). Normal operation: high = output is on, low = output is off. Open-load detection: high = open load, low = no open load (correct load condition is detected if the corresponding output is switched off). See LS1. See HS1. See LS1. See HS1. See LS1. See HS1. See LS1. See HS1. See LS1. See HS1. Short circuit detected. Set SCD high when at least one output is switched off by a short-circuit condition. Enable. EN is controlled by software (bit SE in the input register) and hardware Enable (EN). Low = standby, high = normal operation. Power supply fail. Under-voltage at VS detected. NOTE: Bit0 to 15 = high: over-temperature shutdown. Table 3: Status of the Input Register after Power-On Reset Bit15 Bit14 Bit13 Bit12 Bit11 Bit10 Bit9 Bit8 Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 (SE) (SCT) (OLD) (HS6) (LS6) (HS5) (LS5) (HS4) (LS4) (HS3) (LS3) (HS2) (LS2) (HS1) (LS1) (SRR) H H MP6526 Rev. 1.0 3/5/2019 H L L L L L L L L L L L www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. L L 14 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL Enable Control (EN) There are two ways to enable or disable the MP6526: 1. Controlled by software: set bit SE in the input register. Low = standby, high = normal operation. 2. Hardware enable (EN): low = standby, high = normal operation. In both cases, if the device is disabled, then all output stages are turned off, but the serial interface remains active. The output stages can be activated again by setting the bit SE high (when EN = high) or by switching EN back to high (when SE = high). Open-Load Detection When the open-load detection bit (OLD) is set to low, open-load detection is enabled. In this mode, a pull-down current for each low-side switch is turned on. When an open-load has been detected, the corresponding output bit (LSx or HSx) in the output data register is set to high. Once the open load is removed, the corresponding DO bit is cleared, indicating the end of the open-load event. Testing the open load of the H-bridge configuration is a two-step process. First, switch off all high-side (HSx/HSy) and low-side (LSx/LSy) drivers. The voltage at both clamps in this condition is pulled down. Next, with both low-side drivers off, switch on one high-side driver (HSx or HSy). Since the DC motor has a relatively low internal resistance, the voltage of the inactive high-side output should be at the same level as the activated high-side output. In the case of an open load, the inactive high-side output register reports a 0 if the active high-side output is 1. Conversely, if the load is connected, the inactive high-side output reports a 1. MP6526 Rev. 1.0 3/5/2019 Discharge Circuit Many typical applications use an inverse-polarity protection diode (see D1 in Figure 3). However, this method involves a certain risk. During inhibit mode, the IC consumes only an extremely low current (IVS), (i.e.: 20μA max). Any peaks on the supply voltage charge the blocking capacitor gradually. D1 prevents the capacitor from discharging via the power supply. Due to the extremely small quiescent current, discharging via the IC can also be neglected. This means that during long periods in inhibit mode, the IC's supply voltage could increase continuously until the maximum supply voltage limit of 40V is exceeded, damaging the IC. The device features a discharger circuit that prevents such unwanted effects. If VS exceeds a threshold value of approximately 37V, the blocking capacitor is discharged via an integrated resistor until VS falls below the threshold again. Figure 3: Functional Principle of the Discharger Circuit Over-Current Protection (OCP) The MP6526 has internal overload and short-circuit protection. The currents in both the high-side and low-side MOSFETs are measured. If the current exceeds the current limit, an internal timer is started. When a permanent over-current shutdown delay time programmed by the short-circuit timer bit (SCT) is reached, the short-circuit detection bit (SCD) is set, and the shorted output is disabled. By writing a high to the SRR bit in the input register, the SCD bit is reset, and the disabled outputs are enabled. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 15 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL Thermal Shutdown and Pre-Warning Thermal monitoring is also integrated into the MP6526. If the junction temperature rises above the thermal pre-warning threshold, the temperature pre-warning bit (TP) in the output register is set. When the temperature falls below the thermal pre-warning threshold, the bit TP is reset. The bit TP can be read without transferring a complete 16-bit data word. When CS = high to low, the state of TP appears at DO. After the microcontroller has read this information, CS is set high, and the data transfer is interrupted without affecting the state of the input and output registers. If the junction temperature rises above the thermal shutdown threshold, all switches turn off, and all bits in the output register are set high. Operation resumes immediately when the junction temperature has fallen below the thermal shutdown threshold and when a high has been written to the SRR bit in the input register. The thermal pre-warning threshold have hysteresis. and Power-Supply Fail If at any time the voltage on VS falls below the under-voltage lockout (UVLO) threshold voltage, an internal timer is started. The power supply fail bit (PSF) in the output register is set, and all outputs are disabled when a permanent UVLO delay time is reached. Operation resumes immediately when VS rises above the UVLO threshold. The PSF bit remains high until it is reset by the SRR bit in the input register. Fault Output The MP6526 includes an open-drain, active-low, fault indicator output (FAULT). A fault is indicated if the current limit is tripped or thermal shutdown is tripped. A fault on any channel causes FAULT to be pulled low. The FAULT value is maintained until the fault condition is removed and normal operation resumes. Do not apply more than 6V to FAULT. shutdown Note that bit0 to 15 = high indicates an over-temperature shutdown. MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 16 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL PACKAGE INFORMATION SOIC-28 MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 17 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL PACKAGE INFORMATION (continued) QFN-24 (4mmx4mm) MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 18 MP6526 – HEX HALF-BRIDGE MOTOR DRIVER WITH SERIAL INPUT CONTROL PACKAGE INFORMATION (continued) QFN-24 (5mmx5mm) PIN 1 ID 0.30x45° TYP. PIN 1 ID MARKING PIN 1 ID INDEX AREA BOTTOM VIEW TOP VIEW SIDE VIEW NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETERS MAX. 4) DRAWING CONFIRMS TO JEDEC MO-220. 5) DRAWING IS NOT TO SCALE. RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6526 Rev. 1.0 3/5/2019 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2019 MPS. All Rights Reserved. 19
MP6526GY-Z 价格&库存

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