MP6536DU-LF-P

MP6536 26V, 5.5A 3-Channel Half-Bridge Driver The Future of Analog IC Technology DESCRIPTION FEATURES The MP6536 is a 3-channel half-bridge driver IC intended to drive a 3-phase brushless DC motor.           The MP6536 features a low-current shutdown mode, standby mode, input under-voltage protection, current limit, thermal shutdown, and fault flag signal output. All channels of the drivers interface with standard logic signals. The MP6536 is available in a 40 lead QFN 5mmx5mm package. 5V to 26V VDD ±5.5A Peak Current Output Up to 1MHz PWM Frequency Protected Integrated Power 0.14Ω Switches 10ns Switch Dead Time All Switches Current Limited Internal Under-Voltage Protection Internal Thermal Protection Short-Circuit Protection Fault Output Flag APPLICATIONS  3-Phase BLDC Motor Drive All MPS parts are lead-free, halogen free, and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION 1 2 3 4 5 6 7 8 9 BST1 LS1 LS1 SW1 SW1 VSP VSP VSP SW2 SW2 10 VDD MP6536 Rev. 1.01 10/24/2018 MP6536 LS2 LS2 BST2 40 VDR1 AGND VDR2 37 BST3 LS3 LS3 33 39 38 35,36 34 32 31 30 SW3 SW3 29 28 27 26 N/C VSP VSP VSP 25 24 PGND PGND N/C 20 23 21 N/C FAULT3 FAULT2 N/C PWM1 13 PWM2 14 FAULTB 15 SHDNB 16 PWM3 17 STBYB 18 AGND 19 FLT3B 20 FLT2B 11 12 22 PWM1 PWM2 FAULT SHDN PWM3 STBY www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. 1 MP6536 - 26V, 5.5A 3-CHANNEL POWER HALF-BRIDGE ORDERING INFORMATION Part Number* Package Top Marking MP6536DU QFN-40 (5mmx5mm) See Below * For Tape & Reel, add suffix –Z (e.g. MP6536DU–Z); For RoHS, compliant packaging, add suffix –LF (e.g. MP6536DU–LF–Z). TOP MARKING MPS: MPS Prefix: YY: Year Code; WW: Week Code: MP6536: Part Number; LLLLLLL: Lot number; PACKAGE REFERENCE AGND AGND VDR2 BST3 36 35 34 33 LS3 VDR1 37 31 BST2 38 LS3 LS2 39 3 28 VSP VSP 4 27 VSP VSP 5 26 VSP SW1 6 25 NC SW1 7 24 NC LS1 8 23 PGND LS1 9 22 PGND 10 21 NC 11 NC FLT2B 20 VSP FLT3B 19 SW3 AGND 18 29 STBYB 17 2 PWM3 16 SW2 SHDNB 15 SW3 FAULTB 14 30 PWM2 13 1 PWM1 12 SW2 BST1 MP6536 Rev. 1.01 10/24/2018 32 LS2 40 TOP VIEW www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. 2 MP6536 - 26V, 5.5A 3-CHANNEL POWER HALF-BRIDGE ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance (4) VSP Supply Voltage ..................................... 28V SWx Voltage ........................ -0.3V to VDD + 0.3V BSTx to SWx ................................... -0.3V to +6V Voltage at All Other Pins................. -0.3V to +6V Continuous Power Dissipation.. (TA = +25°C) (2) ………………………………………….… ...4.2W Storage Temperature ................-55C to +150C Junction Temperature ............................... 150°C Lead Temperature .................................... 260°C QFN-40 (5mmx5mm) .............. 36 ........ 8 .... C/W Recommended Operating Conditions (3) VSP Supply Voltage ........................... 5V to 26V Operating Junction Temp. (TJ) .-40°C to +125°C MP6536 Rev. 1.01 10/24/2018 θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. 3 MP6536 - 26V, 5.5A 3-CHANNEL POWER HALF-BRIDGE ELECTRICAL CHARACTERISTICS VSP = 12V, VSHDNB = 5V, TA = +25C, unless otherwise specified. Parameters Symbol Condition VSP Operating Current ILOAD = 0A，PWMx=0 VSP Shutdown Current Operating VSP Threshold Low VSHDN = 0V Min 3.7 Operating VSP Threshold High STBYB Threshold Low STBYB Threshold High PWM Input Bias Current SHDNB Threshold Low SHDNB Threshold High PWMx Threshold Low PWMx Threshold High 0.8 0.8 0.8 Dead Time (5) PWMx to SWx Delay Time Rising PWMx to SWx Delay Time Falling VSP = 7V, High-Side and LowSide VPWM = 0V, Sinking VPWM = 5V, Sourcing VPWM = 0 to 5V, 50% Duty Cycle Falling Value High-Side MOSFET On, VBSTVSW=5.5V VPWM = 0V to 5V VPWM = 0V to 5V, High or Low Pulse IOUT= ±100mA VPWM = 0V to 5V VPWM = 5V to 0V Thermal Shutdown Temperature (5) TJ Rising SWx On Resistance (5) SWx Current Limit (5) SWx Switching Frequency BST Voltage UVLO BST Current SWx Rise/Fall Time (5) Minimum PWM Pulse Width Thermal Shutdown Hysteresis Typ Max Units 2.2 3.5 mA 24 4 30 µA V 4.4 4.8 V 1.0 1.6 0.1 1.0 1.6 1 1.6 1.8 1.0 1.8 1.8 V V µA V V V V 0.14 Ω 5.5 5.5 2.2 A A MHz V 30 µA 5 ns 30 ns 10 30 30 ns ns ns 160 C 35 C 1 Notes: 5) Not production tested. MP6536 Rev. 1.01 10/24/2018 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. 4 MP6536 - 26V, 5.5A 3-CHANNEL POWER HALF-BRIDGE PIN FUNCTIONS Pin # 1,2 Name SW2 3,4,5 VSP 6,7 8,9 SW1 LS1 10 BST1 11 NC 12 PWM1 13 PWM2 14 15 16 17 Description Output 2. SW2 is valid approximately 100µs after VSP goes high. Power Supply Input. Connect VSP to the positive side of the input power supply. Bypass VSP to PGND as close to the IC as possible. Output 1. SW1 is valid approximately 100µs after VSP goes high. Low-Side Source Connection of SW1. Bootstrap Supply. BST1 powers the high-side gate of the SW1 stage. Connect a capacitor (0.1μF or greater) between BST1 and SW1. No Connection. NC MUST be kept floating. Driver Logic Input 1. Drive PWM1 with the signal that controls SW1. Drive PWM high to turn on the high-side switch; drive PWM low to turn on the low-side switch. Driver Logic Input 2. Drive PWM2 with the signal that controls SW2. Drive PWM high to turn on the high-side switch; drive PWM low to turn on the low-side switch. FAULTB Fault Output. A low output at FAULT indicates that the MP6536 has detected an overtemperature, over-current, or under-voltage condition. FAULTB is an open-drain output. SHDNB Shutdown Input. When SHDNB is low, the IC shuts off. Driver Logic Input 3. Drive PWM3 with the signal that controls SW3. Drive PWM high to PWM3 turn on the high-side switch; drive PWM low to turn on the low-side switch. Standby Input. Default low (internal pull-down). If driven high, the output of the driver is STBYB determined by PWM1/2/3. If driven low, all outputs are high impedance. 18 AGND Analog Ground. 19 FLT3B Fault Monitor. For details see the “Fault Output” section. FLT3B is an open-drain output. 20 FLT2B Fault Monitor. For details see the “Fault Output” section. FLT2B is an open-drain output. 21 NC 22, 23 PGND 24, 25 NC No Connection. NC MUST be kept floating. 26,27, 28 VSP Power Supply Input. Connect VSP to the positive side of the input power supply. Bypass VSP to PGND as close to the IC as possible. 29, 30 SW3 Output 3. SW3 is valid approximately 100µs after VSP goes high. MP6536 Rev. 1.01 10/24/2018 No Connection. NC MUST be kept floating. Power Ground. Connect the exposed pad on the bottom side to ground plane. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. 5 MP6536 - 26V, 5.5A 3-CHANNEL POWER HALF-BRIDGE PIN FUNCTIONS (continued) Pin # Name 31, 32 LS3 33 BST3 34 VDR2 35, 36 AGND 37 VDR1 38 BST2 39,40 LS2 MP6536 Rev. 1.01 10/24/2018 Description Low-Side Source Connection of SW3. Bootstrap Supply. BST3 powers the high-side gate of the SW3 stage. Connect a capacitor (0.1μF or greater) between BST3 and SW3. Gate Drive Supply Bypass. The voltage at VDR2 is supplied from an internal regulator from VSP. VDR2 powers the internal circuitry and internal MOSFET gate drive for the SW3 output stage. Bypass VDR2 to PGND with a 0.1μF to 10μF capacitor. Analog Ground. Gate Drive Supply Bypass. The voltage at VDR1 is supplied from an internal regulator from VSP. VDR1 powers the internal circuitry and internal MOSFET gate drive for the SW1 and SW2 output stages. Bypass VDR1 to PGND with a 0.1μF to 10μF capacitor. Bootstrap Supply. BST2 powers the high-side gate of the SW2 stage. Connect a capacitor (0.1μF or greater) between BST2 and SW2. Low-Side Source Connection of the SW2. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. 6 MP6536 - 26V, 5.5A 3-CHANNEL POWER HALF-BRIDGE TYPICAL PERFORMANCE CHARACTERISTICS VSP = 24V, VSHDNB = 5V, RLOAD = 8Ω, TA = +25ºC, unless otherwise noted. MP6536 Rev. 1.01 10/24/2018 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. 7 MP6536 - 26V, 5.5A 3-CHANNEL POWER HALF-BRIDGE BLOCK DIAGRAM LSx FIGURE 1. Function Block Diagram (1 Half-Bridge Channel Only) MP6536 Rev. 1.01 10/24/2018 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. 8 MP6536 - 26V, 5.5A 3-CHANNEL POWER HALF-BRIDGE OPERATION 5V The MP6536 is a 3-channel half-bridge driver intended to drive a brushless DC motor. The output is in phase with the input, and the dead time is optimized for symmetrical performance, regardless of load conditions. When SHDN is low, all channels are off. When STBYB is pulled low, it causes the outputs of all the channels to go into high impedance. However, when the voltage across BST1/2/3 and SW1/2/3 drops low significantly, the bottom MOSFET is turned on to refresh the external bootstrap capacitor. Connecting a capacitor (0.1μF or greater) between BST and SW (as the bootstrap capacitor) is recommended. In order to prevent erratic operation, two undervoltage lockout (UVLO) circuits are used. One ensures that the supply for the bottom gate drive circuit is sufficiently high, and the other is for the top gate driver. Fault Protection To protect the power MOSFETs, an internal current limit of 5.5A is set for all MOSFETs. When this limit is reached, all MOSFETs of the over-current bridge channel will go into high impedance for a fixed duration (30µs approximately) before resuming normal operation. Thermal monitoring is integrated into the MP6536. If the die temperature rises above 160ºC, all switches are turned off. The temperature must fall below 125ºC before normal operation resumes. To enhance the robustness of the device under a short-circuit condition, a capacitor can be connected to FAULTB (see Fig. 2). The time constant of the RC must be greater than 50ms for the FAULTB node to reach 2V. Under a shortcircuit condition, the FAULTB node re-sets to zero, and the part is placed in standby mode until the voltage at STBYB is above 2V. MP6536 Rev. 1.01 10/24/2018 MP6536 R FAULTB C STBYB FIGURE 2. Fault Protection Enhancement Circuit Fault Output The MP6536 includes an open drain, active-low fault indicator output (FAULTB). A fault is indicated if one of the following conditions is detected: 1. The current limit is tripped. 2. Thermal shutdown is tripped. A fault on any channel causes FAULTB to pull low. Once the fault is removed, the MP6536 resumes normal operation. Do not apply more than 6V to FAULTB. Error Reporting The MP6536 has two fault monitor pins (FLT3B and FLT2B), which are active low open-drain outputs. They provide protection-mode signaling to a PWM controller or another system control device (see Table 1). TABLE 1. Fault Output Logic OCP 0 0 0 1 OTP 0 0 1 0 UVP 0 1 0 0 FLTB2 1 0 1 0 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. FLTB3 1 1 0 0 9 MP6536 - 26V, 5.5A 3-CHANNEL POWER HALF-BRIDGE PACKAGE INFORMATION QFN-40 (5x5mm) PIN 1 ID 0.30x45° TYP. PIN 1 ID MARKING PIN 1 ID INDEX AREA BOTTOM VIEW TOP VIEW SIDE VIEW NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.08 MILLIMETERS MAX. 4) DRAWING CONFIRMS TO JEDEC MO-220, VARIATION VHHE-1 5) DRAWING IS NOT TO SCALE. RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6536 Rev. 1.01 www.MonolithicPower.com 10/24/2018 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2018 MPS. All Rights Reserved. 10