MP6906
Fast Turn-Off Intelligent Rectifier
with Very Low Voltage Forward Regulation
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP6906 is a low-drop diode emulator IC
that combines an external switch to replace
Schottky diodes in high-efficiency flyback
converters. The chip regulates the forward drop
of an external switch to about 30mV and
switches it off as soon as the voltage becomes
negative.
The MP6906 provides a SYNC interface to
receive an external signal to shut down the gate
driver for reliable continuous conduction mode
(CCM) operation. A programmable light-load
sleep mode reduces the IC’s quiescent current
to 150µA. Also, it has a low UVLO level for
operation at a lower output without an additional
winding. Rail-to-rail output provides higher
driving voltage to the external MOSFET.
The MP6906 is available in compact SOIC-8
and TSOT23-6 packages.
Works with 12V Standard and 5V Logic
Level FETS
Fast Turn-Off Total Delay of 25ns
4.2V~35V Wide VDD Operating Range
30mV VDS Regulation Function (1)
150µA Quiescent Current in Light-Load
Mode (1)
Supports DCM and Quasi-Resonant
Operation
SYNC Interface for CCM Operation
Supports
High-side
and
Low-side
Rectification
Power Savings of up to 1.5W in a Typical
Notebook Adapter
SOIC-8 and TSOT23-6 Packages
APPLICATIONS
Industrial Power Systems
Distributed Power Systems
Battery Powered Systems
Flyback Converters
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under Quality
Assurance.
“MPS” and “The Future of Analog IC Technology” are registered trademarks
of Monolithic Power Systems, Inc.
NOTE:
1) Related issued patent: US Patent US8,067,973; US8,400,790. CN Patent
ZL201010504140.4; ZL200910059751.X. Other patents pending.
TYPICAL APPLICATION
MP6906 Rev. 1.02
9/21/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
1
MP6906- FAST TURN-OFF INTELLIGENT RECTIFIER WITH LOW VFWD REGULATION
ORDERING INFORMATION
Part Number
MP6906GS
MP6906GJ
Package
SOIC-8
TSOT23-6
Top Marketing
See Below
See Below
* For Tape & Reel, add suffix –Z (e.g. MP6906GS–Z)
* For Tape & Reel, add suffix –Z (e.g. MP6906GJ–Z)
TOP MARKING (MP6906GS)
MP6906: Product code of MP6906GS
MPS: MPS prefix
Y: Year code
WW: Week code
LLL: Lot number
TOP MARKING (MP6906GJ)
MMQ: Product code of MP6906GJ
Y: Year code
MP6906 Rev. 1.02
9/21/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
2
MP6906- FAST TURN-OFF INTELLIGENT RECTIFIER WITH LOW VFWD REGULATION
PACKAGE REFERENCE
SOIC-8
TSOT23-6
ABSOLUTE MAXIMUM RATINGS (2)
Recommended Operation Conditions (4)
VDD to VSS ..................................... –0.3V to +38V
PGND to VSS ............................... –0.3V to +0.3V
VG to VSS....................................... –0.3V to +20V
VD to VSS ........................................ –1V to +180V
SYNC, LL, EN to VSS .................. –0.3V to +6.5V
Continuous power dissipation (TA = +25°C) (3)
SOIC-8 ........................................................ 1.4W
TSOT23-6 ................................................. 0.57W
Junction temperature ................................ 150C
Lead temperature (solder) ........................ 260C
Storage temperature ............... –55°C to +150C
VDD to VSS.......................................... 4.2V to 35V
Operating junction temp. (TJ). .. -40°C to +125°C
MP6906 Rev. 1.02
9/21/2018
Thermal Resistance (5)
θJA
θJC
SOIC-8 ..................................... 90 ...... 45... C/W
TSOT23-6 ............................... 220 .... 110.. C/W
NOTES:
2) Exceeding these ratings may damage the device.
3) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/θJA. Exceeding the maximum allowable power dissipation
will produce an excessive die temperature, causing the
regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
4) The device is not guaranteed to function outside of its
operating conditions.
5) Measured on JESD51-7, 4-layer PCB.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
3
MP6906- FAST TURN-OFF INTELLIGENT RECTIFIER WITH LOW VFWD REGULATION
ELECTRICAL CHARACTERISTICS
VDD = 12V, -40C ≤ TJ ≤ +125C, unless otherwise noted.
Parameter
VDD voltage range
VDD UVLO rising
VDD UVLO hysteresis
Symbol Conditions
ICC
Quiescent current
Iq
Shutdown current (6)
Input bias current on VD
Turn-on blanking time
Turn-off blanking VDS threshold
Turn-off threshold on SYNC
Internal pull-down current on
SYNC
Light-load-enter SYNC duration
Light-load-enter pulse width
Light-load-enter
pulse
width
hysteresis
Gate disable threshold on LL
Turn-on threshold (VDS)
Gate Driver Section
VG (low)
VG (high)
1.2
0.1
Vfwd
TB_ON
VB_OFF
VSYN
Max
35
4.2
Units
V
V
V
8
10
mA
2
3
150
200
220
mA
CLOAD = 5nF, VGS = 2V
CLOAD = 10nF, VGS = 2V
VD = 180V
CLOAD = 5nF
TSYN
TLL
RLL = 200k
TLL-H
RLL = 200k
VLL_DIS
VLL-DS
VG-L
SYNC turn-off propagation delay
Turn-off propagation delay
TDoff
Turn-off total delay
TDoff
18
2
34
12
300
450
1
2.7
2
2.4
mV
mV
ns
ns
µA
µs
V
V
10
15
µA
95
3.6
115
4.9
µs
µs
1.2
1.4
1.6
1.9
75
2.2
1.8
0.6
-400
ILOAD = 1mA
VDD > 10.5V
VDD ≤ 10.5V
10.5
µA
µA
oC
oC
V
V
µA
23
3
200
250
VDD = 12V
VD = VSS
VD = VSS, CLOAD = 5nF,
RGATE = 0, VGS = 2V
VD = VSS, CLOAD = 10nF,
RGATE = 0, VGS = 2V
150
150
30
1.5
0.2
10
12
-6
VSYNC = 5V
VG-H
Pull-down impedance
CLOAD = 5nF,
FSW = 100kHz
VSS - VD = 0.5V
VDD = 4V, EN=0V
VDD = 20V, EN = 0V
VEN-R
TDon
TDon
Turn-on delay
Typ
0.13
Operating current
Light-load mode current
Thermal shutdown (7)
Thermal shutdown hysteresis (7)
Enable UVLO rising
Enable UVLO hysteresis
Internal pull-up current on EN
Control Circuitry Section
VSS–VD forward voltage
Turn-off threshold (VSS-VD)
Min
4.2
µs
0.2
-275
0.31
-150
V
mV
0.05
12
VDD
40
25
0.1
13
V
V
70
50
ns
ns
35
60
ns
45
95
ns
1
2
NOTE:
6) Only for SOIC package
7) Guaranteed by characterization.
MP6906 Rev. 1.02
9/21/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
4
MP6906- FAST TURN-OFF INTELLIGENT RECTIFIER WITH LOW VFWD REGULATION
PIN FUNCTIONS
Pin #
(SOIC-8)
1
2
Pin #
(TSOT23-6)
6
-
Name
Description
PGND
EN
3
5
LL
4
5
6
4
2
3
VD
VSS
VDD
7
-
SYNC
8
1
VG
Power ground. PGND is the return for the driver switch.
Enable. Active high.
Light-load timing setting. Connect a resistor to set the light-load timing. Leave
LL open, or the IC will never enter light-load mode. Pulling LL low disables the
gate driver.
FET drain voltage sense.
Ground. VSS is also used as reference for VD.
Supply voltage.
Interface for external signal control. Pulling SYNC high shuts down the gate
driver immediately.
Gate drive output.
MP6906 Rev. 1.02
9/21/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
5
MP6906- FAST TURN-OFF INTELLIGENT RECTIFIER WITH LOW VFWD REGULATION
TYPICAL PERFORMANCE CHARACTERISTICS
VDD = 12V, unless otherwise noted.
Operation Current
vs. Temperature
180
1.7
9
EN UVLO RISING (V)
9.1
160
8.9
8.8
140
8.7
8.6
8.5
-50
0
50
100
120
-50
150
Turn On Delay
vs. Temperature
170
CLOAD=5nF
300
165
160
155
150
145
140
-50
0
50
50
100
1.5
1.4
-50
150
100
150
0
50
100
150
Turn Off Delay vs.
Temperature
CLOAD=10nF
CLOAD=5nF
32
290
280
270
260
250
31
30
29
28
27
26
240
-50
Turn Off Delay vs.
Temperature
52
0
1.6
Turn On Delay vs.
Temperature
TURN ON DELAY (nS)
TURN ON DELAY (nS)
EN UVLO Rising
vs. Temperature
TURN OFF DELAY (nS)
OPERATION CURRENT (mA)
C
=5nF, fSW=100kHz)
9.2 LOAD
Light Load Mode Current
vs. Temperature
0
50
100
150
25
-50
0
50
100
150
0
50
100
150
Minimum On Time
vs. Temperature
CLOAD=10nF
4
2.0
TURN OFF DELAY (nS)
3.9
50
3.8
2.0
3.7
48
3.6
3.5
1.9
46
3.4
44
3.3
1.9
3.2
42
40
-50
MP6906 Rev. 1.02
9/21/2018
3.1
0
50
100
150
1.8
-50
0
50
100
150
3
-50
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
6
MP6906- FAST TURN-OFF INTELLIGENT RECTIFIER WITH LOW VFWD REGULATION
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VDD = 12V, unless otherwise noted.
VS S-VD FORWARD VOLTAGE (mV)
VSS-VD Forward Voltage
vs. Temperature
MP6906 Rev. 1.02
9/21/2018
25.0
24.0
23.0
22.0
21.0
20.0
-50
0
50
100
150
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
7
MP6906- FAST TURN-OFF INTELLIGENT RECTIFIER WITH LOW VFWD REGULATION
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VDD = 12V, unless otherwise noted.
Operation in 90W Flyback
Application
Operation in 90W Adapter
Application
Operation in 90W Flyback
Application
VIN=90Vac IOUT=1A
VIN=90Vac IOUT=4.7A
VIN=250Vac IOUT=1A
VDS
50V/div.
VDS
50V/div.
VDS
50V/div.
VGS
5V/div.
VGS
10V/div.
VGS
5V/div.
ISd
10A/div.
ISd
10A/div.
ISd
10A/div.
Operation in 90W Adapter
Application
VIN=250Vac IOUT=4.7A
VDS
50V/div.
VGS
10V/div.
ISd
10A/div.
NOTE:
8) See Figure 20 for test circuit.
MP6906 Rev. 1.02
9/21/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
8
MP6906- FAST TURN-OFF INTELLIGENT RECTIFIER WITH LOW VFWD REGULATION
FUNCTIONAL BLOCK DIAGRAM
Figure 1: MP6906 Block Diagram
MP6906 Rev. 1.02
9/21/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
9
MP6906- FAST TURN-OFF INTELLIGENT RECTIFIER WITH LOW VFWD REGULATION
OPERATION
The MP6906 supports operation in DCM and
quasi-resonant flyback converters. The control
circuitry controls the gate in forward mode and
turns the gate off when the MOSFET current is
fairly low.
VD Clamp
Because VD can go as high as 180V, a highvoltage JFET is used at the input. To avoid
excessive currents when Vg drops below -0.7V, a
1kΩ resistor is recommended between VD and
the drain of the external MOSFET.
Under-Voltage Lockout (UVLO)
When VDD is below the 4.2V UVLO threshold, the
part enters sleep mode, and VG remains at a low
level.
after a turn-on delay (see Figure 3).
Blanking
Turn-On
The control circuitry contains a blanking function.
When the MOSFET turns on, the control circuitry
ensures the on state lasts for a specific period of
time. The turn-on blanking time is ~1.6µs, during
which the turn-off threshold is blanked (see
Figure 3).
Conduction Phase
When Vds rises above the forward voltage drop
(-30mV), according to the decrease of the
switching current, the MP6906 pulls down the
gate voltage level to make the on resistance of
the synchronous MOSFET larger to ease the rise
of Vds.
Enable (EN)
If EN is pulled low, the part is in shutdown mode,
which consumes
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