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MP6973GS-P

MP6973GS-P

  • 厂商:

    MPS(美国芯源)

  • 封装:

    SOIC8_150MIL

  • 描述:

    OR 控制器 反激 N 通道 1:1 8-SOIC

  • 数据手册
  • 价格&库存
MP6973GS-P 数据手册
MP6973 CCM/DCM Flyback Ideal Diode with Integrated 100V/14mΩ MOSFET with Slew Rate Detection DESCRIPTION FEATURES The MP6973 is a fast turn-off, intelligent rectifier for flyback converters that integrates a 100V/14mΩ MOSFET. It can replace a diode rectifier for higher efficiency and power density. The chip regulates the forward voltage drop of the internal power switch to VFWD (40mV) and turns off before the drain-source voltage reverses.   Integrated 100V/14mΩ MOSFET Optimized Efficiency for Low-Side Rectification Ringing Detection Prevents False Turn-On during DCM Operations Compatible with Energy Star 110µA Quiescent Current Supports DCM, CCM, and Quasi-Resonant Operations Wide Output Range Down to 0V Available in an SOIC-8 Package     The MP6973 is optimized for low-side rectification. The internal ringing detection circuitry prevents the MP6973 from falsely turning on during discontinuous conduction mode (DCM) or quasi-resonant operations.   APPLICATIONS    The MP6973 is available in an SOIC-8 package. Laptop Adapters QC and USB PD Chargers High-Efficiency Flyback Converters All MPS parts are lead-free, halogen free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are registered trademarks of Monolithic Power Systems, Inc. or its subsidiaries. TYPICAL APPLICATION VOUT+ HVC SENSE VDD VOUT- VD VS MP6973 MP6973 Rev. 1.0 6/17/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 1 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER ORDERING INFORMATION Part Number MP6973GS* Package SOIC-8 Top Marking See Below MSL Rating 2 * For Tape & Reel, add suffix –Z (e.g. MP6973GS–Z). TOP MARKING MP6973: Part number LLLLLLLL: Lot number MPS: MPS prefix Y: Year code WW: Week code PACKAGE REFERENCE TOP VIEW VS 1 8 VD HVC 2 7 VD SENSE 3 6 VD 4 5 VDD VS SOIC-8 MP6973 Rev. 1.0 6/17/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 2 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER PIN FUNCTIONS Pin # 1, 4 2 3 5 6, 7, 8 Name VS HVC SENSE VDD VD Description MOSFET source. VS is also used as a reference for VDD. HV linear regulator input. MOSFET drain voltage sensing. Linear regulator output. VDD is the power supply of IC. MOSFET drain. θJA θJC ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance (5) VDD to VS ....................................-0.3V to +14V VD to VS .....................................-1.5V to +100V SENSE, HVC to VS .......................-1V to +180V Continuous drain current (TC = 25°C) ....... 14.1A Continuous drain current (TC = 100°C) ....... 8.9A Pulsed drain current (2) ................................. 50A Maximum power dissipation (3) ................... 1.8W Junction temperature ................................150°C Lead temperature (solder) ........................260°C Storage temperature ............... -55°C to +150°C SOIC-8 .................................... 67 ...... 30... °C/W Notes: 1) 2) 3) ESD Rating Charged device model (CDM) ............... ±2000V 4) Recommended Operation Conditions 5) (4) Exceeding these ratings may damage the device. Repetitive rating: Pulse width = 100µs, duty cycle limited by maximum junction temperature. TA = 25°C. The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-to-ambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX) - TA) / θJA. Exceeding the maximum allowable power dissipation produces an excessive die temperature, causing the regulator to go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. The device is not guaranteed to function outside of its operating conditions. Measured on JESD51-7, 4-layer PCB. VDD to VS ....................................... 4.5V to 13V Operating junction temp (TJ) .... -40°C to +125°C MP6973 Rev. 1.0 6/17/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 3 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER ELECTRICAL CHARACTERISTICS VDD = VDD_HVC, TJ = -40°C to +125°C, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Units VDD_SEN SENSE = 30V, HVC = 0V 4.6 5 5.4 V VDD_HVC SENSE = 0V, HVC = 12V 6.3 6.7 7 V 4.0 0.1 4.2 0.24 4.4 0.38 V V 20 38 55 mA 20 38 62 mA 35 64 95 mA 1.6 2.4 110 4 135 mA µA 25 40 55 mV -115 -80 -57 mV VDD regulation voltage VDD UVLO rising VDD UVLO hysteresis IVDD_SEN VDD charging current IVDD_HVC Operating current Quiescent current Control Circuitry Section Forward regulation voltage (VS-VD) (6) Turn-on threshold (VDS) ICC IQ(VDD) VDD = VDD_SEN - 0.1V, SENSE = 30V, HVC = 0V, CDD = 1µF VDD = VDD_HVC - 0.1V, SENSE = 0V, HVC = 12V, CDD = 1µF VDD = VDD_HVC - 0.1V, SENSE = 0V, HVC = 30V, CDD = 1µF fSW = 100kHz VDD = 7V VFWD Turn-off threshold (VS-VD) (6) Turn-on delay (7) Turn-off delay (6) Turn-on blanking time Turn-off blanking threshold (VDS) Turn-off threshold during minimum on time (VDS) Turn-on slew rate detection time (7) Power Switch Section (8) Drain source breakdown voltage (6) Single-pulse avalanche energy (6) Drain-source on resistance Input capacitance (7) Output capacitance (7) Reverse transfer capacitance (7) MP6973 Rev. 1.0 6/17/2020 -6 3 +12 mV tD_ON tD_OFF tB-ON 0.8 20 25 1.2 1.55 ns ns µs VB-OFF 2 2.5 3 V 1.2 1.8 2.5 V 30 V(BR)DSS EAS RDS(ON) CISS COSS CRSS ns 100 VPS = 50V, VGS = 0V, L = 1.0mH ID = 2A, VGS = 6.7V VDS = 40V, VGS = 0V, f = 1MHz V 100 14 1925 307 20 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. mJ 17.5 mΩ pF pF pF 4 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER ELECTRICAL CHARACTERISTICS (continued) VDD = VDD_HVC, TJ = -40°C to +125°C, unless otherwise noted. Parameter Symbol Source-Drain Diode Characteristics Source-drain diode forward VSD voltage Reverse recovery time (7) tRR Diode reverse change (7) QRR Conditions Min Typ Max Units IS = 8A, VGS = 0V 0.8 1.2 V IF = 10A, dl/dt = 100A/μs 78 105 ns nC Notes: 6) Guaranteed by characterization. 7) Guaranteed by design. 8) TJ = 25°C. MP6973 Rev. 1.0 6/17/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 5 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER TYPICAL CHARACTERISTICS VDD Rising vs. Temperature 117 4.30 116 115 VDD_RISING (V) BREAKDOWN VOLTAGE (V) VD-VS Breakdown Voltage vs. Temperature 114 113 112 111 4.25 4.20 4.15 110 109 4.10 -50 0 50 100 TEMPERATURE (℃) 150 -50 6.70 5.00 6.68 4.98 6.66 6.64 4.96 4.94 4.92 6.62 6.60 4.90 -50 0 50 100 TEMPERATURE (℃) -50 150 Operation Current vs. Temperature (VDD = 6.7V) 2.50 45 2.45 40 2.40 2.35 2.30 2.25 0 50 100 TEMPERATURE (℃) 150 VDD Charging Current vs. Temperature (SENSE = 30V) IVDD_SENSE (mA) OPERATION CURRENT (mA) 150 VDD Regulation Voltage vs. Temperature (SENSE = 30V) VDD_SENSE (V) VDD_HVC (V) VDD Regulation Voltage vs. Temperature (HVC = 12V) 0 50 100 TEMPERATURE (℃) 35 30 25 20 15 10 2.20 -50 MP6973 Rev. 1.0 6/17/2020 0 50 100 TEMPERATURE (℃) 150 -50 0 50 100 TEMPERATURE (℃) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 150 6 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER TYPICAL CHARACTERISTICS (continued) VDD Charging Current vs. Temperature (HVC = 12V) Quiescent Current vs. Temperature (VDD = 7V) 110 50 108 40 35 IQ (μA) IVDD_HVC (mA) 45 30 25 20 106 104 102 15 100 10 -50 0 50 100 TEMPERATURE (℃) 150 -50 0 50 100 TEMPERATURE (℃) 150 RDS(ON), NORMALIZED DRAIN-SOURCE ON RESISTANCE RDS(ON) vs. Temperature 1.60 1.40 1.20 1.00 0.80 0.60 0.40 0.20 -50 MP6973 Rev. 1.0 6/17/2020 0 50 100 TEMPERATURE (℃) 150 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 7 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER TYPICAL PERFORMANCE CHARACTERISTICS Operation in 36W Flyback Application Operation in 36W Flyback Application VIN = 90VAC, IOUT = 3.0A VIN = 265VAC, IOUT = 3.0A CH1: VDS CH1: VDS CH4: ISD CH4: ISD MP6973 Rev. 1.0 6/17/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 8 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER FUNCTIONAL BLOCK DIAGRAM VD VDD Power Management IC On/Off HVC VDD SENSE Gate On/Off Gate Regulation Control Circuit Driver VS Figure 1: Functional Block Diagram MP6973 Rev. 1.0 6/17/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 9 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER OPERATION The MP6973 supports operation in discontinuous conduction mode (DCM) and continuous conduction mode (CCM), as well as quasi-resonant (QR) flyback converters. The control circuitry controls the gate in forward mode and turns the gate off when the synchronous rectification (SR) MOSFET current drops to zero. VDD Generation The external capacitor at VDD supplies power for the IC. First, SENSE charges the capacitor via a current source with IVDD_SEN. When UVLO < VDD < VDD_SENSE (5V), both HVC and SENSE are allowed to charge VDD. But when VDD exceeds VDD_SENSE, HVC charges VDD alone via a current source with IVDD_HVC. If VHVC < 5.7V, then VDD is regulated at VDD_SENSE (5V). When 5.7V < VHVC < 6.7V, VDD is regulated at VHVC - 0.7V (internal current-dependent forward-diode voltage drop). When VHVC > 6.7V, VDD is clamped at VDD_HVC (6.7V). Start-Up and Under-Voltage Lockout (UVLO) When VDD exceeds the VDD UVLO rising threshold (4.2V), the MP6973 exits undervoltage lockout (UVLO) and is enabled. Once VDD drops below ~4.0V, the MP6973 enters sleep mode and VGS is kept low. Turn-On Phase When VDS drops to ~2V, a turn-on timer begins. If VDS reaches the turn-on threshold (-80mV) from 2V within the turn-on slew rate detection time (30ns), the MOSFET turns on after a turnon delay (tD_ON), typically 20ns (see Figure 2). If VDS crosses the turn-on threshold after the timer ends, the gate voltage remains off. This turn-on timer prevents the MP6973 from falsely turning on due to the ringing in DCM and quasi-resonant operations. Turn-On Blanking The control circuitry contains a blanking function. When the MOSFET turns on, the control circuit ensures that the on state lasts for a specific period of time. The turn-on blanking time (tB-ON) is ~1.2µs to prevent an accidental turn-off due to ringing. However, if VDS reaches 1.8V within the turn-on blanking time, VGS is pulled low immediately. MP6973 Rev. 1.0 6/17/2020 Conduction Phase Once VDS exceeds the forward voltage drop, which is -VFWD (-40mV), according to the decrease of the switching current, the MP6973 lowers the gate voltage level to enlarge the on resistance of the synchronous MOSFET. VDS 2V -3mV -40mV -80mV Driver Begins to be Pulled Down VGS Driver Turns Off 2V Turn-On Delay Turn-On Blanking Turn-Off Turn-Off Delay Blanking Figure 2: Turn-On/Turn-Off Timing Diagram With this control scheme, VDS is adjusted to be approximately equal to VFWD, even when the current through the MOSFET is fairly low. This function keeps the driver voltage at a very low level when the synchronous MOSFET is turned off, which boosts the turn-off speed and is especially important for CCM operation. Turn-Off Phase When VDS rises to trigger the turn-off threshold (3mV), the gate voltage is pulled to zero after a short turn-off delay (tD_OFF), typically 25ns (see Figure 2). Turn-Off Blanking After the gate driver (VGS) is pulled to zero by VDS reaching the turn-off threshold (-3mV), a turn-off blanking time is applied, during which the gate driver signal is latched off. The turn-off blanking is removed when VDS exceeds VB-OFF (2V) (see Figure 2). www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 10 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER APPLICATION INFORMATION Slew Rate Detection During DCM operation, the demagnetizing ringing may bring VDS below 0V. If VDS reaches the turn-on threshold during the ringing period, SR controllers without slew rate detection may turn on the MOSFET by mistake. This not only increases power loss, but may also lead to shoot-through if the primary-side MOSFET is turned on within the minimum on time of the SR controller. The falling slew rate of the ringing is always much less than when the primary MOSFET is turned off; this false turn-on situation can be prevented by the slew rate detection function. When the slew rate is less than the threshold, the IC does not turn on the gate even when VDS reaches the turn-on threshold. For more details, see the Turn-On Phase section on page 10. External Resistor on SENSE and HVC Over-voltage conditions may lead to the device malfunctioning or even being damaged, so the application design must be careful to guarantee safe operation, especially on the high-voltage pin. One common over-voltage condition occurs when the body diode of the SR MOSFET is turned on, as the forward voltage drop may exceed the negative rating on the SENSE pin. In this case, it is recommended to place an external resistor between SENSE and the MOSFET drain. The resistance is typically recommended to be between 100Ω and 300Ω. On the other hand, this resistor also cannot be too large, because it may slow down the slew rate on VDS detection. In general, it is not recommended to use a resistor greater than 300Ω, but this should be checked for each case based on the condition of the slew rate. In the applications where HVC may also suffer from negative voltage bias (e.g. in the high side setup without auxiliary winding), there should be also the same resistance be placed on HVC externally. Typical System Implementations Figure 3 shows the typical system IC implementation in low-side rectification. The MP6973 is directly supplied by the output. MP6973 Rev. 1.0 6/17/2020 VOUT+ HVC VDD SENSE VOUTVS VD MP6973 Figure 3: Low-Side Rectification Maximum Output Current The allowed temperature rise of the MP6973 limits the maximum output current the device can handle. The temperature rise is determined by its own power loss. Generally, the MP6973’s recommended rated output current for a universal input adapter is 3A. For certain designs, the power loss of the MP6973 can be calculated, so the maximum output current can be deduced. The MP6973’s power loss can be separated into several parts, including controller consumption and integrated MOSFET conduction loss. If the MP6973 works in continuous conduction mode (CCM), reverse-recovery loss of the integrated MOSFET must also be considered. Each part of the loss can be calculated based on Equation (1), Equation (2), and Equation (3), respectively: PLOSS_CONTROLLER  VHVC  IDD (1) tS_ON PLOSS _ SR _ CONDUCTION  fSW   VSR _ SD (t)  ISR _ SD (t)dt (2) 0 PLOSS _ SR _ RR  1  VDS  IRR  tRR  fSW 2 (3) Where IDD is the current of the MP6973, VHVC is the voltage on HVC pin, tS_ON is the SR on period, VSR_SD is the voltage drop from the SR, ISR_SD is the current flowing through the SR, IRR is the peak reverse current, and tRR is the reverserecovery time. The total loss of the MP6973 (PLOSS) is the sum of the above losses. If an RC snubber is used, the power loss caused by this snubber must also be taken into consideration. The junction and case temperature rises can be calculated with the junction-to-ambient thermal resistance (θJA) and junction-to-case thermal resistance (θJC). The junction temperature must be within ABS (typically 150°C). Calculate ∆TJA and ∆TJC with Equation (4) and Equation (5): www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 11 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER TJA  PLOSS  JA (4) TJC  PLOSS  JC (5) The thermal resistance can be reduced by laying a thicker copper layer, placing more thermal dissipation vias, and adopting a heatsink. The real maximum output current can be set by combining the real tested data. Design Example Figure 4 shows a layout example for a low-side application of a flyback power supply, specifically a single layer with a through-hole transformer. RSN and CSN are the RC snubber network for the internal MOSFET. The sensing loop (SENSE to the MOSFET drain) is optimized and kept separate from the power loop. The VDD decoupling capacitor (C2) is placed beside VDD. PCB Layout Guidelines Efficient PCB layout is critical for stable operation. For best results, refer to Figure 4 and Figure 5, and follow the guidelines below: Sensing for VD/SENSE 1. Connect the SENSE pin to a different position for an adjustable turn-off time during the fast transients in CCM. The further the junction point is from the VD, the earlier the SR turns off (see Figure 5). 2. Keep the IC out of the power loop to prevent the sensing loop and power loop from interrupting each other. VD Sense Position SENSE VS VDD Decoupling Capacitor Figure 5: Voltage Sensing for VD/SENSE 3. Place a decoupling ceramic capacitor from VDD to VS, close to the IC, for adequate filtering. Figure 4: Layout Example in Flyback Low-Side Application MP6973 Rev. 1.0 6/17/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 12 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER PACKAGE INFORMATION SOIC-8 0.189(4.80) 0.197(5.00) 8 0.050(1.27) 0.024(0.61) 5 0.063(1.60) 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.213(5.40) 4 TOP VIEW RECOMMENDED LAND PATTERN 0.053(1.35) 0.069(1.75) SEATING PLANE 0.004(0.10) 0.010(0.25) 0.013(0.33) 0.020(0.51) SEE DETAIL "A" 0.050(1.27) BSC SIDE VIEW FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0o-8o DETAIL "A" MP6973 Rev. 1.0 6/17/2020 NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA. 6) DRAWING IS NOT TO SCALE. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 13 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER CARRIER INFORMATION Part Number Package Description Quantity/ Reel Quantity/Tube Quantity/Tray Reel Diameter MP6973GS–Z SOIC-8 2500 100 N/A 13in MP6973 Rev. 1.0 6/17/2020 Carrier Tape Width 12mm www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. Carrier Tape Pitch 8mm 14 MP6973 – FAST TURN-OFF INTELLIGENT RECTIFIER Revision History Revision # 1.0 Revision Date 6/17/2020 Description Initial Release Pages Updated - Notice: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP6973 Rev. 1.0 6/17/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 15
MP6973GS-P 价格&库存

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MP6973GS-P
  •  国内价格 香港价格
  • 500+13.98887500+1.74892

库存:485

MP6973GS-P
  •  国内价格 香港价格
  • 1+29.980151+3.74818
  • 10+25.1465910+3.14388
  • 100+20.34526100+2.54361

库存:485