MP7722
2 x 20W Class D Stereo
Single Ended Audio Amplifer
The Future of Analog IC Technology
DESCRIPTION
FEATURES
The MP7722 is a stereo 2 x 20W Class D Audio
Amplifier. It is one of MPS’ second generation
fully integrated audio amplifiers which
dramatically reduces solution size by integrating
the following:
180mΩ power MOSFETs
Startup / Shutdown pop elimination
Short circuit protection
Mute / Standby
•
•
•
•
•
•
•
The MP7722 utilizes a single ended output
structure capable of delivering 2 x 20W into 4Ω
speakers. MPS Class D Audio Amplifiers exhibit
the high fidelity of a Class A/B amplifier at
efficiencies greater than 90%. The circuit is
based on the MPS’ proprietary variable
frequency topology that delivers low distortion,
fast response time and operates on a single
power supply.
•
•
•
•
2 x 20W Output at VDD = 24V into a 4Ω load
THD+N = 0.06% at 1W, 8Ω
93% Efficiency at 20W
Low Noise (190µV Typical)
Switching Frequency Up to 1MHz
9.5V to 24V Operation from a Single Supply
Integrated Startup and Shutdown Pop
Elimination Circuit
Thermal and Short Circuit Protection
Integrated 180mΩ Switches
Mute/Standby Modes (Sleep)
Thermally Enhanced 20-Pin TSSOP
Package with Exposed Pad
APPLICATIONS
•
•
•
•
•
Surround Sound DVD Systems
Televisions
Flat Panel Monitors
Multimedia Computers
Home Stereo Systems
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
AAM (Analog Adaptive Modulation) is a Trademark of Monolithic Power
Systems, Inc.
TYPICAL APPLICATION
VDD
THD+N vs Output Power
24V, f = 1KHz
REF1
BS1
3
CH1
INPUT
10
17
IN1
SW1
19
MP7722
8
7
CH2
INPUT
6
EN
10
4
9
MP7722 Rev. 1.5
1/22/2010
REF2
IN2
EN1
CH1
OUTPUT
BS2
12
SW2 14
18
VDD1
PGND1
20
VDD
THD+N (%)
2
1
0.1
CH2
OUTPUT
EN2
AGND1
VDD2
AGND2
PGND2
13
15
0.01
0.1
1
10
OUTPUT POWER (W)
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1
MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
ABSOLUTE MAXIMUM RATINGS (1)
PACKAGE REFERENCE
TOP VIEW
NC
1
20
PGND1
REF1
2
19
SW1
IN1
3
18
VDD1
AGND1
4
17
BS1
NC
5
16
NC
EN1
6
15
PGND2
IN2
7
14
SW2
REF2
8
13
VDD2
AGND2
9
12
BS2
EN2
10
11
NC
Recommended Operating Conditions
(2)
Supply Voltage VDD .......................... 9.5V to 24V
Operating Temperature TA.........–40°C to +85°C
Thermal Resistance
(3)
θJA
θJC
TSSOP20F ............................. 40 ....... 6.... °C/W
EXPOSED PAD
(CONNECT TO PGND)
*
Supply Voltage VDD ...................................... 26V
BS Voltage.................. VSW – 0.3V to VSW + 6.5V
Enable Voltage VEN ........................ –0.3V to +6V
VSW, VPIN, VNIN ........................... –1V to VDD + 1V
AGND to PGND .......................... –0.3V to +0.3V
Junction Temperature............................... 150°C
Lead Temperature ....................................260°C
Storage Temperature ..............–65°C to +150°C
Part Number*
Package
Temperature
MP7722DF
TSSOP20F
–40°C to +85°C
Notes:
1) Exceeding these ratings may damage the device.
2) The device is not guaranteed to function outside of its
operating conditions.
3) Measured on approximately 1” square of 1 oz copper.
For Tape & Reel, add suffix –Z (eg. MP7722DF–Z)
For Lead Free, add suffix –LF (eg. MP7722DF–LF–Z)
ELECTRICAL CHARACTERISTICS
VDD = 24V, VEN = 5V, TA = +25°C, unless otherwise noted.
Parameters
Symbol Condition
Supply Current
Standby Current
Quiescent Current
Output Drivers
SW On Resistance
Short Circuit Current
Inputs
REF1/2, IN1/2 Input Common
Mode Voltage Range
REF1/2, IN1/2 Input Current
EN Enable Threshold Voltage
EN Enable Input Current
Thermal Shutdown
Thermal Shutdown Trip Point
VEN = 0V
Sourcing and Sinking
Sourcing and Sinking
VPIN = VNIN = 12V
VEN Rising
VEN Falling
VEN = 5V
TJ Rising
MP7722 Rev. 1.5
1/22/2010
VEN = 0V
Typ
Max
Units
2
3
10
6
µA
mA
0.18
5.0
0
Thermal Shutdown Hysteresis
Standby Current
Quiescent Current
Min
0.4
VDD
2
1
1.4
1.2
1
Ω
A
VDD – 1.5
V
5
2.0
µA
V
V
µA
150
°C
30
°C
µA
mA
260
23
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2
MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
OPERATING SPECIFICATIONS
Circuit of Figure 1, VDD = 24V, VEN = 5V, TA = +25°C, unless otherwise noted.
Parameters
Symbol Condition
f = 1KHz, THD+N = 10%,
4Ω Load
f = 1KHz, THD+N = 10%,
8Ω Load
POUT = 1W, f = 1KHz, 4Ω
Load
POUT = 1W, f = 1KHz, 8Ω
Load
f = 1KHz, POUT = 1W, 4Ω
Load
f = 1KHz, POUT = 1W, 8Ω
Load
Power Output
THD+ Noise
Efficiency
Maximum Power Bandwidth
Dynamic Range
Noise Floor
Power Supply Rejection
Min
A-Weighted
f = 1KHz
Typ
Max
Units
20
W
10
W
0.16
%
0.06
%
90
%
95
%
20
93
190
60
KHz
dB
µV
dB
PIN FUNCTIONS
Pin #
Name
1, 5, 11,
16
NC
2
REF1
3
IN1
4
Description
No Connect. Not internally connected
Amplifier 1 Reference. REF1 is the reference point for amplifier 1. Use a resistive voltage
divider to set the voltage at REF1 to VDD/2.
Amplifier 1 Input. IN1 is the inverting input for amplifier 1.
AGND1 Analog Ground 1. Connect AGND1 to AGND2.
6
EN1
Enable Input 1. EN1 must be connected to EN2. Drive EN1 high to enable MP7722; low to
disable it.
7
IN2
Amplifier 2 Input. IN2 is the inverting input for amplifier 2.
8
REF2
9
Amplifier 2 Reference. REF2 is the reference point for amplifier 2. Use a resistive voltage
divider to set the voltage at REF1 to VDD/2.
AGND2 Analog Ground 2. Connect AGND2 to AGND1.
10
EN2
Enable Input 2. EN2 must be connected to EN1. Drive high to enable MP7722, drive low to
disable.
12
BS2
High-Side MOSFET Bootstrap Input for Amplifier 2. A capacitor from BS2 to SW2 supplies
the gate drive current to the internal high-side MOSFET. Connect a 1µF capacitor from
SW2 to BS2.
13
VDD2
Power Supply Input. Bypass VDD2 to PGND2 with a 1µF X7R capacitor (in addition to the
main bulk capacitor), placed close to the IC PIN13 and PIN15.
14
SW2
Switched Power Output. SW2 is the output of Amplifier 2. Connect the LC filter to this pin.
15
PGND2 Power Ground for Amplifier 2. Connect PGND2 to PGND1.
MP7722 Rev. 1.5
1/22/2010
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MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
PIN FUNCTIONS (continued)
Pin #
Name
17
BS1
High-Side MOSFET Bootstrap Input for Amplifier 1. A capacitor from BS1 to SW1 supplies
the gate drive current to the internal high-side MOSFET. Connect a 1µF capacitor from
SW1 to BS1. See Figure 1.
18
VDD1
Power Supply Input. Bypass VDD1 to PGND1 with a 1µF X7R capacitor (in addition to the
main bulk capacitor), placed close to the IC PIN18 and PIN20.
19
SW1
Switched Power Output. SW1 is the output of Amplifier 1. Connect the LC filter to this pin.
See Figure 1.
20
Description
PGND1 Power Ground for Amplifier 1. Connect PGND1 to PGND2. See Figure 1.
TYPICAL PERFORMANCE CHARACTERISTICS
20
10
1
THD+N (%)
THD+N (%)
20
10
f=10KHz
f=1KHz
0.1
f=10KHz
1
f=1KHz
0.1
f=100Hz
f=100Hz
0.01
0.1
1
POUT (W)
0.01
10
10
10
THD+N (%)
100
THD+N (%)
100
1
MP7722 Rev. 1.5
1/22/2010
1
POUT (W)
10
1
0.1
0.1
0.01
0.1
20
100
1K
FREQUENCY (Hz)
10K
0.01
20
100
1K
FREQUENCY (Hz)
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10K
4
MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
0
0
-10
-30
-20
-30
-40
AMPLITUDE (dBr)
AMPLITUDE (dBV)
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
-60
-90
-80
-90
-100
-120
-150
20
100
1K
FREQUENCY (Hz)
10K
100
+0
AMPLITUDE (dBr)
AMPLITUDE (dB)
+2
-40
-60
-80
100
1K
10K
FREQUENCY (Hz)
+4
-20
-100
-50
-60
-70
0
-2
-4
-6
-8
20
100
1K
FREQUENCY (Hz)
-10
10K
Efficiency vs
POUT
25
20
100
1K
10K
FREQUENCY (Hz)
40K
POUT vs
VDD
90
20
70
POUT (W)
EFFICIENCY (%)
80
60
50
40
15
10
30
20
5
10
0
MP7722 Rev. 1.5
1/22/2010
0
5
10
15
20
25
OUTPUT POWER (W)
30
0
5
10
15
20
25
VDD (V)
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35
5
MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
OPERATION
The MP7722 uses Monolithic Power Systems’
patented Analog Adaptive ModulationTM to
convert the audio input signal into pulses of
power that, when filtered through an external
inductor-capacitor filter, reproduce the amplified
signal across the load. Because of the
switching Class D output stage, power
dissipation in the amplifier is drastically reduced
when compared to Class A, B or A/B amplifiers
while providing high fidelity and low distortion.
The voltage gain is set by the combination of
the input resistor RIN and the feedback resistor
RFB and is calculated by the equation:
AV =
−R FB
R IN
Where for Channel 1: RFB=RFB1 and RIN=RIN1
and for Channel 2: RFB=RFB2 and RIN=RIN2.
The MP7722 includes four high-power
MOSFETS wherein for each channel the output
driver stage uses two 180mΩ N-Channel
MOSFETs to deliver the pulses to the LC output
filter that in turn drives the load. To fully
enhance the high-side MOSFET, the gate is
driven to a voltage higher than VDD by the
bootstrap capacitor between SW and BS. While
the output is driven low, the bootstrap capacitor
is charged from VDD. The gate of the high-side
MOSFET is driven high from the voltage at BS,
forcing the MOSFET gate to a voltage higher
than VDD and allowing the MOSFET to fully turn
on, reducing power loss in the amplifier.
MP7722 Rev. 1.5
1/22/2010
Pop Elimination
The capacitors COUT1 and COUT2 block the DC
signal and pass only the AC signals to the load.
To insure that the amplifier passes low
frequency signals, the capacitor values need to
be chosen such that the time constant of COUT x
RLOAD is long. During startup, these capacitors
need to be charged up to the DC operating
point, which is typically at ½ of VDD. The
MP7722 includes special integrated circuitry
that carefully controls the pre-charging of these
capacitors, eliminating the turn-on and turn-off
pop normally associated with the charging of
the AC coupling capacitors.
Short Circuit/Overload Protection
The MP7722 has internal overload and short
circuit protection. The currents in both the
high-side and low-side MOSFETs are
measured and if the current exceeds the 5.0A
short circuit current limit, both MOSFETs are
turned off. The MP7722 then restarts with the
same power up sequence that is used for
normal starting to prevent a pop from occurring
after a short circuit condition is removed.
Mute/Enable Function
The MP7722 EN inputs are active high enable
controls. To enable the MP7722, drive EN with
a 2.0V or higher voltage. To disable the
amplifier, drive EN below 0.4V. While the
MP7722 is disabled, the VDD operating current
is less than 10µA and the output driver
MOSFETs are turned off. The MP7722 requires
approximately 500ms from the time that EN is
asserted (driven high) to when the amplifier
begins normal operation.
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MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
APPLICATION INFORMATION
COMPONENT SELECTION
The MP7722 uses a minimum number of
external components to complete a stereo
Class D audio amplifier. The circuit of Figure 1
is optimized for a 24V power supply and a 1.5V
RMS maximum input signal. This circuit should
be suitable for most applications. However, if
this circuit is not suitable, use the following
sections to determine how to customize the
amplifier for a particular application.
Setting the Voltage Gain
The maximum output voltage swing is limited by
the power supply. To achieve the maximum
power out of the MP7722 amplifier, the gain
resistors should be set such that the maximum
input signal results in an output voltage swing
that reaches the supply limit (clipping). The
maximum output voltage swing at clipping is
approximately ±VDD/2. To achieve clipping for a
given input signal voltage, where VIN(pk) is the
peak input voltage, the voltage gain is:
A V (MAX) =
VDD
2 × VIN (pk )
The voltage gain setting results in the peak
output voltage approaching its maximum for the
maximum input signal. There are applications
where it is desirable to allow the amplifier to
overdrive slightly, allowing the THD to increase
at higher power levels (as the output signal
continues to go further into clipping), and so a
higher gain than AV (max) is required.
Setting the Switching Frequency
The idle switching frequency (the switching
frequency when no audio input is present) is a
function of several variables: the supply voltage
VDD, the timing capacitor CINT and the feedback
resistor RFB. For the MP7722, the idle switching
frequencies for CH1 and CH2 are independent
of each other and are a function of their own
associated components. The proper setting of
the “idle frequency” is important for obtaining
optimum performance. If the frequency is set
too high, the result will be more power loss and
high distortion, while setting the idle switching
frequency too low results in more inductor ripple,
causing more output voltage ripple with
increased the output noise.
MP7722 Rev. 1.5
1/22/2010
The optimum quiescent switching frequency is
approximately 700KHz to 800KHz. Refer to
Table 1 for recommended values.
Table 1—Switching Frequency vs. VDD, Timing
Capacitor and Feedback Resistor (see Figure 1)
Gain
(V/V)
Gain
(dB)
RFB
(kΩ)
RIN
(kΩ)
CINT
FSW
VDD
(V)
3.9
11.8
39
10
6.8nF
660KHz
12
8.2
18.3
82
10
3.3nF
660KHz
12
8.3
18.4
39
4.7
6.8nF
660KHz
12
17.4
24.8
82
4.7
3.3nF
660KHz
12
5.6
15.0
56
10
8.2nF
670KHz
24
8.2
18.3
82
10
5.6nF
720KHz
24
11.9
21.5
56
4.7
8.2nF
670KHz
24
17.4
24.8
82
4.7
5.6nF
720KHz
24
33.0
30.4
330
10
1.8nF
700KHz
24
Choosing the LC Filter
The Inductor-Capacitor (LC) filter converts the
pulse train at SW to the output voltage that
drives the speaker. Typical values for the LC
filter are a 10µH inductor and a 0.47µF
capacitor.
The characteristic frequency of the LC filter
needs to be high enough to allow high
frequency audio to the output, yet needs to be
low enough to filter out high frequency products
of the pulses from SW. The characteristic
frequency of the LC filter is:
f0 =
1
2π LC
The voltage ripple at the output is approximated
by the equation:
⎛ f
VRIPPLE ≅ VDD × ⎜⎜ 0
⎝ f SW
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⎞
⎟
⎟
⎠
7
MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
The quality factor (Q) of the LC filter is important.
If this is too low output noise will increase, and if
this is too high then peaking may occur at high
signal frequencies reducing the passband
flatness. The circuit Q is set by the load
resistance (speaker resistance, typically 4Ω or
8Ω) and is calculated as:
Q = ω0 ×
L
L
= 2π × f 0 ×
R
R
Where ω0 is the characteristic frequency in
radians per second and f0 is in Hz. Use a LC
filter with Q between 0.7 and 2.
The actual output ripple and noise is greatly
affected by the type of inductor and capacitor
used in the LC filter. Use a film capacitor and an
inductor with sufficient power handling capability
to supply the output current to the load. The
inductor
should
exhibit
soft
saturation
characteristics. If the inductor exhibits hard
saturation, it should operate well below the
saturation current. Gapped ferrite, MPP,
Powdered Iron or similar type toroidal cores are
recommended. If open or shielded bobbin ferrite
cores are used for multi-channel designs, make
sure that the start windings of each inductor line
up (all starts going toward SW pin or all starts
going toward the output) to prevent crosstalk or
other channel-to-channel interference.
Output Coupling Capacitors
The output AC coupling capacitors COUT1 and
COUT2 serve to block DC voltages and thus pass
only the amplified AC signal from the LC filter to
the load. The combination of the coupling
capacitor and the load resistance results in a
first-order high-pass filter. The values of COUT1
and COUT2 should be selected such that the
required minimum frequency is still allowed to
pass. The output corner frequency (-3dB point),
fOUT, can be calculated as:
f OUT =
Input Coupling Capacitors
The input coupling capacitors CIN1 and CIN2 are
used to pass only the AC signal at the input. In
a typical system application, the source input
signal is typically centered around the circuit
ground, while the MP7722 input is at half the
power supply voltage (VDD/2). The input
coupling capacitors transmit the AC signal from
the source to the MP7722 while blocking the
DC voltage. Choose the input coupling
capacitors such that the corner frequency (fIN) is
less than the passband frequency. The corner
frequency is calculated as:
fIN =
1
2 × π × R IN × C IN
Power Source
For maximum output power, the amplifier circuit
requires a regulated external power source to
supply the power to the amplifier. A higher
power supply voltage allows more power to be
delivered to a given load resistance. However if
the power source voltage exceeds the
maximum operating voltage of 24V, the
MP7722 may sustain permanent damage. It is
very important to bypass the power supply pins
with 1µF X7R ceramic capacitors.
Power Supply Pumping
It is also very important to bypass the power
supply with a large aluminum electrolytic
capacitor. It is recommended to use a value of
at least 2200µF. This is necessary to prevent
the supply voltage from getting pumped up to a
level that exceeds the absolute maximum rating.
Supply pumping occurs in single-ended Class D
amplifiers, and is caused by rapid switch
transitions where current is pumped back up
into the supply line. The large capacitor is
necessary to absorb this current and prevent
VDD from rising too high.
1
2 × π × R LOAD × C OUT
Set the output corner frequency at or below the
minimum required frequency.
The output coupling capacitor carries the full
load current, so the capacitor should be chosen
such that its ripple current rating is greater than
the maximum load current. Low ESR aluminum
electrolytic capacitors are recommended.
MP7722 Rev. 1.5
1/22/2010
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MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
PCB Layout
The circuit layout is critical for optimum
performance and low output distortion and
noise. Place the following components as close
to the MP7722 as possible:
Power Supply Bypass, CBYP
CBYP1 and CBYP2 carry the transient current for
the switching power stage. To prevent
overstressing of the MP7722 and excessive
noise at the output, place CBYP1 as close to pins
18 (VDD1) and 20 (PGND1) as possible and
also place CBYP2 as close to pins 13 (VDD2) and
15 (PGND2) as possible.
Output Catch Diodes
DSH1, DSL1, DSH2 and DSL2 carry the current over
the dead-time while the MOSFET switches are
off. Place the diodes as close to the MP7722 as
possible.
Timing Capacitors
CINT1 and CINT2 are used to set the amplifier
switching frequencies and are typically on the
order of a few nF. Place CINT1 as close to pins 2
and 3 as possible to reduce distortion and noise.
Likewise, place CINT2 as close to pins 7 and 8
as possible.
Reference Bypass Capacitors
CR1 and CR2 filter the ½ VDD reference voltages.
Place CR1 and CR2 as close to the IC as
possible to improve power supply rejection and
reduce distortion and noise at the output.
When laying out the PCB, use two separate
ground planes, analog ground (AGND) and
power ground (PGND), and connect the two
grounds together at a single point to prevent
noise injection into the amplifier input to reduce
distortion.
Make sure that any traces carrying the switch
node (SW) voltages are separated far from any
input signal traces. If it is required to run the
SW trace near the input, shield the input with a
ground plane between the traces. For multiple
channel applications, make sure that each
channel is physically separated to prevent
crosstalk. Make sure that all inductors used on
a single circuit board have the same orientation.
MP7722 Rev. 1.5
1/22/2010
Also, make sure that the power supply is routed
from the source to each channel individually,
not serially. This prevents channel-to-channel
coupling through the power supply input.
High VDD Operation
When operating at higher supply voltages,
special care must be taken to ensure that the
VDD level does not exceed the absolute
maximum supply rating of the IC. Power supply
pumping is of significant concern when operating
near the maximum supply voltage. Supply
pumping is an effect where the VDD voltage is
“pumped up” to a higher potential when charge
from the output DC blocking capacitor is
transferred to the power supply rail during switch
transitions. The simplest way to handle excess
pumping is to increase the size of the VDD main
bulk capacitance such that the extra charge will
be absorbed by the increased capacitance, with
minimal supply increase. One way to eliminate
supply pumping altogether is to use a different
output configuration circuit. Figure 2 shows such
an alternate configuration for connecting the
speaker load. With this configuration, one side of
the speaker load is connected directly to the
output of the LC filter, while the other side is
connected to the mid-point of a series capacitordivider (C26, C28). Both the LC filter point and
the mid point of the capacitor divider will be at a
DC bias level of ½ VDD, so the net DC across the
speaker is 0VDC. With the speaker connected in
this fashion, there is no series capacitor to cause
supply pumping, and supply pumping is virtually
eliminated. If the output is connected in this way,
however, additional circuitry may be required to
protect the speaker from damage in the event of
a short circuit. Because both sides of the
speaker will be typically biased at ½ VDD, a shortcircuit to GND on the negative side of the
speaker load will result in a large DC current
through the load. For example, if VDD=24V and
RL=4Ω, there will be 12/4=3A of DC current
through the load. This current will be sustained
by the output FET stage of the IC as it will not
trigger the internal over-current protection sense
circuitry. A simple external sense circuit will be
required for those applications which may
experience an externally applied short circuit
under normal use. An example of such a circuit
is also shown in Figure 2.
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9
MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
Electro-Magnetic Interference (EMI)
Considerations
Due to the switching nature of the Class D
amplifier, care must be taken to minimize the
effects of electromagnetic interference from the
amplifier. However, with proper component
selection and careful attention to circuit layout,
the effects of the EMI due to the amplifier
switching can be minimized.
The power inductors are a potential source of
radiated emissions. For the best EMI
performance use toroidal inductors, since the
magnetic field is well contained inside the core.
However toroidal inductors can be expensive to
wind. For a more economical solution, use
shielded gapped ferrite or shielded ferrite
MP7722 Rev. 1.5
1/22/2010
bobbin core inductors. These inductors typically
do not contain the field as well as toroidal
inductors, but usually can achieve a better
balance of good EMI performance with low cost.
The size of high-current loops that carry rapidly
changing currents needs to be minimized. To
do this, make sure that the VDD bypass
capacitors and the Schottky Catch diodes are
as close to the MP7722 as possible.
Nodes that carry rapidly changing voltages,
such as SW, need to be made as small as
possible. If sensitive traces run near a trace
connected to SW, place a ground shield
between the traces.
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© 2010 MPS. All Rights Reserved.
10
MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
TYPICAL APPLICATION CIRCUITS
CFB1
VDD
RFB1
VDD
RRH1
2
CR1
CH1
INPUT
CIN1
RRL1
CINT1
BS1
RIN1
3
CBS1
SW1
CIN2
RRL2
DBS1
REF2
BS2
12
RBS2
CBS2
7
6
10
4
9
SW1 14
18
VDD2
20
PGND2
IN2
EN1
CBYP1
EN2
AGND1
VDD2
AGND2
PGND2
DSH1
19
CINT2
RIN2
EN
VDD
MP7722
8
CR2
RBS1
17
IN1
VDD
RRH2
CH2
INPUT
DBS3
REF1
DBS4
VDD
COUT1
LF1
DSL1
CH1
OUTPUT
CF1
VDD
DBS2
VDD
CVDDBYP
DSH2
COUT2
LF2
DSL2
CH2
OUTPUT
CF2
13
15
CBYP2
RFB2
CFB2
Figure 1—2 x 20W Stereo Typical Application Circuit
OUT1
+
EN
+
Q3
2N3904
Q4
2N3904
Figure 2—Alternate Configuration for High VDD Applications
MP7722 Rev. 1.5
1/22/2010
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MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
11
MP7722 – 2 x 20W CLASS D STEREO SINGLE ENDED AUDIO AMPLIFIER
PACKAGE INFORMATION
TSSOP20F
(EXPOSED PAD)
4.40
TYP
6.40
6.60
20
0.40
TYP
11
1.60
TYP
4.30
4.50
PIN 1 ID
1
0.65
BSC
3.20
TYP
6.20
6.60
5.80
TYP
10
TOP VIEW
RECOMMENDED LAND PATTERN
0.80
1.05
1.20 MAX
SEATING PLANE
0.19
0.30
0.65 BSC
0.00
0.15
0.09
0.20
SEE DETAIL "A"
SIDE VIEW
FRONT VIEW
GAUGE PLANE
0.25 BSC
3.80
4.30
0o-8o
0.45
0.75
DETAIL A
2.60
3.10
BOTTOM VIEW
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.10 MILLIMETERS MAX.
5) DRAWING CONFORMS TO JEDEC MO-153, VARIATION ACT.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP7722 Rev. 1.5
1/22/2010
www.MonolithicPower.com
MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.
© 2010 MPS. All Rights Reserved.
12
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