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MP8005DF-LF-Z

MP8005DF-LF-Z

  • 厂商:

    MPS(美国芯源)

  • 封装:

    TSSOP20_EP

  • 描述:

    IC POE CTRLR 13W

  • 数据手册
  • 价格&库存
MP8005DF-LF-Z 数据手册
MP8005 13W 802.3af PoE Powered Device (PD) Interface and PWM Controller DESCRIPTION FEATURES The MP8005 is a complete integrated IEEE 802.3af POE compliant Powered Device (PD) power supply solution. It includes the PD control function and an isolated/non isolated synchronous regulator controller. Thermal protection is built in to accommodate both transient and/or overload conditions, shutting the part down and protecting the input source as well as the output load depending on the particular fault conditions. Inrush current limiting is included to slowly charge the input capacitor without interruption due to die heating, a problem encountered without the current limit foldback feature. The desired output voltage is user programmable through the selection of an external resistor divider. • • • EVALUATION BOARD REFERENCE Board Number EV8005DF-00A • • Meets IEEE 802.3af Specifications 100V, 1Ω Integrated switch 460mA max, Temperature Compensated Current Limit Isolated Synchronous Controller 20 pin TSSOP Package APPLICATIONS • • • • • VoIP Telephones Network Cards Security Camera Systems Safety Backup Power Remote Internet Power All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. Dimensions 5.33”x1.75”x0.8” ( LxWxH) TYPICAL ISOLATED APPLICATION MP8005 Rev. 1.0 9/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 MP8005 – IEEE 802.3af PoE POWERED DEVICE CONTROLLER ORDERING INFORMATION Part Number* Package Top Marking Temperature MP8005DF TSSOP-20-EP MP8005DF –40°C to +85°C For Tape & Reel, add suffix –Z (e.g. MP8005DF–Z). For Lead Free, add suffix –LF (e.g. MP8005DF–LF–Z) PACKAGE REFERENCE AGND VCC MAINGATE ISENSE SYNCGATE RDELAY VFB CSS COMP ENABLE ILIM VDD PG CLASS DET RTN VSS RTN NC NC ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VDD, RTN....................................–0.3V to +100V PG, DET ......................................–0.3V to +57V VCC, CLASS .................................–0.3V to +10V ILIM, CSS, ENABLE. .......................–0.3V to +5V ISENSE. ...........................................–0.3V to +28V COMP. ...........................................–0.3V to +3V FB . .............................................–0.3V to +1.3V (2) Continuous Power Dissipation (TA = +25°C) . ............................................................ 1.2W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature.............. –65°C to +150°C TSSOP-20-EP........................105 ..... 50 ... °C/W Recommended Operating Conditions (3) Supply Voltage VDD .............................0V to 57V Output Current IOUT .............................. 0 to 0.4A Junction Temperature TJ......... –40°C to +125°C MP8005 Rev. 1.0 9/26/2013 (4) θJA θJC Notes: 1) Exceeding “Absolute Maximum Ratings” may cause permanent damage to the device. Functional operation at or above these conditions is not implied Exposure to these conditions for extended periods may affect device reliability. 2) The maximum allowable power dissipation is a function of the maximum junction temperature. TJ(MAX) the junction-toambient thermal resistance. θJA and the ambient temperature, TA the maximum allowable power dissipation at any ambient temperature is calculated using: PD(MAX)=(TJ(MAX)-TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 2 MP8005 – IEEE 802.3af PoE POWERED DEVICE CONTROLLER ELECTRICAL CHARACTERISTICS VDD = 48V, all voltages with respect to VSS, VSS = 0V; RDET = 26.1kΩ, RCLASS = 4.42KΩ, RILIM = 178kΩ, TA = 25°C, unless otherwise noted. Parameters Symbol VCC Undervoltage Lockout VCC On/Off Voltage Hysteresis Shutdown Current IS Quiescent Current IQ Condition Min Internal Divider (IQ) Main Gate Driver Impedance (Sourcing) Main Gate Driver Impedance (Sinking) Synchronous Gate Driver Impedance (Sourcing) Synchronous Gate Driver Impedance (Sinking) Delay after Synchronous Gate EN/SS =0V, VIN=9V Output not switching, no load, VFB=1V, VCC=9V Units 4.5 4.7 V 1 V 50 μA 270 320 μA 16 Ω VCC=9V, IGATE=5mA 5.0 Ω VCC=9V, VSYNCGATE=5V 16 Ω VCC=9V, IGATE=5mA 5.0 Ω RDELAY=100KΩ 50 ns VFB connected to VCOMP/RUN. Force ± ± 10μA to VCOMP/RUN. Maximum comp Current Error Amplifier Translator Gain (5) Switching Frequency Sourcing and Sinking 0.26 0.38 0.46 40 mA/V μA AET 0.28 0.32 0.36 V/V fS 220 260 300 kHz Thermal Shutdown MP8005 Rev. 1.0 9/26/2013 Max VCC=9V, VGATE=5V Error Amplifier Transconductance Maximum Duty Cycle Minimum On Time ISENSE Limit FB Voltage FB Bias Current ISENSE Bias Current Enable On Threshold Enable Hystersis Soft Start Current Typ 150 76 tON VFB IFB ISENSE VEN VEN ISS 165 0.794 Current flowing out of part Current flowing out of part High-to-Low 1.15 81 200 190 0.818 50 50 1.25 50 4 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 86 215 0.847 1.35 °C % ns mV V nA nA V mA μA 3 MP8005 – IEEE 802.3af PoE POWERED DEVICE CONTROLLER ELECTRICAL CHARACTERISTICS (continued) VDD = 48V, all voltages with respect to VSS, VSS = 0V; RDET = 26.1kΩ, RCLASS = 4.42KΩ, RILIM = 178kΩ, TA = 25°C, unless otherwise noted. Parameter Detection Symbol Condition Min Typ Max Units Detection on VDET_ON VDD=VRTN=VPG=1.9V 1.9 V Detection off VDET_OFF VDD=VRTN=VPG=11V 11 V V Detection on/off Hysteresis VDET_H Falling below 11V on Threshold 0.2 DET Leakage Current VDET_LK VDET=VVDD=57V, Measure IDET VVDD=VRTN VDD= 3V RDET=26.1kΩ, Measure VDD= 10.1V IVDD+IRTN+IDET 0.1 5 μA 135 140 145 μA 405 420 435 μA 9.6 10 10.3 V 2.2. 2.4 2.8 10.3 10.6 11.3 17.7 18.3 19.5 27.1 28 29.5 38 39.4 41.2 Detection Current IDET Classification VCLASS Output Voltage VCL Classification Current Classification Lower Threshold Classification Upper Threshold ICLASS Over a Load Range of 1mA to 41.2 mA RCLASS=4420Ω, 13≤VVDD≤21V (guar by VCL) RCLASS=953Ω, 13≤VVDD≤21V (guar by VCL) RCLASS=549Ω, 13≤VVDD≤21V (guar by VCL) RCLASS=357Ω, 13≤VVDD≤21V (guar by VCL) RCLASS=255Ω, 13≤VVDD≤21V (guar by VCL) VCL_ON Regulator Turns on, VVDD Rising 10.2 11.3 13 V VCU_OFF Regulator Turns off, VVDD Rising 21 21.9 23 V VCU_H 300 ILEAKAGE Hysteresis VDD = 17.5V, CLASS Floating, RTN Tied to VSS VCLASS = 0 V, VVDD = 57V RDS(ON) IRTN=300mA Leakage Current ISW_LK VVDD=VRTN=57V Current Limit Inrush Limit Inrush Current Termination ILIMIT VRTN=1V VRTN=2V, RILM=178kΩ VRTN Falling, RIPEAK = 178kΩ, Inrush StateÆNormal Operation IC Supply Current during Classification Leakage Current Pass Device On Resistance MP8005 Rev. 1.0 9/26/2013 mA IIN_CLASS IINRUSH 0.4 V 500 μA 1 μA 1.0 1.2 Ω 1 15 μA 360 120 400 150 460 180 mA mA 85 90 100 % www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4 MP8005 – IEEE 802.3af PoE POWERED DEVICE CONTROLLER ELECTRICAL CHARACTERISTICS (continued) VDD = 48V, all voltages with respect to VSS, VSS = 0V; RDET = 26.1kΩ, RCLASS = 4.42KΩ, RILIM = 178kΩ, TA = 25°C, unless otherwise noted. Parameter Symbol Condition Min Typ Max Units 9.5 10 10.5 V PG Latchoff Voltage Threshold Rising Latchoff Voltage Threshold Falling PG Deglitch Output Low Voltage Leakage Current VRTN Rising (5) VRTN Falling 1.2 V Delay Rising and Falling PDG (5) IPG = 400 μA VPG = 57 V, VRTN = 0 V 75 150 0.12 0.1 225 0.4 1 μs V μA VVDD Rising (including 1.4V Diode drop) VVDD Falling (including 1.4V Diode drop) 38 30.2 40 31.5 42 32.8 V UVLO Voltage at VVDD Thermal Shutdown Thermal Counter Reset Voltage Bias Current Operating Current VCRST Must Drop below Classification Range 10.8 IQ (VDD) VDD = 48V, Pins 5, 6 Floating Measure IVDD 240 V 450 μA Notes: 5) Guaranteed by Design. MP8005 Rev. 1.0 9/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 5 MP8005 – IEEE 802.3af PoE POWERED DEVICE CONTROLLER PIN FUNCTIONS Pin # Name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 VCC MAINGATE SYNCGATE CSS ENABLE ILIM CLASS DET VSS 18 RDELAY 19 20 ISENSE AGND RTN RTN PG VDD COMP VFB MP8005 Rev. 1.0 9/26/2013 Description 10V Shunt Supply Voltage used for the switching regulator controller Output drive to the Main Gate Output drive to the Synchronous Gate Soft-start ramping capacitor On/Off control input to the switching regulator Startup ILIM Value Setting Resistor terminal (optional at this point). Classification Resistor terminal. 26.1kΩ Detection Resistor terminal Ground return to the Ethernet negative supply. No Connection No Connection Powered Device Negative Power Terminal. Powered Device Negative Power Terminal. Active low power good indication. Positive Power Supply Terminal for the Ethernet PD control function. Switching regulator compensation terminal. Switching regulator voltage feedback terminal. Resistor programming for setting the delay from the Sync gate going low to the Main gate going high. Main Switch current sensing terminal. Switching regulator controller ground return; Returns to the RTN pin. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 6 MP8005 – IEEE 802.3af PoE POWERED DEVICE CONTROLLER TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs. Load Current EFFICIENCY (%) 60 V DD=60V 50 40 30 20 30 -0.02 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 VDD Increasing 25 -0.04 -0.06 -0.08 V DD=60V V DD=40V -0.12 LOAD CURRENT (A) VDD Decreasing 20 15 10 5 -0.10 10 0 35 0.00 V DD=40V 80 70 VCC Regulator Line Regulation IIN (mA) 90 DIFFERENCE (%) 100 Output Voltage vs. Load Current 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0 10 20 30 40 50 60 VDD(V) LOAD CURRENT (A) Start Up Shut Down Transient Response VDD=48V, ILOAD=2.6A VDD=48V, ILOAD VDD=48V, ILOAD=2.6A, 0 to 2.6A Load Slew:1.0A/1uS VRTN 50V/div VPG 5V/div VPG 5V/div VRTN 1V/div VDD 20V/div VPG-VRTN VOUT 5V/div VOUT/AC 200mV/div IOUT 1A/div IRTN 0.5A/div IIN 0.5A/div 20ms/div 200ms/div 200us/div Output Ripple VDD=60V, ILOAD=4A VOUT/AC 200mV/div VSW 5V/div 2us/div MP8005 Rev. 1.0 9/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 7 MP8005 – IEEE 802.3af PoE POWERED DEVICE CONTROLLER BLOCK DIAGRAM MP8005 VDD PG VCC DETECTION ENABLE DET 1.2v OSCILLATOR CLASS CSS CLASSIFICATION COMP 1.2v Vfb ILIM STARTUP PWM CONTROL LOGIC DELAY RDELAY MAINGATE ISENSE CONTROL LOGIC SYNCGATE AGND VSS RTN Figure 1— Block Diagram MP8005 Rev. 1.0 9/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 8 MP8005 – IEEE 802.3af PoE POWERED DEVICE CONTROLLER OPERATION The MP8005 operates in the manner described here and in the IEEE 802.3af Powered Device (PD) Specification. This device (along with the power sourcing element (PSE)) operates as a safety device to supply potentially lethal voltages only when the power sourcing element recognizes a unique, tightly specified resistance at the end of an unknown length of Ethernet cable. A 25kΩ resistance is presented as a load to the PSE in Detection Mode, when the PSE applies two “safe” voltages of less than 10.1V each while measuring the change in current drawn in order to determine the load resistance. If the PSE “sees” the correct load, then it may either further increase the applied voltage to enter the “classification” range of operation or switch on the nominal 48V power to the load. The classification mode can further specify to the PSE the expected load range of the device under power so that the PSE can intelligently distribute power to as many loads as possible (within its maximum current capabilities). If a classification resistance is not present, the PD load is assumed to be the maximum of approximately 13 Watts. The classification mode is active between 14.5V and 20.5V. The main power switch will pass a limited current above 31V, charging the external DC-to-DC converter’s input capacitor in a controlled manner. The charging will continue until the controlled current drops below either an externally programmed limiting level or 450mA, depending upon the Rlim current setting resistor. The main power switch is internally thermally protected to 100V by reducing the output current using a foldback technique. The required power dissipation of the IC drops from the allowed peak value of 26W (450mA x 57V) to 0.16W ((450mA)2 x RON) during the normal operation at turn-on. The minimum allowed capacitance of 5µF will charge in 500µs. A larger capacitor will take a proportionally longer time to charge due to the constant current charging method. A capacitor that is too large will overheat the part and force it into thermal shutdown. The IC will reattempt charging for a number of cycles but ultimately will MP8005 Rev. 1.0 9/26/2013 be shut down until the input voltage from the PSE is recycled. This is the way the IC protects itself under overload and/or shorted conditions. Once the capacitor tied between Vdd, Ethernet input positive supply and the RTN pin is charged to within a volt of the applied Ethernet input supply potential, the PG output is driven low to enable the switching regulator controller. This delay prior to turning on the switching regulator is required in order to minimize the power dissipation incurred during the startup of the controller. The capacitance tied across the Vdd and RTN lines provide the inductor ripple current while maintaining a small voltage differential such that the average current flowing in the RTN line is under the current limit level. Without a storage capacitance at this point, instantaneous current peaks, required by the switching regulator during normal operation, would send the main PD switch (at the RTN pin) in and out of current limit resulting in high power dissipation due to the resultant voltage across the “switch”. A current greater than the current limit value would increase the voltage on the RTN pin to the Ehternet Input supply voltage immediately resulting in power dissipation levels that would immediately shut down the PD switch without the required storage capacitor. The soft-start capacitor, CSS, slows the rate of current delivery to the switching regulator to a value that can be delivered by the storage capacitor/PD switch. A resistor tied between the Rdelay pin and AGND sets a time delay between the falling edge of the synchronous gate and the rising edge of the main gate. This delay can be set to compensate for system delays caused by architectural structures of the circuit being used. An isolated secondary type power supply having a transformer in the feedback loop may require extra time due to the electrical path incurred. The delay time is adjustable from as little as 40nSec to over 200nSec through the choice of resistance value. A smaller resistance will result in a shorter delay. Nominal values range from 0 - 200 kΩ for time delays from 40nSec to 200nSec. The delay www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 9 MP8005 – IEEE 802.3af PoE POWERED DEVICE CONTROLLER is very important in that it prevents cross conduction of the switching MOSFETS that either severely reduces efficiency or even worse, a switching MOSFET failure. The output drive levels of the main and synchronous gate are in the hundreds of mA through a 0 to 10V voltage potential. A “normal” threshold MOSFET (Vth typ. 3.5V) having low gate charge (less than 10 nano-Coulombs @ 10V drive) is recommended. The nominal range of the ISENSE pin is set to a maximum of 200mV but should be designed such that 100mV across the sense resistor provides the maximum current that is expected for the nominal load. This will provide enough “headroom” for typical applications. MP8005 Rev. 1.0 9/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 10 MP8005 – IEEE 802.3af PoE POWERED DEVICE CONTROLLER PACKAGE INFORMATION TSSOP-20F (EXPOSED PAD) 4.40 TYP 6.40 6.60 20 0.40 TYP 11 1.60 TYP 4.30 4.50 PIN 1 ID 1 0.65 BSC 3.20 TYP 6.20 6.60 5.80 TYP 10 TOP VIEW RECOMMENDED LAND PATTERN 0.80 1.05 1.20 MAX SEATING PLANE 0.19 0.30 0.65 BSC 0.00 0.15 0.09 0.20 SEE DETAIL "A" SIDE VIEW FRONT VIEW GAUGE PLANE 0.25 BSC 3.80 4.30 0o-8o 0.45 0.75 DETAIL A 2.60 3.10 BOTTOM VIEW NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) DRAWING CONFORMS TO JEDEC MO-153, VARIATION ACT. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP8005 Rev. 1.0 9/26/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 11
MP8005DF-LF-Z 价格&库存

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