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MP8125EF-LF

MP8125EF-LF

  • 厂商:

    MPS(美国芯源)

  • 封装:

    TSSOP16_EP

  • 描述:

    ICREGBOOSTADJ550MA

  • 数据手册
  • 价格&库存
MP8125EF-LF 数据手册
MP8125 550mA, 8-14V Input, LNB Power Supply and Control Voltage Regulator EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 The Future of Analog IC Technology DESCRIPTION FEATURES The MP8125 is a voltage regulator designed to provide efficient, low noise power to the Satellite receiver’s RF LNB (Low Noise Block) converter via coaxial cable through a DiSEqC 1.x compatible link that receives instructions from a dedicated controller. • • • • • • • • • • • • • The MP8125 integrates a current mode boost regulator followed by a tracking linear regulator. The boost regulator provides a clean and quiet power source that will not contaminate the low noise RF signal down converted to the receiver. The tracking linear regulator protects the output against overload or short. The MP8125 provides a number of features described in the European EUTELSAT specification (DiSEqC) including: voltage selection of horizontal or vertical polarization directions of LNB and a selectable VOUT compensation for voltage drop on the long coaxial cable. In accordance with DiSEqC standard, a tone signal of 22kHz is generated by an internal oscillator and can be activated or deactivated onto output by EXTM pin. DiSEqC 1.x Compatibility Up to 550mA Output Current 8V to 14V Input Voltage Boost Converter with Internal Switch Low Noise LDO Output Built-in 22kHz Tone Signal Generator Programmable Current Limit 1V Line Drop Compensation Adjustable Soft-start Time POK Indicator Short Circuit Protection Over Temperature Protection TSSOP16 Exposed Pad and 24-pin QFN (4 x 4mm) Packages APPLICATIONS • LNB Power Supply and Control for Satellite Set Top Boxes All MPS parts are lead-free and adhere to the RoHS directive.For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. R The MP8125 is available in thermally enhanced TSSOP16 and 24-pin QFN (4 x 4mm) packages. N O T TYPICAL APPLICATION MP8125 Rev. 1.11 5/9/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 1 MP8125 – LNB POWER SUPPLY AND CONTROL VOLTAGE REGULATOR ORDERING INFORMATION Top Marking MP8125EF* Package TSSOP-16 Free Air Temperature (TA) MP8125 -20°C to +85°C MP8125DR QFN24(4x4mm) MP8125 -40°C to +85°C EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 Part Number * For Tape & Reel, add suffix –Z (e.g. MP8125EF–Z). For RoHS compliant packaging, add suffix –LF (e.g. MP8125EF–LF–Z) PACKAGE REFERENCE 14 BST COMP 4 13 VBOOST EN 5 12 VOUT LINEDROP 6 11 ILIMIT POK 7 10 TCAP 13V/18V 8 9 EXTM TSSOP-16 ABSOLUTE MAXIMUM RATINGS (1) N O T R VDD ................................................-0.3V to 16V VOUT, SW, VBOOST ....................-0.3V to 25V BST ....................................................... VSW +7V All Other Pins ................................-0.3V to 6.5 V Continuous Power Dissipation.….(TA=+25°C) (2) TSSOP-16……………………………………2.8W QFN24(4x4mm)………………………………2.9W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature................. -65°C to 150°C Recommended Operating Conditions (3) Supply Voltage VIN ..............................8V to 14V Output Voltage VOUT ............... 13V/14V/18V/19V Maximum Junction Temp. (TJ) ...............+125°C MP8125 Rev. 1.11 5/9/2013 SW 3 24 23 22 21 20 19 NC 1 18 NC VDD 2 17 BST NC 3 COMP 4 EN 5 14 VOUT LINEDROP 6 13 VOUT 16 VBOOST EXPOSED PAD CONNECT TO GND 7 8 15 VBOOST 9 10 11 12 ILIMIT VDD PGND SW TCAP 15 PGND 2 EXTM BYPASS SGND PGND NC 16 13V/18V 1 POK SGND BYPASS TOP VIEW BYPASS TOP VIEW QFN24 Thermal Resistance (4) θJA θJC TSSOP-16...............................45 ....... 8 .... °C/W QFN24(4x4mm) ......................42 ....... 9 .... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7 4-layer PCB www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 2 MP8125 – LNB POWER SUPPLY AND CONTROL VOLTAGE REGULATOR ELECTRICAL CHARACTERISTICS EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 VIN = 12V, TA = 25°C, unless otherwise noted. Parameter Symbol Condition General Input Voltage Range Input Supply Current (5) Under Voltage Lockout UVLO Hysteresis VIN IIN UVLO VEN_High VEN_Low 13V/18V Input Logic V13/18_High Threshold V13/18_Low LINEDROP Input Logic VLD_High Threshold VLD_Low TCAP pin current ICHA Output Backward Leakage IBKLK Current (6) Voltage on BYPASS pin VBYP SWITCHING REGULATOR Boost Switch On Resistance RDSON (5) R Boost Frequency LINEAR REGULATOR Dropout Voltage (5) OUTPUT T O N Output Line Regulation Output Load Regulation (5) MP8125 Rev. 1.11 5/9/2013 Typ Max Units 8 12 5 14 V mA V mV V V V V V V μA 7 8 350 EN Input Logic Threshold Output Voltage EN=High, no load VIN rising Min VEN rising VEN falling V13V/18V rising V13V/18V falling VLINEDROP rising VLINEDROP falling TCAP capacitor charging EN=Low, VOUT is clamped to 24V, VBOOST is float 2 0.8 2 0.8 2 0.8 7 0.7 IOUT =500mA VBOOST-VOUT, IOUT=500mA VOUT LINEDROP=Low, 13V/18V=Low, IOUT =10-100mA LINEDROP=Low, 13V/18V=High, IOUT =10-100mA LINEDROP=High, 13V/18V=Low, IOUT =10-100mA LINEDROP=High, 13V/18V=High, IOUT =10-100mA 8V≤VIN≤14V; IOUT=100mA 10mA≤IOUT≤500mA, 13V/18V=Low 10mA≤IOUT≤500mA, 13V/18V=High 1 mA 5 V 500 mΩ 352 kHz 0.9 V 12.8 13.2 13.6 V 17.6 18.14 18.7 V 13.72 14.2 14.58 V 18.57 19.14 19.73 V 4 40 mV 20 mV 30 mV www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 3 MP8125 – LNB POWER SUPPLY AND CONTROL VOLTAGE REGULATOR ELECTRICAL CHARACTERISTICS (continued) EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 VIN = 12V, TA = 25°C, unless otherwise noted. Parameter TONE Signal Symbol Condition Tone Signal Frequency fTONE TA = 25°C VEXTM_High VEXTM rising EXTM Input Logic Threshold VEXTM_Low VEXTM falling Delay Time of Tone Signal Activated or Deactivated (5) Peak-to-Peak Amplitude Rise and Fall Time Over-Current Protection Output Current Limit Dynamic Overload Protection Off Time Dynamic Overload Protection On Time POK POK Upper Trip Threshold (5) POK Lower Trip Threshold POK Output Lower Voltage Thermal Protection Over Temperature Shutdown (5) OTP Hysteresis tDELAY Min Typ Max Units 20 22 24 kHz 2 V V 0.8 1.5 fTONE Delay time after EXTM goes high or low VPP ILOAD = 0 to 100mA RL=1kΩ, CL=0.1μF 0.55 0.65 8 0.9 V μs ILIMIT RLIMIT=10kΩ 600 850 1100 mA TOFF Time of attempt to restart 2 s TON Time to onset of shutdown 50 ms VFB with Respect to Nominal 12 % VFB with Respect to Nominal ISINK = 5mA -12 0.3 % V 150 °C 20 °C N O T R Note: 5) Guaranteed by design. 6) Shall withstand the back voltage for an indefinite period of time. On removal of the fault condition the device returns to normal operation MP8125 Rev. 1.11 5/9/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 4 MP8125 – LNB POWER SUPPLY AND CONTROL VOLTAGE REGULATOR PIN FUNCTIONS Pin # QFN24 Name 1 2 3 4 22 23, 24 2 4 SGND BYPASS VDD COMP 5 EN 6 LINEDROP 7 POK 8 13V/18V 10 EXTM 11 TCAP 12 ILIMIT 13, 14 15, 16 17 VOUT VBOOST BST 19 SW 20, 21 1, 3, 9, 18 PGND NC 5 6 7 8 9 10 11 R 12 13 14 15 N O T 16 Description EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 Pin # TSSOP-16 MP8125 Rev. 1.11 5/9/2013 Analog ground. Connect a bypass capacitor for the internal regulator. Input supply pin. Compensation pin for Boost regulator (47nF & 19.6kΩ is suggested). Regulator On/Off Control Input. When this pin is low, the output is disabled. A high level at EN turns on the converter. Connect EN to the input source (through a 100kΩ pull-up resistor if VIN > 6V) for automatic startup. EN cannot be left floating. This pin provides selectable VOUT compensation for voltage drop on the long coaxial cable. When the LINEDROP is high, the LDO output is 1V increased. LINEDROP cannot be left floating. Power OK. A high output indicates that LDO output is within ±12% of nominal value. A low output means that LDO output is outside this window. Select 13V or 18V for output voltage. High level for 18V while low level for 13V. This pin cannot be left floating. External modulation input for 22kHz signaling. A high level at EXTM turns on 22kHz signal and a low level disables it. EXTM cannot be left floating. Internal voltage reference for LDO output, A soft-start capacitor can be connected to this pin to set rise time of the output voltage. The capacitor should be very close to this pin and SGND, and the route should keeps far away from any noise like SW copper. The ILIMIT is used to set the value of the output current limit of LDO. A resistor from ILIMIT to GND programs the limit. Output voltage. Input of the internal LDO. Supply for the internal LDO driver. SW is the drain of the internal MOSFET switch of Boost stage. Connect the power inductor and output rectifier to SW. Power ground. Not Connect. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 5 MP8125 – LNB POWER SUPPLY AND CONTROL VOLTAGE REGULATOR TYPICAL PERFORMANCE CHARACTERISTICS N O T R EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 Performance waveforms are tested on the evaluation board of the DESIGN EXAMPLE section. VIN =12V, VLINEDROP=5V, VEXTM=0V, TA = +25ºC, unless otherwise noted. MP8125 Rev. 1.11 5/9/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 6 MP8125 – LNB POWER SUPPLY AND CONTROL VOLTAGE REGULATOR N O T R EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the DESIGN EXAMPLE section. VIN =12V, VLINEDROP=5V, VEXTM=0V, IOUT=0.55A, TA = +25ºC, unless otherwise noted. MP8125 Rev. 1.11 5/9/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 7 MP8125 – LNB POWER SUPPLY AND CONTROL VOLTAGE REGULATOR BLOCK DIAGRAM EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 8~14V Vin VDD TCAP COMP SW EN Internal Regulator BYPASS VBOOST Boost Driver PGND Vref Charge Pump BST 13V / 18V Switch 13V/18V SGND VOUT 13V/18V +1V Offset LINEDROP Frequency Divider POK 22kHz Shaper POK Current Limit ILIMIT EXTM N O T R Figure 1—Internal Function Block Diagram MP8125 Rev. 1.11 5/9/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 8 MP8125 – LNB POWER SUPPLY AND CONTROL VOLTAGE REGULATOR OPERATION The MP8125 has an integrated boost converter that, from a single supply source between 8V and 14V, generates the voltage to enable the linear post-regulator to work at a minimum dissipated power. Boost Converter/Linear Regulator The boost converter is a fixed frequency, nonsynchronous voltage regulator with peak current mode control. The operating frequency is 352kHz typically, which is 16 times the 22kHz internal tone frequency. To reduce power dissipation, the boost converter operates in a pulse-skipping mode at light load. The output voltage of boost converter tracks the requested output voltage to allow the linear regulator to work with minimum drop-out voltage. R 13V/18V Switching With the logic input pin 13V/18V, the output voltage can be set to 13V or 18V to select different polarization directions of LNB. A logic high level on this pin will set the output to 18V while a low level set it to 13V. T LINEDROP Control In order to compensate the excess of voltage drop along the coaxial cable, a voltage compensation function is integrated. If set a high level on LINEDROP pin, the output voltage can be increased by 1 V. A low level will disable the function. O N Current Limit The output current is limited dynamically and the threshold can be programmed by an external resistor connected to the ILIMIT pin according to the following formula: EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 The MP8125 is a single output voltage regulator for providing both supply voltage and control signal from satellite set-top box modules to LNB (low noise block) of the antenna port. Soft Start Soft start is implemented via external capacitor (CSS). With the required slew rate (k) of the output voltage, the value of CSS can be obtained using the following formula: CSS = (15 × ICHA ) / k ILIMIT = 8500 / RLIMIT When an overload is detected, the output current will be regulated at the current limit level for 50 ms. After this time period, if the overload is still detected, the output will be shut down for 2s before the output is resumed. For the boost converter, it integrates cycle-bycycle over current limit function, which can guarantee the part works with full load. Power Good (POK) POK is connected to an internally open-drain device. When output voltage is out of +/- 12% of normal value, POK will be pulled down. Otherwise, it will be pulled high. Tone Generation In accordance with DiSEqC standards, a tone signal of 22kHz is generated by an internal oscillator and activated/deactivated by EXTM pin. A high level on EXTM activates the internal tone signal and modulates it onto the output to provide the LNB control information. A low level will deactivate the 22kHz signal. The tone signal will be activated or deactivated onto the output within 1.5 periods after EXTM goes high or low. Please refer to the Figure 2 (T is the period of tone signal.). 1.5T EXTM Tone Output 1.5T Figure 2—Tone Signal on Output Thermal Protection When the junction temperature exceeds +150°C, the part will be shut down. Once the junction temperature is cooled enough, typically 130°C, the part will re-start automatically. Where ICHA is 7 μA typ. MP8125 Rev. 1.11 5/9/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 9 MP8125 – LNB POWER SUPPLY AND CONTROL VOLTAGE REGULATOR APPLICATION INFORMATION Selecting the Inductor of Boost Converter An inductor with a DC current rating of at least 25% higher than the maximum load current is recommended. For most designs, the inductance value can be derived from the following equation. EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 COMPONENT SELECTION Selecting the Input Capacitor The input capacitor (C1) is required to maintain the DC input voltage. Ceramic capacitors with low ESR/ESL types are recommended. The input voltage ripple can be estimated by the below formula. Typically, a 10μF X7R ceramic capacitor is recommended. ΔVIN = ⎛ VIN V ⎞ ⋅ ⎜ 1 − IN ⎟ 2 8fs ⋅ L ⋅ C1 ⎝ VOUT ⎠ Setting the Output Capacitor of Boost Converter The output current to the step-up converter is discontinuous, therefore a capacitor is essential to supply the AC current to the load. Use low ESR capacitors for the best performance. The output voltage ripple can be estimated by the below formula. ΔVOUT = ⎛ VOUT V ⎞ ⋅ ⎜ 1 − IN ⎟ fs ⋅ RL ⋅ C2 ⎝ VOUT ⎠ Where RL is the value of load resistor. VIN (VOUT − VIN ) fs ⋅ VOUT ⋅ ΔIL Where ∆IL is the inductor ripple current. Choose inductor ripple current to be approximately 30% of the maximum load current. Selecting the Converter Rectifier Diode of Boost The high switching frequency demands highspeed rectifiers. Schottky diodes are recommended for most applications because of the fast recovery time and low forward voltage. Typically, a 2A Schottky diode is recommended for the boost converter. DESIGN EXAMPLE Below is a design example following the application guidelines for the specifications: VIN 12V VOUT 19V The detailed application schematic is shown in Figure 3. The typical performance and circuit waveforms have been shown in the Typical Performance Characteristics section. For more possible applications of this device, please refer to related Evaluation Board Data Sheet. N O T R Ceramic capacitors with X7R dielectrics are highly recommended because of their low ESR and small temperature coefficient. Typically, a 22μF X7R ceramic capacitor is recommended. L= MP8125 Rev. 1.11 5/9/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 10 EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 MP8125 – LNB POWER SUPPLY AND CONTROL VOLTAGE REGULATOR N O T R Figure 3—Detailed Application Schematic MP8125 Rev. 1.11 5/9/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 11 MP8125 – LNB POWER SUPPLY AND CONTROL VOLTAGE REGULATOR EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 PACKAGE INFORMATION TSSOP16 4.20 TYP 0.40 TYP 4.90 5.10 16 0.65 BSC 9 1.60 TYP 4.30 4.50 PIN 1 ID 1 6.20 6.60 3.30 TYP 5.80 TYP 8 TOP VIEW RECOMMENDED LAND PATTERN 0.80 1.05 1.20 MAX SEATING PLANE 0.19 0.30 0.65 BSC 0.00 0.15 0.09 0.20 SEE DETAIL "A" SIDE VIEW FRONT VIEW GAUGE PLANE 0.25 BSC R 3.65 4.15 0o-8o N O T DETAIL “A” 2.80 3.30 BOTTOM VIEW MP8125 Rev. 1.11 5/9/2013 0.45 0.75 NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH , PROTRUSION OR GATE BURR. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. 4) LEAD COPLANARITY(BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.10 MILLIMETERS MAX. 5) DRAWING CONFORMS TO JEDEC MO-153, VARIATION ABT. 6) DRAWING IS NOT TO SCALE. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 12 MP8125 – LNB POWER SUPPLY AND CONTROL VOLTAGE REGULATOR QFN24 (4X4mm) 3.90 4.10 EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 12 R 4 2.50 2.80 19 PIN 1 ID MARKING 18 3.90 4.10 PIN 1 ID INDEX AREA 1 0.50 BSC 2.50 2.80 0.18 0.30 6 13 0.35 0.45 TOP VIEW 12 7 BOTTOM VIEW PIN 1 ID OPTION A 0.30x45º TYP. 0.20 REF PIN 1 ID SEE DETAIL A 24 PIN 1 ID OPTION B R0.25 TYP. 0.80 1.00 0.00 0.05 DETAIL A SIDE VIEW 3.90 NOTE: 2.70 R 0.70 T 0.25 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX. 4) DRAWING CONFIRMS TO JEDEC MO-220, VARIATION VGGD. 5) DRAWING IS NOT TO SCALE. N O 0.50 RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP8125 Rev. 1.11 5/9/2013 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2013 MPS. All Rights Reserved. 13
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