TM
MP86883
Intelli-Phase Solution (Integrated
HS/LS FETs and Driver) in 6x6mm TQFN
The Future of Analog IC Technology
DESCRIPTION
The MP86883 is a monolithic half-bridge with
built-in internal power MOSFETs and gate
drivers. It achieves 55A of continuous output
current over a wide input supply range.
Integration of the driver and MOSFETS results
in high efficiency due to optimal dead time
control and parasitic inductance reduction.
The MP86883 is a Monolithic IC approach to
drive up to 55A per phase. This very small
TQFN-34 (6mm x 6mm) device can operate
from 100kHz to 1MHz.
This device works with tri-state output
controllers. It also comes with a generalpurpose current sense and temperature sense.
The MP86883 is ideal for server applications
where efficiency and small size are a premium.
FEATURES
Wide 4.5V to 14V Operating Input Range
Simple Logic Interface
55A Output Current
Accepts Tri-State PWM Signal
Built-In Switch for Bootstrap
Current Sense
Current Limit Protection
Temperature Sense and Protection
Fault Reporting
Used for Multi-Phase Operation
Available in TQFN-34 (6mm x 6mm)
Package
APPLICATIONS
Server/Workstation/Desktop Core Voltage
Graphic Card Core Regulators
Power Modules
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance. “MPS” and “The
Future of Analog IC Technology” are Registered Trademarks of Monolithic
Power Systems, Inc.
Intelli-Phase is Trademark of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
95
90
85
80
75
70
0 5 10 15 20 25 30 35 40 45 50 55
MP86883 Rev. 1.0
8/31/2020
www.MonolithicPower.com
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© 2020 MPS. All Rights Reserved.
1
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
ORDERING INFORMATION
Part Number*
Package
TQFN-34 (6mmx6mm)
MP86883GQKT
Top Marking
MP86883
* For Tape & Reel, add suffix –Z (e.g. MP86883GQKT–Z);
T1
VTEMP
EN
PGND
PGND
CS
FAULT#
RIN
PGND
PGND
PGND
AGND
PGND
PGND
VDD
PGND
PGND
SYNC
PGND
PWM
BST
VDRV
PACKAGE REFERENCE
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (4)
Supply Voltage VIN ........................................ 16V
VSW (DC) ............................................... -1 V to 16V
VSW (25ns) .............................................. -3V to 23V
VBST........................................................ VSW + 6V
All Other Pins .................................. -0.3V to +6V
Instantaneous Current ............................... 100A
Continuous Power Dissipation
(TA =+25°C)(2)
............................................................... 4.3W
Junction Temperature ............................... 150°C
Lead Temperature .................................... 260°C
Storage Temperature ................-65°C to +150°C
TQFN-34 (6mmx6mm)..……..…29……8…..°C/W
Recommended Operating Conditions (3)
θJA
θJC
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
Supply Voltage VIN ........................... 4.5V to 14V
Driver Voltage VDRV ......................... 4.5V to 5.5V
Logic Voltage VDD ........................... 4.5V to 5.5V
Operating Junction Temp. (TJ). -40°C to +125°C
MP86883 Rev. 1.0
8/31/2020
www.MonolithicPower.com
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© 2020 MPS. All Rights Reserved.
2
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
ELECTRICAL CHARACTERISTICS (5)
VIN = 12V, VDRV=VDD=5V, TA = -40°C to 125°C, unless otherwise noted.
Parameters
IIN Shutdown
Symbol
IIN (Off)
IIN Standby
IIN (Standby)
VIN Under Voltage Lockout
Threshold Rising
VIN Under Voltage Lockout
Threshold Hysteresis
IDRV Quiescent Current
IDRV Shutdown Current
IDD Quiescent Current
IDD Shutdown Current
VDD Voltage UVLO Rising
VDD Voltage UVLO Hysteresis
High Side Current Limit(5)
Low Side Current Limit(5)
EN Input Low Voltage
EN Input High Voltage
Dead-Time Rising(5)
Dead-Time Falling(5)
SYNC Current
SYNC Logic High Voltage
SYNC Logic Low Voltage
PWM High to SW Rising Delay(5)
PWM Low to SW Falling Delay(5)
Condition
VDRV=VDD=0V
VDRV=VDD=5V,
PWM=EN=Low
Min
Typ
55
Max
60
4
μA
4.4
300
IDRV (Quiescent)
IDRV Shutdown
IDD (Quiescent)
IDD Shutdown
PWM Tristate to SW Hi-Z Delay(5)
PWM Logic High Voltage
PWM Tristate Region(5)
PWM Logic Low Voltage
PWM=Low
4.4
0.4
2
ISYNC
3
8
-65
VSYNC=0V
2
0.4
tLT
tTL
tHT
tTH
IOUT=30A
IPWM
VPWM=3.3V,
VEN=5V
VPWM=0V, VEN=5V
2.65
1
V
mV
500
250
2.4
70
4
300
80
-30
ILIM
Minimum PWM Pulse Width(5)
Current Sense Accuracy(5)
Current Sense Gain
Temperature Sense Gain(6)
Temperature Sense Offset(6)
Over Temperature Flag(5)
Over Temperature Hysteresis(5)
PWM Input Current
PWM=Low
Units
μA
μA
μA
mA
μA
V
mV
A
A
V
V
ns
ns
μA
V
V
ns
ns
35
35
60
50
75
50
30
±4
10
10
-100
170
30
ns
%
μA/A
mV/°C
mV
°C
°C
95
μA
-95
μA
V
V
V
ns
1.7
0.40
Notes:
5) Guaranteed by design.
6) See “Junction Temperature Sense” section for details.
MP86883 Rev. 1.0
8/31/2020
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
3
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
MP86883 Rev. 0.8
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
Preliminary Specifications Subject to Change
© 2020 MPS. All Rights Reserved.
4
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
TYPICAL CHARACTERISTICS
5
4
4.8
3.9
4.6
3.8
4.4
3.7
4.2
3.6
4.0
3.8
3.5
3.6
3.3
3.4
3.2
3.2
3.1
3
-60
1. 5
1. 4
1. 3
3.4
-20
20
60
100
140
3
-60
1. 2
1. 1
-20
20
60
100
140
1
-60
10
1.5
80
9.5
1.4
70
1.3
60
8
1.2
50
7.5
1.1
40
7
1
30
0.9
20
0.8
10
9
8.5
6.5
6
5.5
5
-60
-20
20
60
-20
20
60
100
140
0.7
-60
-20
20
60
100
140
0
-60
-20
20
60
100
140
-20
20
60
100
140
3
2.5
2
1.5
1
0.5
0
-60
MP86883 Rev. 1.0
8/31/2020
100
140
www.MonolithicPower.com
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© 2020 MPS. All Rights Reserved.
5
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN=12V, VOUT=1.2V, VDRV= VDD=5V, L=215nH, FSW=600kHz, TA=25°C, no droop, unless otherwise
noted.
Normalized Power Loss
vs. Output Voltage
95
12
90
10
1.30
1.15
8
LOSS (W)
85
80
70
0
NORMALIZED LOSS (W)
1.25
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
300 400 500 600 700 800 900 1000
FSW (kHz)
1.00
0.95
0.90
0.85
0.80
0.5 0.7 0.9 1.1 1.3 1.5 1.7 1.9 2.1 2.3
VOUT (V)
0 5 10 15 20 25 30 35 40 45 50 55
IOUT (A)
Normalized Power Loss
vs. Inductance
1.30
1.20
1.05
4
2
0 5 10 15 20 25 30 35 40 45 50 55
IOUT (A)
1.10
6
75
Normalized Power Loss
vs. Switching Frequency
NORMALIZED LOSS (W)
1.20
1.20
1.18
1.16
1.14
1.12
1.10
1.08
1.06
1.04
1.02
1.00
0.98
0.96
0.94
0.92
0.90
100 150 200 250 300 350 400 450 500
60
55
400 FPM
50
45
IOUT (A)
EFFICIENCY (%)
1.25
40
35
30
200 FPM
No Airflow
25
20
15
10
0 10 20 30 40 50 60 70 80 90
Safe Operating Area
With Heat Sink
60
400 FPM
55
IOUT (A)
50
45
200 FPM
40
35
No Airflow
30
25
20
15
10
0 10 20 30 40 50 60 70 80 90
MP86883 Rev. 1.0
8/31/2020
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
6
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
PIN FUNCTIONS
Pin #
1-6
Name
SW
7
VDRV
8-21
PGND
22-23
IN
24
25
EN
VTEMP
26
FAULT#
27
28
T1
CS
29
RIN
30
AGND
31
VDD
32
PWM
33
SYNC
34
BST
MP86883 Rev. 1.0
8/31/2020
Description
Switch Output.
Driver Voltage. Connect to 5V supply and decouple with 1µF to 4.7µF ceramic
capacitor.
Power Ground.
Supply Voltage. Place CIN close to the device to prevent large voltage spikes at the
input.
Enable. Pull low to place SW in a high impedance state.
Single pin temperature sense output.
Fault reporting on HS current limit, Over Temperature and VDD UVLO. It is an open
drain output during normal operation and pull-low when fault occurred.
Test pin. Connect to ground.
Current Sense Output. Requires an external resistor.
Current Sense High Side Current Compensation pin. Connect through a resistor to
IN.
Analog Ground.
Internal Circuitry Voltage. Connect to VDRV thru 2.2Ω resistor and decouple with
1µF capacitor to AGND. Connect AGND and PGND at this point.
Pulse Width Modulation. Leave PWM floating or drive to mid-state to put SW in high
impedance state.
Synchronous Low Switch. Leave open or pull high to enable. Pull low to enter diode
emulation mode.
Bootstrap. Requires a 0.22µF to 1µF capacitor to drive the power switch’s gate
above the supply voltage. Connects between SW and BST pins to form a floating
supply across the power switch driver.
www.MonolithicPower.com
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© 2020 MPS. All Rights Reserved.
7
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
BLOCK DIAGRAM
VDRV
VDD
BST
IN
EN
HS
Current
Limit
Level
Shift
Tri-State Enable
EN
PWM
Internal PWM
SYNC
SW
Control
Logic
RIN
HS Current Limit
Tri-State Enable
PWM
Tri-State Enable
SYNC
HS
Current
Limit
T1
HSFET
Internal PWM
VDRV
Delay
EN
LSFET
AGND
SW
+
PGND
-
Outputs 1 after inductor
current zero crossing
Negative
Current
Limit
SW
+
-
Outputs 1 if
SW>1.5V
1.5V
Temperature
Sense
Current
Sense
VTEMP
CS
FAULT#
SW
PGND
PGND
Figure 1: Functional Block Diagram
MP86883 Rev. 1.0
8/31/2020
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
8
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
OPERATION
The MP86883 is a 55A monolithic half-bridge
driver with MOSFETs ideally suited for multiphase buck regulators.
When the EN transitions from low to high and
both VDD and VBST signals are sufficiently high,
operation begins. It is recommended to use EN
pin to startup and shutdown the Intelli-Phase.
To put SW node in a high impedance state, let
PWM pin float or drive PWM pin to mid-state.
Drive the SYNC pin low to enter diode emulation
mode. In diode emulation mode, the LSFET is
off after inductor current crossed zero current.
When HSFET over current is detected, the part
will latch off. Recycling Vdd or toggling EN will
release the latch and restart the device. When
the LSFET detects a -30A current, the part will
turn off the LSFET for that cycle.
When Intelli-Phase detects over temperature, it
will turn off both HS and LS MOSFET and latch
off. Toggle Vdd or EN to restart the device.
Current Sense
The CS pin is a bi-directional current source
proportional to the inductor current. Use the
following equations to select the RIN resistance
to connect between RIN pin and IN pin:
RIN 7.55 IL _ RIPPLE 170(k)
IL _ RIPPLE
t ON (VIN VOUT ) VOUT (VIN VOUT )
L
VIN FSW L
Where IL_RIPPLE is the peak to peak inductor ripple
current. For example, if the ripple current is 10A,
then the calculated RIN is 94.5kΩ and 95.3kΩ (the
closest 1% resistor value) should be selected for
RIN.
The CS voltage range of 1V to 3.5V is required to
keep CS’s output current linearly proportional to
inductor current. Use the following equations to
determine a proper reference voltage and/or RCS
value:
1V ICS RCS VREF 3.5V
ICS IL 10 106
Intelli-Phase’s current sense output can be used
by controller to accurately monitor the output
current. The cycle-by-cycle current information
from CS pin can be used for phase current
balancing, over current protection and active
voltage positioning (output voltage droop).
Intelli-Phase’s accurate current sense can
replace traditional inductor DCR current sensing
scheme. In traditional inductor DCR current
sense:
VCS IL RDCR
With Intelli-Phase’s CS output, VCS becomes:
VCS ICS RCS IL RCS 10 10 6
term
is
replaced
Where
the
RDCR
6
with RCS 10 10 . Figure 2 shows a circuit
replacing inductor DCR sensing with IntelliPhase’s CS output. There are several
advantages with this current sensing method:
1. Since current sensing is done by IntelliPhase, user can select low DCR
inductors and still have large current
sense signal by selecting larger RCS.
2. Tight DCR variation is not required.
3. CS signal is independent of impedance
matching and inductor temperature.
The current sense gain is 10μA/A. In general,
there is a resistor, RCS, connected from CS pin
and VOUT or an external voltage which is capable
to sink small current to provide enough voltage
shift to meet the operating voltage on CS pin.
MP86883 Rev. 1.0
8/31/2020
www.MonolithicPower.com
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© 2020 MPS. All Rights Reserved.
9
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
Figure 2: Replacing DCR Current Sense with Intelli-Phase’s CS Output
Junction Temperature Sense
The VTEMP pin is a voltage output proportional
to the junction temperature. The junction
temperature can be calculated from the following
equation:
TJUNCTION
VTEMP 100mV ,
10mV
o
C
Be sure to measure this voltage between VTEMP
and AGND pins for the most accurate reading. In
multi-phase operation, the VTEMP pins of every
Intelli-Phase can be connected to the
temperature monitor pin of the controller. A
sample circuitry is shown in Figure 3. VTEMP
signals can also be used for system thermal
protection as shown in Figure 4.
for TJUNCTION>10oC
For example, if the VTEMP voltage is 700mV,
then the junction temperature of Intelli-Phase is
80oC. VTEMP can not go below 0V, so it will read
0V for junction temperature lower than 10oC.
MP86883 Rev. 1.0
8/31/2020
www.MonolithicPower.com
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© 2020 MPS. All Rights Reserved.
10
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
Intelli-Phase
Power Stage
Vin
IntelliPhase
Vin
L2
VOUT
VTEMP
Multi-Phase
Controller
C OUT
PWM
PWM2
Temperature
ADC
Vin
IntelliPhase
Vin
L1
VTEMP
PWM
PWM1
Figure 3: Multi-Phase Temperature Sense Utilization
Program R1 and R2 to set
the protection temperature
VTEMP1
For System Protection
R1
VTEMP2
NPN
R2
Figure 4: System Thermal Protection
MP86883 Rev. 1.0
8/31/2020
www.MonolithicPower.com
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© 2020 MPS. All Rights Reserved.
11
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
PCB Layout Guide Line
PCB layout plays an important role to achieve
stable operation. For optimal performance,
follow these guidelines.
1. Always place some input bypass ceramic
capacitors next to the device and on the
same layer as the device. Do not put all of
the input bypass capacitors on the back
side of the device. Use as many via and
input voltage planes as possible to reduce
switching spikes. Place the BST capacitor
and the VDRV capacitor as close to the
device as possible.
2. Place the VDD decoupling capacitor close
to the device. Connect AGND and PGND at
the point of VDD capacitor's ground
connection.
3. It is recommended to use 0.22µF to 1µF
bootstrap capacitor and 3.3Ω bootstrap
resistance. Do not use capacitance values
below 100nF for the BST capacitor.
MP86883 Rev. 1.0
8/31/2020
4. Connect IN, SW and PGND to large copper
areas and use via to cool the chip to
improve thermal performance and long-term
reliability.
5. Keep the path of switching current short and
minimize the loop area formed by the input
capacitor. Keep the connection between the
SW pin and the input power ground as short
and wide as possible.
CBST
VIN
SW
CIN
PGND
CVDRV
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12
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
TYPICAL APPLICATION CIRCUITS
Figure 5: 4-Phase Intelli-Phase with MP2935 VR12.5 Controller
MP86883 Rev. 1.0
8/31/2020
www.MonolithicPower.com
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© 2020 MPS. All Rights Reserved.
13
MP86883 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN
PACKAGE INFORMATION
TQFN-34 (6mm x 6mm)
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP86883 Rev. 1.0
8/31/2020
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
14
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