MP86884DQKTE-LF-Z

MP86884 Intelli-PhaseTM Solution (Integrated HS/LS FETs and Driver) in 6x6mm TQFN DESCRIPTION FEATURES The MP86884 is a monolithic half-bridge with built-in internal power MOSFETs and gate drivers. It achieves 55A of continuous output current over a wide input supply range.            Integration of the driver and MOSFETS results in high efficiency due to optimal dead time control and parasitic inductance reduction. The MP86884 is a Monolithic IC approach to drive up to 55A per phase. This very small 6mmx6mm TQFN device can operate from 100kHz to 1MHz. This device works with tri-state output controllers. It also comes with a generalpurpose current sense and temperature sense. The MP86884 is ideal for server applications where efficiency and small size are a premium. Wide 4.5V to 14V Operating Input Range Simple Logic Interface 55A Output Current Accepts Tri-State PWM Signal Built-In Switch for bootstrap Current Sense Temperature Sense Current Limit Protection Used for Multi-Phase Operation Available in 6mm x 6mm TQFN Package ROHS6 Compliant APPLICATIONS    Server Core Voltage Graphic Card Core Regulators Power Modules All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. Intelli-Phase is Trademark of Monolithic Power Systems, Inc. TYPICAL APPLICATION MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 1 MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN ORDERING INFORMATION Part Number* Package Top Marking MP86884DQKT 6x6mm TQFN MP86884 * For Tape & Reel, add suffix –Z (e.g. MP86884DQKT–Z) For RoHS Compliant Packaging, add suffix –LF (e.g. MP86884DQKT–LF–Z) PACKAGE REFERENCE ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance (4) Supply Voltage VIN .......................................16V VSW (DC) ............................................. -1 V to 15V VSW (25ns) ............................................ -3V to 23V VBST .....................................................VSW + 6V All Other Pins ................................. -0.3V to +6V Instantaneous Current ..............................100A Continuous Power Dissipation (TA =+25°C)(2) ............................................................4.3W Junction Temperature .............................. 150°C Lead Temperature ................................... 260°C Storage Temperature ............... -65°C to +150°C 6x6mm TQFN......................... 29 ....... 8 .... °C/W θJA θJC Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. Recommended Operating Conditions (3) Supply Voltage VIN .......................... 4.5V to 14V Driver Voltage VDDDRV..................... 4.5V to 5.5V Logic Voltage VDD .......................... 4.5V to 5.5V Operating Junction Temp. (TJ). -40°C to +125°C MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 2 MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN ELECTRICAL CHARACTERISTICS VIN = 12V, VDDDRV=VDD=5V, TA = -40°C to 125°C, unless otherwise noted. Parameters IIN Shutdown Symbol IIN (Off) IIN Standby IIN (Standby) VIN Under Voltage Lockout Threshold Rising VIN Under Voltage Lockout Threshold Hysteresis IDDDRV Quiescent Current IDDDRV Shutdown Current IDD Quiescent Current IDD Shutdown Current VDD Voltage UVLO Rising VDD Voltage UVLO Hysteresis High Side Current Limit (5) Low Side Current Limit (5) EN Input Low Voltage EN Input High Voltage Dead-Time Rising (5) Dead-Time Falling (5) SYNC Current SYNC Logic High Voltage SYNC Logic Low Voltage PWM High to SW Rising Delay(5) PWM Low to SW Falling Delay(5) PWM Tristate to SW Hi-Z Delay(5) Min Typ 55 Max 4.4 300 IDDDRV (Quiescent) IDDDRV Shutdown IDD (Quiescent) IDD Shutdown PWM=Low PWM=Low ILIM 4.4 0.4 2 ISYNC 3 8 13 VSYNC=0V 2 0.4 tLT tTL tHT tTH 35 35 60 60 75 45 30 ±4 10 10 -100 105 -105 IOUT=10A IOUT=10A IOUT=10A IOUT=10A IOUT=30A IPWM PWM Logic High Voltage PWM Tristate Region(5) PWM Logic Low Voltage VPWM=5V, VEN=5V VPWM=0V, VEN=5V 4.00 1.45 V mV 500 250 2.4 70 4 300 80 -30 Units μA μA 60 4 Minimum PWM Pulse Width(5) Current Sense Accuracy(5) Current Sense Gain Temperature Sense Gain(6) Temperature Sense Offset(6) PWM Input Current Condition VDDDRV=VDD=0V VDDDRV=VDD=5V, PWM=EN=Low μA μA mA μA V mV A A V V ns ns μA V V ns ns ns 3.20 0.50 ns % μA/A mV/°C mV μA μA V V V Notes: 5) Guaranteed by design. 6) See “Junction Temperature Sense” section for details. MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 3 MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN PWM High Tri-State Low t Rising t Falling 35ns 35ns Vin Switch Node t LT t TL 60ns 60ns t HT t TH 75ns 45ns Vout 0V MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 4 MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN PIN FUNCTIONS Pin # Name 1-6 Exposed Pad SW 7 VDDDRV 8-21 Exposed Pad PGND 22-23 Exposed Pad 24 25 26 27 EN VTEMP T2 T1 28 29 30 CS DT VSS 31 VDD 32 PWM 33 SYNC 34 BST IN Description Switch Output. Driver Voltage. Connect to 5V supply and decouple with 1µF to 4.7µF ceramic capacitor. Power Ground. Supply Voltage. Place CIN close to the device to prevent large voltage spikes at the input. Enable. Pull low to place SW in a high impedance state. Single pin temperature sense output. Test pin. Connect to ground. Test pin. Connect to ground. Current Sense Output. Requires an external resistor. Dead Time. It is recommended to float this pin to use default dead time setting. Signal Ground. Internal Circuitry Voltage. Connect to VDDDRV thru 2.2Ω resistor and decouple with 1µF capacitor to VSS. Connect VSS and PGND at this point. Pulse Width Modulation. Leave PWM floating or drive to mid-state to put SW in high impedance state. Synchronous Low Switch. Leave open or pull high to enable. Pull low to enter diode emulation mode. Bootstrap. Requires a 0.22µF to 1µF capacitor to drive the power switch’s gate above the supply voltage. Connects between SW and BST pins to form a floating supply across the power switch driver. MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 5 MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN TYPICAL CHARACTERISTICS MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 6 MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN TYPICAL PERFORMANCE CHARACTERISTICS VIN=12V, VOUT=1.2V, VDDDRV= VDD=5V, L=200nH, FSW=600kHz, TA=25oC, no droop, unless otherwise noted. MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 7 MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN=12V, VOUT=1.2V, VDDDRV= VDD=5V, L=200nH, FSW=600kHz, TA=25oC, no droop, unless otherwise noted. MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 8 MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN BLOCK DIAGRAM VDD BST VDDDRV IN EN PWM Control Logic SYNC SW VDDDRV DT T1 T2 VSS Current Sense Temperature Sense CS VTEMP PGND Figure 1: Functional Block Diagram MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 9 MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN OPERATION The MP86884 is a 55A monolithic half-bridge driver with MOSFETs ideally suited for multiphase buck regulators. When the EN transitions from low to high and both VDD and VBST signals are sufficiently high, operation begins. It is recommended to use EN pin to startup and shutdown the Intelli-Phase. To put SW node in a high impedance state, let PWM pin float or drive PWM pin to mid-state. Drive the SYNC pin low to enter diode emulation mode. In diode emulation mode, the LSFET is off after inductor current crossed zero current. When HSFET over current is detected, the part will latch off. Recycling Vin/Vdd or toggling EN will release the latch and restart the device. When the LSFET detects a -30A current, the part will turn off the LSFET for that cycle. MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 10 MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN APPLICATION INFORMATION Current Sense The CS pin is a current source that generates 10μA per 1A of LSFET current. It will hold the valley current when LS turned off. Place a resistor between CS pin and ground to generate a voltage proportional to the output current. A capacitor is optional for noise immunity. Intelli-Phase’s current sense output can be used by controller to accurately monitor the output current. The cycle-by-cycle current information from CS pin can be used for phase current balancing, over current protection and active voltage positioning (output voltage droop). In multi-phase operation, the CS pins of every Intelli-Phase can be summed through resistors and connected to the current sense amplifier of the controller. This circuitry is shown in Figure 2. The reference voltage cannot be higher than 3.2V. Intelli-Phase Power Stage Multi-Phase Controller Vin R2 For Droop Current Sense Amplifier IntelliPhase Vin ICS2 CS PWM2 Reference Voltage Vin R1 For Current Balance VOUT COUT GND PWM RCS Phase Current Balance L2 SW ICS1 IntelliPhase Vin CS L1 SW GND PWM PWM1 Figure 2: Multi-Phase Current Sense Utilization Junction Temperature Sense The VTEMP pin is a voltage output proportional to the junction temperature. The VTEMP pin output voltage is 10mV/°C with a 100mV offset. VTEMP = Junction Temperature x 10mV/°C – 100mV. For example, if the junction temperature is 80°C, then the VTEMP voltage is 700mV. Be sure to measure this voltage between VTEMP and VSS pins for the most accurate reading. In multiphase operation, the VTEMP pins of every IntelliPhase can be connected to the temperature monitor pin of the controller. A sample circuitry is shown in Figure 3. VTEMP signals can also be used for system thermal protection as shown in Figure 4. MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 11 MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN Intelli-Phase Power Stage Vin IntelliPhase Vin L2 VOUT VTEMP Multi-Phase Controller COUT PWM PWM2 Temperature ADC Vin IntelliPhase Vin L1 VTEMP PWM PWM1 Figure 3: Multi-Phase Temperature Sense Utilization Program R1 and R2 to set the protection temperature VTEMP1 For System Protection R1 VTEMP2 NPN R2 Figure 4: System Thermal Protection PCB Layout Guide Line PCB layout plays an important role to achieve stable operation. For optimal performance, follow these guidelines. 3. It is recommended to use 0.22µF to 1µF bootstrap capacitor and 3.3Ω bootstrap resistance. Do not use capacitance values below 100nF for the BST capacitor. 4. Connect IN, SW and PGND to large copper areas and use via to cool the chip to improve thermal performance and long-term reliability. 5. Keep the path of switching current short and minimize the loop area formed by the input capacitor. Keep the connection between the SW pin and the input power ground as short and wide as possible. 1. Always place some input bypass ceramic capacitors next to the device and on the same layer as the device. Do not put all of the input bypass capacitors on the back side of the device. Use as many via and input voltage planes as possible to reduce switching spikes. Place the BST capacitor and the VDDDRV capacitor as close to the device as possible. 2. Place the VDD decoupling capacitor close to the device. Connect VSS and PGND at the point of VDD capacitor's ground connection. MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 12 EN FAULT# RICCMAX EN ICC MAX FAULT# VRHOT# ADDR IMON ALERT# SDIO SCLK VRHOT# RADDR VRRDY RIMON VRRDY ALERT# SDIO SCLK VDD RAAM RTMAX RBOOT MP2935 4-Phase VR12.5 PWM Controller VBOOT FB GND (PAD) TMAX IDROOP OTPG COMP VCC VIDFF CPU 5V SLOPE CCM RFS FSET VOSEN RSLOPE VOUT VTT IREF AAM GNDSEN PGND VIN TEMP OCPSET PWM1 PWM2 PWM3 PWM4 VCM CS4 CS3 CS2 CS1 5V 5V 5V 5V VSS VTEMP SYNC CS BST VIN BST PGND SW VIN BST PGND SW PGND SW Intelli-Phase PWM EN VDDDRV VDD VSS VTEMP SYNC CS VIN PGND SW Intelli-Phase PWM EN VDDDRV VDD VSS VTEMP SYNC CS BST Intelli-Phase PWM EN VDDDRV VDD VSS VTEMP SYNC CS VIN Intelli-Phase PWM EN VDDDRV VDD VIN VIN VIN VIN PGND VOUT MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN TYPICAL APPLICATION CIRCUITS Figure 5: 4-Phase Intelli-Phase with MP2935 VR12.5 Controller MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 13 OTPD MP86884 – INTELLI-PHASE SOLUTION IN 6x6mm TQFN PACKAGE INFORMATION TQFN (6mm x 6mm) PIN 1 ID MARKI NG PIN 1 ID INDEX AREA BOTTOM VIEW TOP VIEW SIDE VIEW NOTE: 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETERS MAX. 4) JEDEC REFERENCE IS MO-220. 5) DRAWING IS NOT TO SCALE. RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP86884 Rev. 1.02 www.MonolithicPower.com 8/31/2020 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 14