MP86885
Intelli-Phase Solution (Integrated
HS/LS FETs and Driver) in 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
DESCRIPTION
FEATURES
The MP86885 is a monolithic half-bridge with
built-in internal power MOSFETs and gate
drivers. It achieves 40A of continuous output
current over a wide input supply range.
•
•
•
•
•
•
•
•
•
•
•
Integration of the driver and MOSFETS results
in high efficiency due to optimal dead time
control and parasitic inductance reduction.
The MP86885 is a Monolithic IC approach to
drive up to 40A per phase. This very small 4mm
x 6mm FC-TQFN device can operate from
100kHz to 1MHz.
This device works with tri-state output
controllers. It also comes with a generalpurpose current sense and temperature sense.
•
The MP86885 is ideal for server applications
where efficiency and small size are a premium.
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•
•
Wide 4.5V to 14V Operating Input Range
Simple Logic Interface
40A Output Current
Accepts Tri-State PWM Signal
Built-In Switch for bootstrap
Current Sense
Temperature Sense (10mV/oC)
Current Limit Protection
Used for Multi-Phase Operation
Fault Reporting
Available in 4mm x 6mm FC-TQFN
Package
RoHS 6 Compliant
APPLICATIONS
Server/Workstation/Desktop Core Voltage
Graphic Card Core Regulators
Power Modules
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance. “MPS” and “The
Future of Analog IC Technology” are Registered Trademarks of Monolithic
Power Systems, Inc.
Intelli-Phase is Trademark of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
5V
VDRV
VDD
IN
VIN
MP86885
AGND
T1
VTEMP
PWM
SYNC
EN
CS
VTEMP
FAULT#
FAULT#
PWM
SYNC
EN
CS
RIN
BST
SW
VOUT
PGND
PGND
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
1
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
ORDERING INFORMATION
Part Number*
MP86885GQWT
Package
FC-TQFN-29 4x6(mm)
Top Marking
M86885
* For Tape & Reel, add suffix –Z (e.g. MP86885GQWT–Z).
PACKAGE REFERENCE
IN
PGND
PGND
29
28
27
PWM
1
26
PGND
EN
2
25
PGND
CS
3
24
PGND
VTEMP 4
23
PGND
5
22
PGND
FAULT# 6
21
PGND
AGND
7
20
PGND
VDD
8
19
PGND
RIN
9
18
PGND
T1
10
17
SYNC
BST
16
11
12
13
14
15
SW
SW
SW
SW
PGND
VDRV
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (4)
Supply Voltage VIN .......................................16V
VSW (DC) ............................................. -1 V to 16V
VSW (25ns) ............................................ -3V to 23V
VBST......................................................VSW + 6V
All Other Pins ................................. -0.3V to +6V
Instantaneous Current ................................65A
Continuous Power Dissipation
(TA =+25°C)(2)
...........................................................3.5 W
Junction Temperature .............................. 150°C
Lead Temperature ................................... 260°C
Storage Temperature ............... -65°C to +150°C
4x6mm FC-TQFN................... 36 ....... 8 .... °C/W
Recommended Operating Conditions
(3)
θJA
θJC
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature T J (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by P D (MAX) = (T J
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation will cause excessive die temperature, and the
regulator will go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on JESD51-7, 4-layer PCB.
Supply Voltage VIN .......................... 4.5V to 14V
Driver Voltage VDRV ........................ 4.5V to 5.5V
Logic Voltage VDD .......................... 4.5V to 5.5V
Operating Junction Temp. (TJ). -40°C to +125°C
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
2
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
ELECTRICAL CHARACTERISTICS
VIN = 12V, VDRV=VDD=5V, TA = 25°C, unless otherwise noted.
Parameters
IIN Shutdown
Symbol
IIN Off
IIN Standby
IIN Standby
VIN Under Voltage Lockout
Threshold Rising
VIN Under Voltage Lockout
Threshold Hysteresis
IDRV Quiescent Current
IDRV Shutdown Current
IDD Quiescent Current
IDD Shutdown Current
VDD Voltage UVLO Rising
VDD Voltage UVLO Hysteresis
High Side Current Limit(5)
Low Side Current Limit(5)
EN Input Low Voltage
EN Input High Voltage
Dead-Time Rising(5)
Dead-Time Falling(5)
SYNC Current
SYNC Logic High Voltage
SYNC Logic Low Voltage
PWM High to SW Rising Delay(5)
PWM Low to SW Falling Delay(5)
PWM Tristate to SW Hi-Z Delay
(5)
Condition
VDRV=VDD=0V
VDRV=VDD=5V,
PWM=EN=Low
Min
25
Typ
65
Max
100
Units
μA
30
55
60
μA
3.4
4
4.5
V
340
IDRV Quiescent
IDRV Shutdown
IDD Quiescent
IDD Shutdown
PWM=Low
PWM=Low
200
1.5
30
3.3
ILIM
PWM Logic High Voltage
PWM Tristate Region
PWM Logic Low Voltage
Current Sense Accuracy(5)
Current Sense Gain
Current Sense Common-Mode
Voltage Range
Temperature Sense Gain(5), (6)
Temperature Sense Offset(5), (6)
Temperature Sense Accuracy(5)
VTEMP Pull-Down Current
Over Temperature Protection(5)
260
3
60
4.4
0.4
2
3
8
ISYNC
VSYNC=0V
-50
2
-43
0.4
35
35
60
50
75
50
30
tLT
tTL
tHT
tTH
Minimum PWM Pulse Width(5)
PWM Input Current
1
230
2.3
46
3.9
300
60
-25
mV
IPWM
VPWM=3.3V, VEN=5V
VPWM=0V, VEN=5V
IOUT=15A
80
-100
2.45
1.1
-90
ns
100
-80
2.0
0.50
+4
-4
10
1
VTEMP=VDD
3.5
10
-100
±5
160
170
mA
μA
mA
μA
V
mV
A
A
V
V
ns
ns
μA
V
V
ns
ns
ns
μA
μA
V
V
V
%
μA/A
V
mV/°C
mV
°C
μA
°C
Notes:
5) Guaranteed by design, not tested in production. The parameter is tested during parameter characterization.
6) See “Junction Temperature Sense” section for details.
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
3
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
PWM
High
Tri-State
Low
t Rising
t Falling
35ns
35ns
Vin
Switch
Node
t LT
t TL
60ns
50ns
t HT
t TH
75ns
50ns
Vout
0V
PWM Delay Diagram
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
4
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
PIN FUNCTIONS
Pin #
Name
1
PWM
2
3
4
EN
CS
VTEMP
5
SYNC
6
FAULT#
7
AGND
8
VDD
9
RIN
10
T1
11
BST
12-15
SW
16
VDRV
17-28
PGND
29
IN
Description
Pulse Width Modulation. Leave PWM floating or drive to mid-state to put SW in high
impedance state.
On/Off Control. Pull low to place SW in a high impedance state.
Current Sense Output. Requires an external resistor.
Single pin temperature sense output.
Synchronous Low Switch. Leave open or pull high to enable. Pull low to enter diode
emulation mode.
Fault reporting on HS current limit, Over Temperature and VDD UVLO. It is an opendrain output during normal operation and pull-low when fault occurred. Low side
current limit will not pull low fault pin.
Analog Ground.
Internal Circuitry Voltage. Connect to VDRV thru 2.2Ω resistor and decouple with
1µF capacitor to AGND. Connect AGND and PGND at this point.
Current Sense Compensation. Connect a resistor from this pin to Vin to fine tune
current sense gain.
Test pin. Connect to ground.
Bootstrap. Requires a 0.22µF to 1µF capacitor to drive the power switch’s gate
above the supply voltage. Connects between SW and BST pins to form a floating
supply across the power switch driver.
Switch Output.
Driver Voltage. Connect to 5V supply and decouple with 1µF to 4.7µF ceramic
capacitor.
Power Ground.
Supply Voltage. Place CIN close to the device to prevent large voltage spikes at the
input.
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
5
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
TYPICAL CHARACTERISTICS
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
6
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
TYPICAL PERFORMANCE CHARACTERISTICS
VIN=12V, VDRV=VDD=5V, VOUT=1.2V, L=215nH, FSW=600kHz, T A=25oC, no droop, unless otherwise
noted.
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
7
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
BLOCK DIAGRAM
VDD
VDDDRV
BST
IN
EN
HS
Current
Limit
Level
Shift
Tri-State Enable
EN
PWM
Internal PWM
SYNC
SW
Control
Logic
RIN
HS Current Limit
Tri-State Enable
PWM
Tri-State Enable
SYNC
HS
Current
Limit
T1
HSFET
Internal PWM
VDRV
Delay
EN
LSFET
AGND
SW
+
PGND
-
Outputs 1 after inductor
current zero crossing
Negative
Current
Limit
SW
+
-
Outputs 1 if
SW>1.5V
1.5V
Temperature
Sense
Current
Sense
VTEMP
CS
FAULT#
SW
PGND
PGND
Figure 1: Functional Block Diagram
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
8
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
OPERATION
The MP86885 is a 40A monolithic half-bridge
driver with MOSFETs ideally suited for multiphase buck regulators.
When the EN transitions from low to high and
both VDD and VBST signals are sufficiently high,
operation begins. It is recommended to use EN
pin to startup and shutdown the Intelli-Phase.
To put SW node in a high impedance state, let
PWM pin float or drive PWM pin to mid-state.
Drive the SYNC pin low to enter diode emulation
mode. In diode emulation mode, the LSFET is
off after inductor current crossed zero current.
When HSFET over current is detected, the part
will latch off. Recycling VIN/VDD or toggling EN
will release the latch and restart the device.
When the LSFET detects -25A current, the part
will turn off the LSFET for that cycle.
Current Sense
The CS pin is a bi-directional current source
proportional to the inductor current. Use the
following equations to select the RIN resistance
to connect between RIN pin and IN pin:
RIN = −7.55 IL_ RIPPLE + 170(k)
The CS voltage range of 1V to 3.5V is required to
keep CS’s output current linearly proportional to
inductor current. Use the following equations to
determine a proper reference voltage and/or R CS
value:
1V ICS RCS + VREF 3.5V
ICS = IL 10 10−6
Intelli-Phase’s current sense output can be used
by controller to accurately monitor the output
current. The cycle-by-cycle current information
from CS pin can be used for phase current
balancing, over current protection and active
voltage positioning (output voltage droop).
Intelli-Phase’s accurate current sense can
replace traditional inductor DCR current sensing
scheme. In traditional inductor DCR current
sense:
VCS = IL RDCR
With Intelli-Phase’s CS output, VCS becomes:
VCS = ICS RCS = IL RCS 10 10−6
t ON (VIN − VOUT ) VOUT (VIN − VOUT )
=
L
VIN FSW L
Where
the
RDCR
term
is
replaced
−6
with RCS 10 10 . Figure 2 shows a circuit
replacing inductor DCR sensing with IntelliPhase’s CS output. There are several
advantages with this current sensing method:
Where IL_RIPPLE is the peak to peak inductor ripple
current. For example, if the ripple current is 10A,
then the calculated RIN is 94.5kΩ and 95.3kΩ (the
closest 1% resistor value) should be selected for
RIN.
1. Since current sensing is done by IntelliPhase, user can select low DCR
inductors and still have large current
sense signal by selecting larger RCS.
IL _ RIPPLE =
The current sense gain is 10μA/A. In general,
there is a resistor, RCS, connected from CS pin
and VOUT or an external voltage which is capable
to sink small current to provide enough voltage
shift to meet the operating voltage on CS pin.
2. Tight DCR variation is not required.
3. CS signal is independent of impedance
matching and inductor temperature.
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
9
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
Inductor DCR Current Sense
IL
Vin
DrMOS
L
Vin
DCR
SW
GND
R
PWM
VL1
VOUT
C OUT
C
PWM
VCS
Intelli-Phase Current Sense
Vin
ICS
IL
Intelli-Phase
Vin
CS
L
SW
C OUT
GND
PWM
VCS
VOUT
RCS
PWM
Vout (or other reference voltage)
Figure 2: Replacing DCR Current Sense with Intelli-Phase’s CS Output
Junction Temperature Sense
The VTEMP pin is a voltage output proportional
to the junction temperature. The junction
temperature can be calculated from the following
equation:
TJUNCTION =
( VTEMP + 100mV ) ,
10mV
o
C
Be sure to measure this voltage between VTEMP
and AGND pins for the most accurate reading. In
multi-phase operation, the VTEMP pins of every
Intelli-Phase can be connected to the
temperature monitor pin of the controller. A
sample circuitry is shown in Figure 3. VTEMP
signals can also be used for system thermal
protection as shown in Figure 4.
for TJUNCTION>10oC
For example, if the VTEMP voltage is 700mV,
then the junction temperature of Intelli-Phase is
80oC. VTEMP can not go below 0V, so it will read
0V for junction temperature lower than 10 oC.
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
10
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
Intelli-Phase
Power Stage
Vin
IntelliPhase
Vin
L2
VOUT
VTEMP
Multi-Phase
Controller
C OUT
PWM
PWM2
Temperature
ADC
Vin
IntelliPhase
Vin
L1
VTEMP
PWM
PWM1
Figure 3: Multi-Phase Temperature Sense Utilization
Program R1 and R2 to set
the protection temperature
VTEMP1
For System Protection
R1
VTEMP2
NPN
R2
Figure 4: System Thermal Protection
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
11
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
PCB Layout Guide Line
2. Place the VDD decoupling capacitor close to
the device. Connect AGND and PGND at the
PCB layout plays an important role to achieve
point of VDD capacitor's ground connection.
stable operation. For optimal performance, follow
these guidelines. The sample layout at the end of
3. It is recommended to use 0.22µF to 1µF
these guidelines can be used as a layout
bootstrap capacitor and 3.3Ω bootstrap
reference.
resistance. Do not use capacitance values
below 100nF for the BST capacitor.
1. Always place some input bypass ceramic
capacitors next to the device and on the
4. Connect IN, SW and PGND to large copper
same layer as the device. Do not put all of
areas and use via to cool the chip to improve
the input bypass capacitors on the back side
thermal performance and long-term reliability.
of the device. Use as many via and input
5. Keep the path of switching current short and
voltage planes as possible to reduce
minimize the loop area formed by the input
switching spikes. Place the BST capacitor
capacitor. Keep the connection between the
and the VDRV capacitor as close to the
SW pin and the input power ground as short
device as possible.
and wide as possible.
Figure 5: Sample PCB Layout
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
12
SCLK
EN
FAULT#
RICCMAX
EN
ICC
MAX
FAULT#
VRHOT#
ADDR
IMON
ALERT#
SDIO
VRHOT#
RADDR
VRRDY
RIMON
VRRDY
ALERT#
SDIO
OTPG
COMP
RFS
FSET
RBOOT
RTMAX
MP2935
4-Phase VR12.5
PWM Controller
VBOOT
FB
SCLK
TMAX
IDROOP
VDD
RSLOPE
VOSEN
GND (PAD)
SLOPE
CCM
VCC
VIDFF
CPU
5V
RAAM
VOUT
VTT
IREF
AAM
GNDSEN
PGND
VIN
TEMP
OCPSET
PWM1
PWM2
PWM3
PWM4
VCM
CS4
CS3
CS2
CS1
5V
5V
5V
5V
AGND
VTEMP
SYNC
CS
BST
VIN
BST
PGND
SW
VIN
BST
PGND
SW
PGND
SW
Intelli-Phase
PWM
EN
VDRV
VDD
AGND
VTEMP
SYNC
CS
VIN
PGND
SW
Intelli-Phase
PWM
EN
VDRV
VDD
AGND
VTEMP
SYNC
CS
BST
Intelli-Phase
PWM
EN
VDRV
VDD
AGND
VTEMP
SYNC
CS
VIN
Intelli-Phase
PWM
EN
VDRV
VDD
VIN
VIN
VIN
VIN
PGND
VOUT
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
TYPICAL APPLICATION CIRCUITS
Figure 6: MP2935+Intelli-Phase Application Circuit
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
13
OTPD
MP86885 – INTELLI-PHASE SOLUTION IN 4x6mm TQFN
NOT RECOMMENDED FOR NEW DESIGNS. REFER TO MP86905
PACKAGE INFORMATION
FC-TQFN (4mm x 6mm)
PIN 1 ID
0.20X45º TYP
PIN 1 ID
MARKING
PIN 1 ID
INDEX AREA
TOP VIEW
BOTTOM VIEW
SIDE VIEW
NOTE:
0.20x45°
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) EXPOSED PADDLE SIZE DOES NOT INCLUDE
MOLD FLASH.
3) LEAD COPLANARITY SHALL BE 0.10
MILLIMETERS MAX.
4) JEDEC REFERENCE IS MO-220.
5) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP86885 Rev. 1.01
www.MonolithicPower.com
8/31/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
14
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