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MP8718EN-LF-Z

MP8718EN-LF-Z

  • 厂商:

    MPS(美国芯源)

  • 封装:

    SOIC8

  • 描述:

    IC REG BUCK ADJUSTABLE 4A 8SOIC

  • 数据手册
  • 价格&库存
MP8718EN-LF-Z 数据手册
MP8718 High Efficiency 4A, 21V, 500kHz Synchronous Step-down Converter The Future of Analog IC Technology DESCRIPTION FEATURES The MP8718 is a high frequency synchronous rectified step-down switch mode converter with built in internal power MOSFETs. It offers a very compact solution to achieve 4A continuous output current over a wide input supply range with excellent load and line regulation. The MP8718 has synchronous mode operation for higher efficiency over output current load range. • • • • • • • • • • • • • Current mode operation provides fast transient response and eases loop stabilization. Full protection features include OCP and thermal shut down. The MP8718 requires a minimum number of readily available standard external components and is available in a space saving 8-pin SOIC package with an exposed pad. Wide 4.5V to 21V Operating Input Range 4A Output Current Low Rds(on) Internal Power MOSFETs Proprietary Switching Loss Reduction Technique High Efficiency Synchronous Mode Operation Fixed 500kHz Switching Frequency Sync from 300kHz to 2MHz External Clock 1.5ms Internal Soft-Start Internal Compensation OCP Protection and Hiccup Thermal Shutdown Output Adjustable from 0.8V Available in a Thermally Enhanced 8-pin SOIC package APPLICATIONS • • • • • • Notebook Systems and I/O Power Networking Systems Digital Set Top Boxes Personal Video Recorders Flat Panel Television and Monitors Distributed Power Systems “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. The information in this datasheet about the product and its associated technologies are proprietary and intellectual property of Monolithic Power Systems and are protected by copyright and pending patent applications TYPICAL APPLICATION Efficiency VOUT=1.2V 21 VIN 100 1 IN BST 4 V IN=5V 90 SW 7 VCC ON/OFF VOUT 1.2V MP8718 R1 4.99k FB 5 2,3 EN/SYNC 6 Rt 47k R2 10k EFFICIENCY (%) 80 70 V IN=21V 60 V IN=12V 50 40 30 20 GND 10 8 0 0 1 2 3 4 OUTPUT CURRENT (A) MP8718 Rev. 0.9 4/12/2016 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 1 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ORDERING INFORMATION Part Number* Package Top Marking Free Air Temperature (TA) MP8718EN SOIC8E MP8718EN -20°C to +85°C * For Tape & Reel, add suffix –Z (e.g. MP8718EN–Z); For RoHS compliant packaging, add suffix –LF; (e.g. MP8718EN–LF–Z) PACKAGE REFERENCE TOP VIEW IN 1 8 GND SW 2 7 VCC SW 3 6 FB BST 4 5 EN/SYNC EXPOSED PAD ON BACKSIDE CONNECT TO GND ABSOLUTE MAXIMUM RATINGS (1) Supply Voltage VIN ....................................... 22V VSW ........................-0.3V (-5V for < 10ns) to 23V VBS ....................................................... VSW + 6V All Other Pins ..................................-0.3V to +6V Operating Temperature.............. -20°C to +85°C (2) Continuous Power Dissipation (TA = +25°C) ……………………………………………....2.5W Junction Temperature ...............................150°C Lead Temperature ....................................260°C Storage Temperature............... -65°C to +150°C Recommended Operating Conditions (3) Thermal Resistance (4) θJA θJC SOIC8E (Exposed Pad) ..........50 ...... 10 ... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 3) The device is not guaranteed to function outside of its operating conditions. 4) Measured on JESD51-7, 4-layer PCB. Supply Voltage VIN ...........................4.5V to 21V Operating Junct. Temp (TJ)...... -20°C to +125°C MP8718 Rev. 0.9 4/12/2016 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 2 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ELECTRICAL CHARACTERISTICS VIN = 12V, TA = +25°C, unless otherwise noted. Parameters Supply Current (Shutdown) Supply Current (Quiescent) HS Switch On Resistance (5) LS Switch On Resistance (5) Switch Leakage Current Limit (5) Oscillator Frequency Fold-back Frequency Maximum Duty Cycle Sync Frequency Range Symbol IIN IQ HSRDS-ON LSRDS-ON SWLKG ILIMIT FSW FFB DMAX FSYNC Feedback Voltage VFB Feedback Current EN Rising Threshold EN Threshold Hysteresis IFB EN Input Current Min VEN = 0V, VSW = 0V or 12V VFB = 0.75V VFB = 300mV VFB = 700mV 425 TA = -20°C to +85°C VFB = 800mV 789 VEN_RISING VEN_HYS IEN EN Turn Off Delay VIN Under Voltage Lockout Threshold Rising VIN Under Voltage Lockout Threshold Hysteresis VCC Regulator VCC Load Regulation Soft-Start Period Thermal Shutdown Condition VEN = 0V VEN = 2V, VFB = 1V 85 0.3 1.1 VEN = 2V VEN = 0V ENTd-Off 3.8 INUVVth INUVHYS VCC Icc=2mA TSD Typ 2 Units μA mA mΩ mΩ μA A kHz fSW % MHz 805 821 mV 10 1.3 0.4 2 0 5 50 1.6 nA V V 4.0 4.2 0.7 120 20 0 6.1 500 0.25 90 Max 10 10 575 μA μs V 880 mV 5 5 1.5 150 V % ms °C 2 Note: 5) Guaranteed by design. MP8718 Rev. 0.9 4/12/2016 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 3 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PIN FUNCTIONS Pin # 1 2,3 4 5 6 7 8 MP8718 Rev. 0.9 4/12/2016 Name Description Supply Voltage. The MP8718 operates from a +4.5V to +21V input rail. C1 is needed to decouple the input rail. Use wide PCB trace to make the connection. SW Switch Output. Use wide PCB trace to make the connection. Bootstrap. A capacitor connected between SW and BS pins is required to form a BST floating supply across the high-side switch driver. EN=1 to enable the chip. External clock can be applied to EN pin for changing EN/SYNC switching frequency. For automatic start-up, connect EN pin to VIN by proper EN resistor divider as Figure 2 shows. Feedback. An external resistor divider from the output to GND, tapped to the FB pin, sets the output voltage. To prevent current limit run away during a short FB circuit fault condition the frequency fold-back comparator lowers the oscillator frequency when the FB voltage is below 500mV. Bias Supply. Decouple with 0.1uF~0.22μF cap. And the capacitance should be VCC no more than 0.22μF System Ground. This pin is the reference ground of the regulated output voltage. GND, For this reason care must be taken in PCB layout. Suggested to be connected to Exposed Pad GND with copper and vias. IN www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 4 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS VIN = 12V, VOUT = 1.2V, L=1.8μH, TA = +25ºC, unless otherwise noted. Disabled Supply Current vs Input Voltage Enabled Supply Current vs Input Voltage 750 0.2 745 0.15 740 735 5.5 5 0.1 725 0 720 -0.05 715 710 VCC (V) 0.05 730 VEN=0V -0.15 VFB=1V 3.5 -0.2 700 5 10 15 20 25 0 5 10 15 20 Peak Current vs Duty Cycle 100 6.6 6.4 6.2 6 5.8 5.6 5.4 5.2 5 Dmax Limit 10 1 Minimum on time Limit 0.1 0 10 20 30 40 50 60 70 80 90100 0 5 DUTY CYCLE (%) 10 15 10 15 20 25 Load Regulation Operating Range OUTPUT VOLTAGE (V) PEAK CURRENT (A) 5 INPUT VOLTAGE (V) 6.8 20 25 INPUT VOLTAGE (V) 0.4 0.3 VIN=4.5V 0.2 0.1 0.0 -0.1 VIN=21V VIN=12V -0.2 -0.3 -0.4 0 0.5 1 1.5 2 2.5 3 3.5 4 OUTPUT CURRENT (A) Case Temperature Rise vs. Output Current Line Regulation NORMALIZED OUTPUT VOLTAGE(%) 0 25 INPUT VOLTAGE (V) INPUT VOLTAGE (V) NORMALIZED OUTPUT VOLTAGE(%) 0 4.5 4 -0.1 705 7 Vcc Regulator Line Regulation 0.3 25 0.2 20 IO=0A 0.1 15 0.0 IO=2A 10 -0.1 IO=4A -0.2 5 -0.3 0 0 5 10 15 20 INPUT CURRENT (V) MP8718 Rev. 0.9 4/12/2016 25 0 1 2 3 4 5 OUTPUT CURRENT (A) www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 5 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS (continues) VIN = 12V, VOUT = 1.2V, L=1.8μH, TA = +25ºC, unless otherwise noted. Efficiency Efficiency VOUT=1.2V 100 VOUT=1.8V 100 V IN=5V 90 80 80 70 V IN=21V 60 EFFICIENCY (%) EFFICIENCY (%) V IN=5V 90 V IN=12V 50 40 30 20 10 V IN=21V 70 60 V IN=12V 50 40 30 20 10 0 0 1 2 3 0 4 0 Efficiency 100 90 90 80 V IN=5V EFFICIENCY (%) EFFICIENCY (%) 60 V IN=12V 50 40 30 20 V IN=21V 70 V IN=5V V IN=12V 60 50 40 30 20 10 10 0 0 0 MP8718 Rev. 0.9 4/12/2016 4 VOUT=3.3V 100 V IN=21V 3 Efficiency VOUT=2.5V 70 2 OUTPUT CURRENT (A) OUTPUT CURRENT (A) 80 1 1 2 3 OUTPUT CURRENT (A) 4 0 1 2 3 4 OUTPUT CURRENT (A) www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 6 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS TYPICAL PERFORMANCE CHARACTERISTICS (continues) VIN = 12V, VOUT = 1.2V, L=1.8μH, TA = +25ºC, unless otherwise noted. Short Entry Power up without Load Short Recovery VOUT 1V/div VOUT 1V/div VOUT 1V/div VSW 10V/div VSW 10V/div VSW 10V/div VIN 10V/div IINDUCTOR 5A/div IINDUCTOR 5A/div IINDUCTOR 5A/div Power up with 4A Load 1ms/div 1ms/div Enable Startup without Load Enable Startup with 4A Load VOUT 1V/div VOUT 1V/div VOUT 1V/div VSW 10V/div VSW 10V/div VSW 10V/div VIN 10V/div VEN 5V/div VEN 5V/div IINDUCTOR 5A/div IINDUCTOR 5A/div IINDUCTOR 5A/div 1ms/div 1ms/div Input Ripple Voltage Output Ripple Voltage IOUT=4A IOUT=4A VIN/AC 100mV/div VOUT/AC 10mV/div VSW 10V/div VSW 5V/div MP8718 Rev. 0.9 4/12/2016 IINDUCTOR 2A/div 1ms/div Load Transient Response IOUT=2A to 4A VOUT/AC 50mV/div VSW 10V/div ILOAD 2A/div www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 7 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS BLOCK DIAGRAM IN + VCC Regulator VCC Current Sense Amplifer BOOST Regulator Oscillator BST HS Driver LOGIC M1 + SW - Reference 1MEG FB LS Driver 400K + + Error Amplifier M2 + PWM Comparator LS ILIM Comparator - 50pF + EN/SYNC VCC Current Limit Comparator 1pF GND Figure 1—Functional Block Diagram MP8718 Rev. 0.9 4/12/2016 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 8 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS OPERATION The MP8718 is a high frequency synchronous rectified step-down switch mode converter with built in internal power MOSFETs. It offers a very compact solution to achieve 4A continuous output current over a wide input supply range with excellent load and line regulation. The MP8718 operates in a fixed frequency, peak current control mode to regulate the output voltage. A PWM cycle is initiated by the internal clock. The integrated high-side power MOSFET is turned on and remains on until its current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle starts. If, in 90% of one PWM period, the current in the power MOSFET does not reach the COMP set current value, the power MOSFET will be forced to turn off Internal Regulator Most of the internal circuitries are powered from the 5V internal regulator. This regulator takes the VIN input and operates in the full VIN range. When VIN is greater than 5.0V, the output of the regulator is in full regulation. When VIN is lower than 5.0V, the output decreases, a 0.1uF ceramic capacitor for decoupling purpose is required. Error Amplifier The error amplifier compares the FB pin voltage with the internal 0.805V reference (REF) and outputs a current proportional to the difference between the two. This output current is then used to charge or discharge the internal compensation network to form the COMP voltage, which is used to control the power MOSFET current. The optimized internal compensation network minimizes the external component counts and simplifies the control loop design. Enable/Sync Control EN/Sync is a digital control pin that turns the regulator on and off. Drive EN high to turn on the regulator, drive it low to turn it off. There is an internal 1MEG resistor from EN/Sync to GND thus EN/Sync can be floated to shut down the chip. 1) Enabled by external logic H/L signal The chip starts up once the enable signal goes higher than EN/SYNC input high voltage (2V), and is shut down when the signal is lower than MP8718 Rev. 0.9 4/12/2016 EN/SYNC input low voltage (0.4V). To disable the chip, EN must be pulled low for at least 5µs. The input is compatible with both CMOS and TTL. 2) Enabled by Vin through voltage divider. Connect EN with Vin through a resistive voltage divider for automatic startup as the figure 2 shows. VIN REN1 EN REN2 Figure 2—Enable Divider Circuit Choose the value of the pull-up resistor REN1 and pull-down resistor REN2 to reset the automatic start-up voltage: VIN_START = VEN_RISING ⋅ Where VEN_RISING is 1.3V VIN_STOP = VEN-FALLING ⋅ (REN1 + REN2 || 1MΩ) REN2 || 1MΩ (REN1 + REN2 || 1MΩ) REN2 || 1MΩ Where VEN_FALLING is 0.9V For example, REN1=100kΩ and REN2=20kΩ, the VIN-START is set at 7.9V, VIN-STOP is set at 5.49V. The startup sequence is as below using the EN divider. VCC-Rising is the VCC UVLO rising threshold which is about 4.0V. Figure 3—Startup Sequence Using EN Divider 3) Synchronized by External Sync Clock Signal The chip can be synchronized to external clock range from 300kHz up to 2MHz through this pin 2ms right after output voltage is set, with the www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 9 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS internal clock rising edge synchronized to the external clock rising edge. Figure 4—Startup Sequence Using External Sync Clock Signal Under-Voltage Lockout (UVLO) Under-voltage lockout (UVLO) is implemented to protect the chip from operating at insufficient supply voltage. The MP8718 UVLO comparator monitors the output voltage of the internal regulator, VCC. The UVLO rising threshold is about 4.0V while its falling threshold is a consistent 3.2V. Internal Soft-Start The soft-start is implemented to prevent the converter output voltage from overshooting during startup. When the chip starts, the internal circuitry generates a soft-start voltage (SS) ramping up from 0V to 1.2V. When it is lower than the internal reference (REF), SS overrides REF so the error amplifier uses SS as the reference. When SS is higher than REF, REF regains control. The SS time is internally fixed to 4ms. Over-Current-Protection and Hiccup The MP8718 has cycle-by-cycle over current limit when the inductor current peak value exceeds the set current limit threshold. Meanwhile, output voltage starts to drop until FB is below the UnderVoltage (UV) threshold, typically 30% below the reference. Once a UV is triggered, the MP8718 enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is dead-short to ground. The average short circuit current is greatly reduced to alleviate the thermal issue and to protect the regulator. The MP8718 exits the hiccup mode once the over current condition is removed. MP8718 Rev. 0.9 4/12/2016 Thermal Shutdown Thermal shutdown is implemented to prevent the chip from operating at exceedingly high temperatures. When the silicon die temperature is higher than 150°C, it shuts down the whole chip. When the temperature is lower than its lower threshold, typically 140°C, the chip is enabled again. Floating Driver and Bootstrap Charging The floating power MOSFET driver is powered by an external bootstrap capacitor. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 2.2V with a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, M3, C4, L1 and C2 (Figure 2). If (VIN-VSW) is more than 5V, U2 will regulate M3 to maintain a 5V BST voltage across C4. SW Figure 2—Internal Bootstrap Charging Circuit Startup and Shutdown If both VIN and EN are higher than their appropriate thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides stable supply for the remaining circuitries. Three events can shut down the chip: EN low, VIN low and thermal shutdown. In the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 10 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS APPLICATION INFORMATION Setting the Output Voltage The external resistor divider is used to set the output voltage (see Typical Application on page 1). The feedback resistor R1 also sets the feedback loop bandwidth with the internal compensation capacitor (see Typical Application on page 1). Choose R1 to be around 40.2kΩ for optimal transient response. R2 is then given by: R2 = 1 VOUT −1 VFB R1 Rt VOUT R2 Figure 3— T-type Network Table 1 lists the recommended T-type resistors value for common output voltages. Table 1—Resistor Selection for Common Output Voltages VOUT (V) 1.05 1.2 1.5 1.8 2.5 3.3 5 R1 (kΩ) 4.99 4.99 4.99 4.99 82 82.5 54.9 R2 (kΩ) 16.5 10.2 5.76 4.02 39.2 26.7 10.5 Rt (kΩ) 47 47 47 47 0 0 0 L (μH) 1-4.7 1-4.7 1-4.7 1-4.7 1-4.7 1-4.7 1-4.7 COUT (μF, Ceramic) 47 47 47 47 47 47 47 Note: The above feedback resistor table applies to a specific load capacitor condition as shown in the table 1. Other capacitive loading conditions will require different values. Selecting the Inductor A 1µH to 10µH inductor with a DC current rating of at least 25% percent higher than the maximum load current is recommended for most applications. For highest efficiency, the inductor DC resistance should be less than 15mΩ. For most designs, the inductance value can be derived from the following equation. MP8718 Rev. 0.9 4/12/2016 VOUT × ( VIN − VOUT ) VIN × ΔIL × f OSC Where ΔIL is the inductor ripple current. Choose inductor ripple current to be approximately 30% if the maximum load current, 4A. The maximum inductor peak current is: IL(MAX ) = ILOAD + R1 The T-type network is highly recommended when Vo is low, as Figure 3 shows. FB L= ΔI L 2 Under light load conditions below 100mA, larger inductance is recommended for improved efficiency. Selecting the Input Capacitor The input current to the step-down converter is discontinuous, therefore a capacitor is required to supply the AC current to the step-down converter while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Ceramic capacitors with X5R or X7R dielectrics are highly recommended because of their low ESR and small temperature coefficients. For most applications, a 22µF capacitor is sufficient. Since the input capacitor (C1) absorbs the input switching current it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated by: I C1 = ILOAD × VOUT ⎛⎜ VOUT × 1− VIN VIN ⎜⎝ ⎞ ⎟ ⎟ ⎠ The worse case condition occurs at VIN = 2VOUT, where: IC1 = ILOAD 2 For simplification, choose the input capacitor whose RMS current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum or ceramic. When electrolytic or tantalum capacitors are used, a small, high quality ceramic capacitor, i.e. 0.1μF, should be placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated by: www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 11 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS ⎛ I V V ΔVIN = LOAD × OUT × ⎜⎜1 − OUT fS × C1 VIN ⎝ VIN Selecting the Output Capacitor The output capacitor (C2) is required to maintain the DC output voltage. Ceramic, tantalum, or low ESR electrolytic capacitors are recommended. Low ESR capacitors are preferred to keep the output voltage ripple low. The output voltage ripple can be estimated by: ΔVOUT ⎛ V V = OUT × ⎜⎜1 − OUT fS × L ⎝ VIN 3) Ensure all feedback connections are short and direct. Place the feedback resistors and compensation components as close to the chip as possible. 4) Route SW away from sensitive analog areas such as FB. 5) Connect IN, SW, and especially GND respectively to a large copper area to cool the chip to improve thermal performance and long-term reliability. 6) Adding RC snubber circuit from IN pin to SW pin can reduce SW spikes. ⎞ ⎟⎟ ⎠ ⎞ ⎞ ⎛ 1 ⎟ ⎟⎟ × ⎜ R ESR + ⎜ 8 × f S × C2 ⎟⎠ ⎠ ⎝ ΔVOUT = 8 × fS 2 In the case of tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated to: ΔVOUT = VOUT ⎛ V × ⎜1 − OUT f S × L ⎜⎝ VIN 4 C4 5 3 6 Rt 2 7 1 8 ⎞ ⎛ V × ⎜⎜1 − OUT ⎟⎟ VIN ⎠ × L × C2 ⎝ VOUT C 3 In the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. The output voltage ripple is mainly caused by the capacitance. For simplification, the output voltage ripple can be estimated by: R 1 Where L is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. Top Layer ⎞ ⎟⎟ × R ESR ⎠ The characteristics of the output capacitor also affect the stability of the regulation system. The MP8718 can be optimized for a wide range of capacitance and ESR values. PCB Layout PCB layout is very important to achieve stable operation. Please follow these guidelines and take Figure 4 for references. 1) Keep the connection of input ground and GND pin as short and wide as possible. 2) Keep the connection of input capacitor and IN pin as short and wide as possible. Bottom Layer Figure 4—PCB Layout MP8718 Rev. 0.9 4/12/2016 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 12 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS External Bootstrap Diode An external bootstrap diode may enhance the efficiency of the regulator, the applicable conditions of external BST diode is: z Duty cycle is high: D= VOUT >65% VIN In this case, an external BST diode is recommended from the VCC pin to BST pin, as shown in Figure 5 BST MP8718 SW External BST Diode IN4148 VCC CBST L COUT Figure 5—Add Optional External Bootstrap Diode to Enhance Efficiency The recommended external BST diode is IN4148, and the BST cap is 0.1~1µF. MP8718 Rev. 0.9 4/12/2016 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 13 MP8718 – SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PACKAGE INFORMATION SOIC8E (EXPOSED PAD) 0.189(4.80) 0.197(5.00) 0.124(3.15) 0.136(3.45) 8 5 0.150(3.80) 0.157(4.00) PIN 1 ID 1 0.228(5.80) 0.244(6.20) 0.089(2.26) 0.101(2.56) 4 TOP VIEW BOTTOM VIEW SEE DETAIL "A" 0.051(1.30) 0.067(1.70) SEATING PLANE 0.000(0.00) 0.006(0.15) 0.013(0.33) 0.020(0.51) 0.0075(0.19) 0.0098(0.25) SIDE VIEW 0.050(1.27) BSC FRONT VIEW 0.010(0.25) x 45o 0.020(0.50) GAUGE PLANE 0.010(0.25) BSC 0.050(1.27) 0.024(0.61) 0o-8o 0.016(0.41) 0.050(1.27) 0.063(1.60) DETAIL "A" 0.103(2.62) 0.138(3.51) RECOMMENDED LAND PATTERN 0.213(5.40) NOTE: 1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. 4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.004" INCHES MAX. 5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION BA. 6) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP8718 Rev. 0.9 4/12/2016 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. 14
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