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MP8761GL-P

MP8761GL-P

  • 厂商:

    MPS(美国芯源)

  • 封装:

    VFQFN13

  • 描述:

    IC REG BUCK ADJUSTABLE 8A 16QFN

  • 数据手册
  • 价格&库存
MP8761GL-P 数据手册
MP8761 EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 77 R 0 High Efficiency, 8A, 18V, Synchronous, Step-Down Converter DESCRIPTION FEATURES The MP8761 is a fully-integrated, highfrequency, synchronous, rectified, step-down, switch-mode converter. It offers a very compact solution to achieve a 8A output current over a wide input-supply range with excellent load and line regulation. The MP8761 operates at high efficiency over a wide output-current load range.  The MP8761 uses Constant-On-Time (COT) control mode to provide fast transient response and ease loop stabilization. An external resistor programs the operating frequency from 200kHz to 1MHz. The frequency stays nearly constant as the input supply varies with the feed-forward compensation. The default under voltage lockout threshold is internally set at less than 4.1V, but a resistor network on the enable pin can increase this threshold. The soft start pin controls the output voltage startup ramp. An open drain power good signal indicates that the output is within nominal voltage range. R It has full integrated protection features that include over-current protection, over-voltage protection and thermal shutdown. N O T The MP8761 is available in a 3mm×4mm QFN package, and requires a minimal number of readily-available components.            2.5V to 18V Operating Input Range with External 5V Bias 4.5V to 18V Operating Input Range with Internal Bias 8A Output Current Low RDS(ON) Internal Power MOSFETs Proprietary Switching-Loss-Reduction Technique Adaptive COT for Ultrafast Transient Response 1% Reference Voltage Over Junction Temperature Range (0°C to +125°C) Programmable Soft-Start Time Pre-Bias Start-Up Programmable Switching Frequency from 200kHz to 1MHz Non-Latch OCP, OVP, and Thermal Shutdown Output Adjustable from 0.611V to 13V APPLICATIONS       Set-Top Boxes XDSL Modem/DSLAM Small-Cell Base Stations Personal Video Recorders Flat-Panel Televisions and Monitors Distributed Power Systems All MPS parts are lead-free, halogen free, and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION MP8761 Rev. 1.3 4/14/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 1 MP8761 — 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER ORDERING INFORMATION Package Top Marking MP8761GL* QFN-13 (3mm×4mm) MP8761 MP8761GLE** QFN-16 (3mm×4mm) MP8761E EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 77 R 0 Part Number * For Tape & Reel, add suffix –Z (e.g. MP8761GL–Z) ** For Tape & Reel, add suffix –Z (e.g. MP8761GLE–Z) Note: The 16-pin QFN package is preferred and recommended for new designs PACKAGE REFERENCE TOP VIEW TOP VIEW EN 1 FREQ 2 FB 3 SS 4 AGND 5 PG 6 VCC 7 BST 8 IN PGND 14 13 15 13-Pin QFN (3x4mm) Not Recommended for New Design ABSOLUTE MAXIMUM RATINGS (1) N O T R Supply Voltage VIN .......................................21V VSW ...................................... −0.3V to VIN + 0.3V VSW (30ns) ................................. −3V to VIN + 3V VBST .....................................................VSW + 6V Enable Current IEN(2) ..................................................... 2.5mA All Other Pins ................................ –0.3V to +6V Continuous Power Dissipation (TA=+25°)(3) QFN3×4 .....................................................2.7W Junction Temperature .............................. 150°C Lead Temperature ................................... 260°C Storage Temperature .............. −65°C to +150°C Recommended Operating Conditions (4) Supply Voltage VIN .......................... 4.5V to 18V Output Voltage VOUT.................... 0.611V to 13V IEN ................................................ 0mA to 1mA Operating Junction Temp. (TJ).−40°C to +125°C MP8761 Rev. 1.3 4/14/2020 PGND 12 16 SW SW 9 10 IN PGND 11 PGND 16-Pin QFN (3x4mm) Recommended for New Design Follow Layout Performance Recommendation Thermal Resistance (5) θJA for Best θJC QFN (3×4mm) ........................ 46 ....... 9 .... °C/W Notes: 1) Exceeding these ratings may damage the device. 2) Refer to the section “Configuring the EN Control”. 3) The maximum allowable power dissipation is a function of the maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/θJA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 2 MP8761 — 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER ELECTRICAL CHARACTERISTICS EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 77 R 0 VIN = 12V, TJ = +25°C, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units 0 1 μA 860 1000 μA Supply Current Supply Current (Shutdown) IIN VEN = 0V Supply Current (Quiescent) IIN VEN = 2V, VFB = 1V 760 MOSFET High-Side Switch-On Resistance HSRDS-ON TJ =25°C 28 mΩ Low-Side Switch-On Resistance LSRDS-ON TJ =25°C 16 mΩ VEN = 0V, VSW = 0V or 12V 0 1 μA Switch Leakage SW LKG Current Limit Low-Side Valley Current Limit(6) Low-Side Negative Current Limit(6) Timer One-Shot ON Time Minimum ON Time(6) Minimum OFF Time(6) ILIMIT_VALLEY 8 10 12 A ILIMIT_NEGATIVE -4 -2.5 -1 A τON RFREQ=453kΩ, VOUT=1.2V 250 ns τON_MIN 30 ns τOFF_MIN 360 ns Over-Voltage and Under-Voltage Protection OVP Non-Latch Threshold VOVP_NON- 117% LATCH 120% 123% VFB OVP Delay τOVP 2 μs UVP Threshold(6) VUVP 50% VFB R Reference And Soft-Start N O T Reference Voltage VREF TJ = -40°C to +125°C (7) 602 611 620 TJ = 0°C to +125°C (7) 605 611 617 TJ = +25°C 605 611 617 50 100 nA 16 20 25 μA 1.1 1.3 1.5 V Feedback Current IFB VFB = 650mV Soft-Start Charging Current ISS VSS=0V mV Enable And UVLO Enable Input High Voltage VIHEN Enable Hysteresis VEN-HYS Enable Input Current MP8761 Rev. 1.3 4/14/2020 IEN 250 VEN = 2V 0 VEN = 0V 0 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. mV μA 3 MP8761 — 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER ELECTRICAL CHARACTERISTICS (continued) EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 77 R 0 VIN = 12V, TJ = +25°C, unless otherwise noted. Parameters Symbol Condition Min Typ Max Units 3.75 3.9 4.05 V VCC Regulator VCC Under-Voltage Lockout Threshold Rising VCC Under-Voltage Lockout Threshold Hysteresis VCC Regulator VCCVth VCCHYS 500 VCC VCC Load Regulation 4.65 Icc=5mA 4.8 mV 4.95 0.5 V % Power Good Power-Good, Rising Threshold PGVth-Hi Power-Good, Falling Threshold PGVth-Lo 80% VFB Power-Good, Low-to-High Delay PGTd 2.5 ms Power Good, Sink Current Capability Power Good, Leakage Current 87% VPG Sink 4mA IPG_LEAK VPG = 3.3V 91% 10 94% VFB 0.4 V 100 nA Thermal Protection Thermal Shutdown(6) TSD Thermal Shutdown Hysteresis(6) 150 °C 25 °C N O T R Note: 6) Guaranteed by design. 7) Not production test, guaranteed by characterization MP8761 Rev. 1.3 4/14/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 4 MP8761 — 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER PIN FUNCTIONS 1 2 3 4 5 6 7 8 1 EN 2 FREQ 3 FB 4 SS 5 AGND 6 PG 7 VCC 8 BST 15, 16 SW R 9, 10 Name N O T 11, 12 13 Description EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 77 R 0 PIN # PIN# 13-Pin QFN 16-Pin QFN MP8761 Rev. 1.3 4/14/2020 10, 11, 12, 13 PGND 9,14 IN Enable. Digital input to turn the regulator ON or OFF. Drive EN HIGH to turn on the regulator. Drive it LOW to turn it off. Connect EN to IN through a pull-up resistor or a resistive voltage divider for automatic startup. Do not float this pin. Frequency Set. Requires a resistor connected between FREQ and IN to set the switching frequency. The input voltage and the resistor connected to the FREQ pin determine the ON time. The connection to the IN pin provides line feed-forward and stabilizes the frequency during input voltage variation. Feedback. Connect to the tab of an external resistor divider from the output to GND to set the output voltage. FB is also configured to realize overvoltage protection (OVP) by monitoring output voltage. Place the resistor divider as close to FB pin as possible. Avoid using vias on the FB traces. Soft-Start. Connect an external capacitor to program the soft start time for the switch mode regulator. Analog ground. The control circuit reference. Power Good, the output is an open drain signal. Require a pull-up resistor to a DC voltage to indicate high if the output voltage exceeds 91% of the nominal voltage. There is a delay from FB ≥ 91% to PG goes high. Internal 4.8V LDO output. Power the driver and control circuits. 5V external bias can disable the internal LDO. Decoupling with ≥1µF ceramic capacitor as close to the pin as possible. Use X7R or X5R dielectric ceramic capacitors for their stable temperature characteristics. Bootstrap. Require a capacitor connected between SW and BST pins to form a floating supply across the high-side switch driver. Switch Output. Connect to the inductor and bootstrap capacitor. The highside switch drives the pin up to the VIN voltage during PWM duty cycle’s ON time. The inductor current drives the SW pin negative during the OFF-time. The low-side switch’s ON-resistance and the internal Schottky diode clamp the negative voltage. Connect using wide PCB traces System Ground. Reference ground of the regulated output voltage. PCB layout requires extra care. Connect using wide PCB traces. Supply Voltage. Supplies power to the internal MOSFET and regulator. The MP8761 operates from a +2.5V to +18V input rail with 5V external bias and a +4.5V to +18V input rail with internal bias. Requires an input decoupling capacitor. Connect using wide PCB traces and multiple vias. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 5 MP8761 — 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL CHARACTERISTICS N O T R EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 77 R 0 VIN = 12V, VOUT = 1V, L = 1µH, TA = 25°C, unless otherwise noted. MP8761 Rev. 1.3 4/14/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 6 MP8761 — 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL CHARACTERISTICS (continued) N O T R EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 77 R 0 VIN = 12V, VOUT = 1V, L = 1µH, TA = 25°C, unless otherwise noted. MP8761 Rev. 1.3 4/14/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 7 MP8761 — 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS N O T R EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 77 R 0 VIN = 12V, VOUT = 1V, L = 1µH, TA = 25°C, unless otherwise noted. MP8761 Rev. 1.3 4/14/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 8 MP8761 — 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) N O T R EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 77 R 0 VIN=12V, VOUT =1V, L=1µH, TA=+25°C, unless otherwise noted. MP8761 Rev. 1.3 4/14/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 9 MP8761 — 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) N O T R EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 77 R 0 VIN=12V, VOUT =1V, L=1µH, TA=+25°C, unless otherwise noted. MP8761 Rev. 1.3 4/14/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 10 MP8761 — 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER BLOCK DIAGRAM EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 77 R 0 IN FREQ VCC VCC EN LDO BST BIAS Minimum OFF Timer REFERENCE ON Timer BST HS Driver HS-FET LOGIC SS SW SOFT START VCC FB PG LS Driver FB Comparator UV PGOOD Comparator UV Detect Comparator OV LS-FET ZCD Current Modulator GND LS Current Limit AGND OV Detect Comparator N O T R Figure 1: Functional Block Diagram MP8761 Rev. 1.3 4/14/2020 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2020 MPS. All Rights Reserved. 11 MP8761 — 8A, 18V, SYNCHRONOUS STEP-DOWN CONVERTER OPERATION In CCM, the switching frequency is fairly constant and it is also called PWM mode. EC R NE O EF W M ER D ME E N TO SI D ED G M N P8 S FO 77 R 0 PWM Operation The MP8761 is a fully-integrated, synchronous, rectified, step-down, switch-mode converter. It uses constant-on-time (COT) control to provide a fast transient response and ease loop stabilization. At the beginning of each cycle, the high-side MOSFET (HS-FET) turns ON when the feedback voltage (VFB) drops below the reference voltage (VREF), which indicates an insufficient output voltage. The input voltage and the frequency-set resistor determine the ON period as follows: ON (ns)  6.1 RFREQ (k) VIN (V)  0.4 (1) After the ON period elapses, the HS-FET turns off. It turns ON again when VFB drops below VREF. By repeating this operation, the converter regulates the output voltage. The integrated lowside MOSFET (LS-FET) turns ON when the HSFET is OFF to minimize conduction loss and avoid a dead short (or shoot-through) between input and GND if both HS-FET and LS-FET turn on at the same time. An internally-generated dead-time (DT) between HS-FET OFF and LSFET ON or LS-FET OFF and HS-FET ON avoids shoot-through. Light-Load Operation As the load decreases, the inductor current decreases. The operation transitions from CCM to discontinuous-conduction-mode (DCM) when the inductor current reaches 0A. Figure 3 shows light-load operation. When VFB drops below VREF, HS-FET turns ON for a fixed interval determined by the one- shot ON-timer as per equation 1. When the HS-FET turns OFF, the LS-FET turns ON until the inductor current reaches zero. In DCM, the VFB does not reach VREF when the inductor current reaches zero: Instead, the LS-FET driver enters tri-state (high Z). A current modulator then controls the LS-FET and limits the inductor current to less than −1mA. Hence, the output capacitors discharge slowly to GND through LS-FET, and the HS-FET doesn’t turn ON as frequently as under heavy-load conditions, thus greatly improving light-load and no-load efficiency. This is called skip mode. Heavy-Load Operation N O T R Figure 3: Light-Load Operation Figure 2: Heavy-Load Operation When the output current is high and the inductor current is always above zero amps, it is called continuous-conduction-mode (CCM). Figure 2 shows the CCM operation. When VFB
MP8761GL-P 价格&库存

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