MP8770
17V, 8A, 700kHz, High-Efficiency,
Synchronous, Step-Down Converter
DESCRIPTION
FEATURES
The MP8770 is a fully integrated, highfrequency, synchronous, rectified, step-down,
switch-mode converter with internal power
MOSFETs. The MP8770 offers a very compact
solution that achieves 8A of continuous output
current with excellent load and line regulation
over a wide input range. The MP8770 uses
synchronous-mode
operation
for
higher
efficiency over the output current-load range.
Constant-on-time (COT) control operation
provides very fast transient response, easy loop
design, and very tight output regulation.
Full protection features include short-circuit
protection (SCP), over-current protection (OCP),
under-voltage protection (UVP), and thermal
shutdown.
The MP8770 requires a minimal number of
readily
available,
standard,
external
components and is available in a space-saving
QFN-16 (3mmx3mm) package.
Wide 3V to 17V Operating Input Range
8A Output Current
22mΩ/10mΩ Low RDS(ON) Internal Power
MOSFETs
100μA Quiescent Current
Output Adjustable from 0.6V
High-Efficiency Synchronous Mode
Operation
Pre-Biased Start-Up
Fixed 700kHz Switching Frequency
External Programmable Soft Start-Up Time
EN and Power Good for Power Sequencing
Over-Current Protection (OCP) and Hiccup
Thermal Shutdown
Available in a QFN-16 (3mmx3mm)
Package
APPLICATIONS
Security Cameras
Portable Devices, XDSL Devices
Digital Set-Top Boxes
Flat-Panel Television and Monitors
General Purposes
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive.
For MPS green status, please visit MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are registered trademarks
of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
Efficiency vs. Load Current
VOUT = 1V, L = 0.56μH, DCR = 1.5mΩ
100
95
EFFICIENCY(%)
90
85
80
75
70
VIN=5V
65
VIN=12V
60
0.0
MP8770 Rev. 1.1
7/10/2019
2.0
4.0
6.0
LOAD CURRENT(A)
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
8.0
1
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
MP8770GQ
Package
QFN-16 (3mmx3mm)
Top Marking
See Below
* For Tape & Reel, add suffix –Z (e.g. MP8770GQ–Z)
TOP MARKING
BAA: Product code of MP8770GQ
Y: Year code
LLL: Lot number
PACKAGE REFERENCE
TOP VIEW
QFN-16 (3mmx3mm)
MP8770 Rev. 1.1
7/10/2019
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
2
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
ABSOLUTE MAXIMUM RATINGS (1)
VIN .................................................. -0.3V to +20V
VSW ........................................ -0.3V (-5V < 10ns)
to VIN + 0.7V (23V < 10ns)
VBST........................................................ VSW + 4V
VEN ................................................................... VIN
All other pins ................................... -0.3V to +4V
Continuous power dissipation (TA = +25°C) (2)
..................................................................... 3.2W
Junction temperature ................................ 150°C
Lead temperature...................................... 260°C
Storage temperature ................... -65°C to 125°C
Recommended Operating Conditions (3)
Supply voltage (VIN) ............................ 3V to 17V
Output voltage (VOUT) ............. .0.6V to VIN * DMAX
or 12V max
Operating junction temp. (TJ) ....-40°C to +125°C
MP8770 Rev. 1.1
7/10/2019
Thermal Resistance
θJA
θJC
QFN-16 (3mmx3mm)
EV8770-Q-00A(4) ................... 38 ...... 10 ... °C/W
JESD51-7 (5) .......................... 50 ...... 12 ... °C/W
NOTES:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation on
EV8770-Q-00A board at any ambient temperature is
calculated by PD (MAX) = (TJ (MAX)-TA)/θJA. Exceeding the
maximum allowable power dissipation produces an
excessive die temperature, causing the regulator to go into
thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on EV8770-Q-00A, 4-layer PCB.
5) The value of θJA given in this table is only valid for comparison
with other packages and cannot be used for design
purposes. These values were calculated in accordance with
JESD51-7, and simulated on a specified JEDEC board. They
do not represent the performance obtained in an actual
application.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
3
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (6)
VIN = 12V, TJ = -40°C to +125°C, typical value is tested at TJ = +25°C, unless otherwise noted.
Parameter
Input voltage range
Supply Current
Supply current (shutdown)
Supply current (quiescent)
MOSFET
HS switch on resistance
LS switch on resistance
Switch leakage
Symbol
VIN
IIN
IQ
Condition
VEN = 0V
VEN = 2V, VFB = 0.65V
Typ
100
HSRDS(ON) VBST-SW = 3.3V
LSRDS(ON) VCC = 3.3V
VEN = 0V, VSW = 17V,
SWLKG
TJ = 25°C
Current Limit and ZCD
Valley current limit
ILIMIT_VY
Short hiccup duty cycle (7)
DHICCUP
ZCD
IZCD
Switching Frequency and Minimum On/Off Timer
Switching frequency
Fs
(7)
Minimum on time
TOn MIN
Minimum off time (7)
TOff MIN
Reference and Soft Start
TJ = 25°C
Feedback voltage
VFB
TJ = -40°C to +125°C
Feedback current
IFB
VFB = 700mV
Soft-start current
ISS_START
Enable and UVLO
EN rising threshold
VEN RISING
EN falling threshold
VEN FALLING
EN pull-down resistor
REN_PD
VCC
VCC under-voltage lockout
VCCVth
threshold rising
VCC under-voltage lockout
VCCHYS
threshold
VCC regulator
VCC
VCC load regulation
RegVCC ICC = 5mA
MP8770 Rev. 1.1
7/10/2019
Min
3
Max
17
Units
V
5
150
µA
µA
22
10
mΩ
mΩ
1
µA
8
10
10
200
600
700
50
100
800
594
591
600
600
10
6
606
609
50
8
1.1
0.9
1.25
1
1.2
1.4
1.1
V
V
MΩ
2.6
2.8
3
V
4
A
%
mA
kHz
ns
ns
mV
nA
µA
350
mV
3.4
3
V
%
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
4
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (6) (continued)
VIN = 12V, TJ = -40°C to +125°C, typical value is tested at TJ = +25°C, unless otherwise noted.
Parameter
Symbol
Power Good
Power good UV rising
threshold
Power good UV falling
threshold
Power good OV rising
threshold
Power good OV falling
threshold
Power good delay
Power good sink current
capability
Power good leakage current
Thermal Protection
Thermal shutdown (7)
Thermal hysteresis (7)
Condition
Min
Typ
Max
Units
PGUVvth_Hi
0.85
0.9
0.95
VFB
PGUVvth_Lo
0.75
0.80
0.85
VFB
PGOVvth_Hi
1.15
1.2
1.25
VFB
PGOVvth_Lo
1.05
1.1
1.15
VFB
PGTd
Both edge
VPG
Sink 4mA
0.4
V
IPG_LEAK
VPG = 5V
10
μA
TSD
TSD-HYS
50
µs
150
20
°C
°C
NOTES:
6) Not tested in production and guaranteed by over-temperature correlation.
7) Guaranteed by design and characterization test.
MP8770 Rev. 1.1
7/10/2019
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
5
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VOUT = 1V, L = 0.56µH, TA = 25°C, unless otherwise noted.
Efficiency vs. Load Current
Efficiency vs. Load Current
VOUT = 1.2V, L = 0.56μH, DCR = 1.5mΩ
100
100
95
95
90
90
EFFICIENCY(%)
EFFICIENCY(%)
VOUT = 1V, L = 0.56μH, DCR = 1.5mΩ
85
80
75
VIN=5V
VIN=12V
VIN=17V
70
65
85
80
75
VIN=5V
VIN=12V
VIN=17V
70
65
60
60
0.0
2.0
4.0
6.0
LOAD CURRENT(A)
8.0
0.0
Efficiency vs. Load Current
95
95
90
90
EFFICIENCY(%)
EFFICIENCY(%)
100
85
80
75
0.0
2.0
4.0
6.0
LOAD CURRENT(A)
85
80
75
65
60
0.0
8.0
Efficiency vs. Load Current
4.0
6.0
LOAD CURRENT(A)
100
95
95
90
90
85
80
VIN=5V
VIN=12V
VIN=17V
85
80
VIN=5V
VIN=12V
VIN=17V
75
70
70
0.0
2.0
4.0
LOAD CURRENT(A)
MP8770 Rev. 1.1
7/10/2019
6.0
8.0
VOUT = 3.3V, L = 1μH, DCR = 1.35mΩ
100
EFFICIENCY(%)
EFFICIENCY(%)
2.0
Efficiency vs. Load Current
VOUT = 2.5V, L = 0.82μH, DCR = 0.9mΩ
75
VIN=5V
VIN=12V
VIN=17V
70
VIN=5V
VIN=12V
VIN=17V
60
8.0
VOUT = 1.8V, L = 0.82μH, DCR = 0.9mΩ
100
65
4.0
6.0
LOAD CURRENT(A)
Efficiency vs. Load Current
VOUT = 1.5V, L = 0.56μH, DCR = 1.5mΩ
70
2.0
8.0
0.0
2.0
4.0
6.0
LOAD CURRENT(A)
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
8.0
6
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1V, L = 0.56µH, TA = 25°C, unless otherwise noted.
Load Regulation vs. Load Current
Efficiency vs. Load Current
VOUT = 5V, L = 1.2μH, DCR = 1.8mΩ
VOUT = 1V
100
LOAD REGULATION(%)
EFFICIENCY(%)
95
90
85
80
VIN=7V
VIN=12V
VIN=17V
75
2.0
4.0
6.0
VIN=5V
VIN=12V
VIN=17V
‐0.4
‐0.5
70
0.0
0.5
0.4
0.3
0.2
0.1
0
‐0.1
‐0.2
‐0.3
8.0
0
1
2
LOAD CURRENT(A)
VIN=5V
VIN=12V
VIN=17V
1
2
3
4
5
6
LOAD CURRENT (A)
0.5
0.4
0.3
0.2
0.1
0
‐0.1
‐0.2
VIN=5V
VIN=12V
VIN=17V
‐0.3
‐0.4
‐0.5
7
8
0
1
2
3
4
5
6
LOAD CURRENT (A)
7
8
Load Regulation vs. Load Current
Load Regulation vs. Load Current
VOUT = 1.8V
VOUT = 2.5V
0.5
0.5
0.4
0.4
0.3
0.3
LOAD REGULATION(%)
LOAD REGULATION(%)
8
VOUT = 1.5V
LOAD REGULATION(%)
LOAD REGULATION(%)
VOUT = 1.2V
0
7
Load Regulation vs. Load Current
Load Regulation vs. Load Current
0.5
0.4
0.3
0.2
0.1
0
‐0.1
‐0.2
‐0.3
‐0.4
‐0.5
3
4
5
6
LOAD CURRENT (A)
0.2
0.1
0
‐0.1
‐0.2
VIN=5V
VIN=12V
VIN=17V
‐0.3
‐0.4
0.2
0.1
0
‐0.1
‐0.2
VIN=5V
VIN=12V
VIN=17V
‐0.3
‐0.4
‐0.5
‐0.5
0
MP8770 Rev. 1.1
7/10/2019
1
2
3
4
5
6
LOAD CURRENT (A)
7
8
0
1
2
3
4
5
6
LOAD CURRENT (A)
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
7
8
7
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1V, L = 0.56µH, TA = 25°C, unless otherwise noted.
Load Regulation vs. Load Current
Load Regulation vs. Load Current
VOUT = 5V
0.5
0.4
0.5
0.3
0.3
0.4
LOAD REGULATION(%)
LOAD REGULATION(%)
VOUT = 3.3V
0.2
0.1
0
‐0.1
‐0.2
VIN=5V
VIN=12V
VIN=17V
‐0.3
‐0.4
0.2
0.1
0
‐0.1
‐0.2
‐0.4
‐0.5
‐0.5
0
1
2
3
4
5
6
LOAD CURRENT (A)
7
8
0
1
2
3
4
5
6
LOAD CURRENT (A)
7
8
Case Temperature Rise vs. Output
Current
40
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
CASE TEMPERATURE RISE(℃)
LINE REGULATION (%)
Line Regulation vs. Input Voltage
Io=0.01A
Io=5A
Io=8A
Vout=1V
Vout=3.3V
Vout=5V
35
30
25
20
15
10
5
0
3
5
7
9
11
13
INPUT VOLTAGE (V)
15
17
2
Enabled Supply Current vs. Input
Voltage
DISABLED SUPPLY CURRENT
(μA)
110
100
90
80
70
60
50
40
3
5
7
9
11
13
INPUT VOLTAGE (V)
MP8770 Rev. 1.1
7/10/2019
15
3
4
5
6
OUTPUT CURRENT (A)
7
8
Disabled Supply Current vs. Input
Voltage
120
ENABLED SUPPLY CURRENT
(μA)
VIN=7V
VIN=12V
VIN=17V
‐0.3
17
5
4
3
2
1
0
3
5
7
9
11
13
15
17
INPUT VOLTAGE (V)
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
8
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1V, L = 0.56µH, TA = 25°C, unless otherwise noted.
Input/Output Ripple
Input/Output Ripple
IOUT = 0A
IOUT = 0A
CH1:
VOUT/AC
50mV/div.
CH2:
VIN/AC
100mV/div.
CH1:
VOUT/AC
50mV/div.
CH2: VIN/AC
50mV/div.
CH3: VSW
10V/div.
CH3: VSW
5V/div.
CH4:IL
5A/div.
CH4:IL
2A/div.
100ms/div.
2µs/div.
Input/Output Ripple
Start-Up through Input Voltage
IOUT = 8A
IOUT = 0A
CH1:
VOUT/AC
10mV/div.
CH2: VIN/AC
500mV/div.
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH2: VIN
10V/div.
CH3: VSW
10V/div.
CH3: VSW
10V/div.
CH4:IL
10A/div.
CH4:IL
10A/div.
2µs/div.
2ms/div.
Start-Up through Input Voltage
Shutdown through Input Voltage
IOUT = 8A
IOUT = 0A
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH2: VIN
10V/div.
CH3: VSW
10V/div.
CH4:IL
10A/div.
CH2: VIN
10V/div.
CH3: VSW
10V/div.
CH4:IL
10A/div.
2ms/div.
MP8770 Rev. 1.1
7/10/2019
40ms/div.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
9
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1V, L = 0.56µH, TA = 25°C, unless otherwise noted.
Shutdown through Input Voltage
Start-Up through EN
IOUT = 8A
IOUT = 0A
CH1: VOUT
1V/div.
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CHR1: VPG
5V/div.
CH2: VEN
5V/div.
CH2: VIN
10V/div.
CH3: VSW
10V/div.
CH3: VSW
10V/div.
CH4:IL
10A/div.
CH4:IL
10A/div.
40ms/div.
2ms/div.
Start-Up through EN
Shutdown through EN
IOUT = 8A
IOUT = 0A
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH2: VEN
5V/div.
CH2: VEN
5V/div.
CH3: VSW
10V/div.
CH3: VSW
10V/div.
CH4:IL
10A/div.
CH4:IL
10A/div.
2ms/div.
400ms/div.
Shutdown through EN
Short-Circuit Protection Entry
IOUT = 8A
IOUT = 0A
CH1: VOUT
1V/div.
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH2: VPG
5V/div.
CH2: VEN
5V/div.
CH3: VSW
10V/div.
CH3: VSW
10V/div.
CH4:IL
10A/div.
CH4:IL
10A/div.
200µs/div.
MP8770 Rev. 1.1
7/10/2019
20ms/div.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
10
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1V, L = 0.56µH, TA = 25°C, unless otherwise noted.
Short-Circuit Protection Recovery
Short-Circuit Protection Steady
State
IOUT = 0A
Short Output to GND
CH1: VOUT
1V/div.
CH1: VOUT
1V/div.
CH2: VPG
5V/div.
CH2: VPG
5V/div.
CH3: VSW
10V/div.
CH3: VSW
10V/div.
CH4:IL
10A/div.
CH4:IL
10A/div.
20ms/div.
20ms/div.
Load Transient
IOUT = 4 - 8A
CH1:
VOUT/AC
100mV/div.
CH4:IOUT
5A/div.
100µs/div.
MP8770 Rev. 1.1
7/10/2019
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
11
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
PIN FUNCTIONS
Package
Pin #
1, 15
2
3
4
5
6
7
8
9 - 13
14
16
Name
Description
NC
No connection. NC must be left floating.
Bootstrap. A capacitor connected between SW and BS is required to form a floating supply
BST
across the high-side switch driver. A BST resistor less than 4.7Ω is recommended.
Enable. Pull EN high to enable the MP8770. When floating, EN is pulled down to GND and
EN
disabled by an internal 1.2MΩ resistor.
Feedback. FB sets the output voltage when connected to the tap of an external resistor
FB
divider connected between the output and GND.
Signal ground. AGND is not connected to the system ground internally. Ensure that AGND
AGND
is connected to the system ground in the PCB layout.
Soft start. Connect a capacitor across SS and GND to set the soft-start time to avoid inrush
SS
current at start-up.
Power good output. The output of PG is an open-drain output. PG changes state if UVP,
PG
OCP, OTP, or OV occurs.
Supply voltage. The MP8770 operates from a 3 - 17V input rail. A capacitor (C1) is needed
VIN
to decouple the input rail. Use a wide PCB trace to make the connection.
System ground. PGND is the reference ground of the regulated output voltage. PGND
PGND requires careful consideration during the PCB layout. PGND is recommended to be
connected to GND with coppers and vias.
Internal bias supply output. Decouple VCC with a 1µF capacitor. Place the VCC capacitor
VCC
close to VCC and GND.
SW
Switch output. Connect SW with a wide PCB trace.
MP8770 Rev. 1.1
7/10/2019
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
12
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
BLOCK DIAGRAM
VIN
Bias &
Voltage
reference
EN
Bootstrap
Regulator
BST
3.3V
LDO
VCC
HS
Driver
SS
Main
switch(NCH)
Iss
SW
EA
On
Timer
AGND
Logic
Control
VCC
COMP
FB
BUF
LS
Driver
Ramp
PWM
Current
Modulator
90% Vref rising
80% Vref falling
Synchronous
rectifier (NCH)
Current Sense
Amplifier
PG
120% Vref rising
110% Vref falling
GND
Figure 1: Functional Block Diagram
MP8770 Rev. 1.1
7/10/2019
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
13
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
OPERATION
The MP8770 is fully integrated, synchronous,
rectified, step-down, switch-mode converter.
Constant-on-time (COT) control is employed to
provide fast transient response and ease loop
stabilization. Figure 2 shows the simplified ramp
compensation block in the MP8770. At the
beginning of each cycle, the high-side MOSFET
(HS-FET) is turned on when the feedback
voltage (VFB) is below the reference voltage
(VREF), which indicates an insufficient output
voltage. The on period is determined by both
the output voltage and input voltage to make
the switching frequency fairly constant over the
input voltage range.
After the on period elapses, the HS-FET is
turned off. The HS-FET is turned on again
when VFB drops below VREF. By repeating
operation in this way, the converter regulates
the output voltage. The integrated low-side
MOSFET (LS-FET) is turned on when the HSFET is in its off state to minimize conduction
loss. There is a dead short between the input
and GND if both the HS-FET and LS-FET are
turned on at the same time. This is called
shoot-through. To prevent shoot-through, a
dead time (DT) is generated internally between
the HS-FET off and LS-FET on period or the
LS-FET off and HS-FET on period.
An internal compensation is applied for COT
control to create a more stable operation, even
when ceramic capacitors are used as output
capacitors.
This
internal
compensation
improves jitter performance without affecting
the line or load regulation.
Heavy-Load Operation
Continuous conduction mode (CCM) is when
the output current is high and the inductor
current is always above zero amps (see Figure
3). When VFB is below the error amplifier output
voltage (VEAO), the HS-FET is turned on for a
fixed interval determined by the one-shot ontimer. When the HS-FET is turned off, the LSFET is turned on until the next period.
TON is constant
VIN
VSW
IL
Whenever VRAMP drops
below VEAO, the HS-FET
is turned ON
IOUT
VRAMP
VEAO
HS-FET
Driver
LS-FET
Driver
Figure 3: Heavy-Load Operation
In CCM operation, the switching frequency is
fairly constant. This is called pulse-width
modulation (PWM) mode.
Light-Load Operation
When the MP8770 works in pulse-frequency
modulation (PFM) during light-load operation,
the MP8770 reduces the switching frequency
automatically to maintain high efficiency, and
the inductor current drops almost to zero. When
the inductor current reaches zero, the LS-FET
driver goes into tri-state (Hi-Z) (see Figure 4).
Therefore, the output capacitors discharge
slowly to GND through the LS-FET, R1, and R2.
This operation improves device efficiency
greatly when the output current is low.
Figure 2: Simplified Ramp Compensation Block
Figure 4: Light-Load Operation
MP8770 Rev. 1.1
7/10/2019
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
14
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
Light-load operation is also called skip mode
because the HS-FET does not turn on as
frequently as it does during heavy-load
conditions. The HS-FET turn-on frequency is a
function of the output current. As the output
current increases, the current modulator
regulation time period becomes shorter, and the
HS-FET turns on more frequently. The
switching frequency increases in turn. The
output current reaches the critical level when
the current modulator time is zero and can be
determined with Equation (1):
IOUT
(VIN VOUT ) VOUT
2 L FSW VIN
(1)
The device reverts to PWM mode once the
output current exceeds the critical level.
Afterward, the switching frequency remains
fairly constant over the output current range.
VCC Regulator
The 3.4V internal regulator power most of the
internal circuitries. This regulator takes the VIN
input and operates in the full VIN range. When
VIN exceeds 3.4V, the output of the regulator is
in full regulation. When VIN falls below 3.4V, the
output of the regulator decreases following VIN.
A 1μF decoupling ceramic capacitor is needed
at VCC.
Enable (EN)
EN is a digital control pin that turns the
regulator on and off. Drive EN above 1.25V to
turn on the regulator. Drive EN below 1V to turn
off the regulator. When floating, EN is pulled
down to GND by an internal 1.2MΩ resistor. EN
can be connected to VIN directly and supports a
17V input range.
Under-Voltage Lockout (UVLO)
Under-voltage lockout (UVLO) protects the chip
from operating at an insufficient supply voltage.
The MP8770 UVLO comparator monitors the
output voltage of the internal regulator (VCC).
The VCC UVLO rising threshold is about 2.8V
and its falling threshold is 2.45V.
When the input voltage is higher than the UVLO
rising threshold voltage, the MP8770 powers up.
The MP8770 shuts off when the input voltage is
lower than the UVLO falling threshold voltage.
This is a non-latch protection.
MP8770 Rev. 1.1
7/10/2019
Soft Start (SS)
The MP8770 employs a soft start (SS)
mechanism to ensure smooth output ramping
during power up. When EN goes high, an
internal current source (6μA) charges up the SS
capacitor. The SS capacitor voltage takes over
the REF voltage to the PWM comparator. The
output voltage ramps up smoothly with the SS
voltage (VSS). If VSS rises above VREF, it
continues to ramp up until VREF takes over. At
this point, the soft start finishes, and the device
enters steady state operation.
The SS capacitor value can be determined with
Equation (2):
Css (nF) 0.83
Tss (ms) Iss (uA)
VREF (V)
(2)
If the output capacitance is large, it is not
recommended to set the SS time too short.
Otherwise, the current limit can be reached
easily during SS. SS cap less than 4.7nF
should be avoid.
Power Good (PG) Indicator
PG is the open drain of a MOSFET that
connects to VCC or another voltage source
through a resistor (e.g.: 100kΩ). The MOSFET
turns on with the application of an input voltage,
so PG is pulled to GND before SS is ready.
After VFB reaches 90% of VREF, PG is pulled
high after a 50μs delay. When VFB drops to 80%
of VREF, PG is pulled low.
When UVLO or OTP occurs, PG is pulled low
immediately. When an over-current (OC)
condition occurs, PG is pulled low when VFB
drops below 80% of VREF after a 0.05ms delay.
When an over-voltage (OV) condition occurs,
PG is pulled low when VFB rises above 120% of
VREF after a 0.05ms delay. If VFB falls below
110% of VREF, PG is pulled high after a 0.05ms
delay.
If the input supply fails to power the MP8770,
PG is clamped low, even though PG is tied to
an external DC source through a pull-up
resistor. The relationship between the PG
voltage and the pull-up current is shown in
Figure 5.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
15
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
Thermal Shutdown
Thermal shutdown prevents the chip from
operating at exceedingly high temperatures.
When the silicon die temperature exceeds
150°C, the entire chip shuts down. When the
temperature falls below its lower threshold
(typically 130°C), the chip is enabled again.
PG Clamped Voltage vs. Pull Up Current
PG CLAMPED VOLTAGE(V)
1.2
1
0.8
0.6
0.4
0.2
0
0
1
2
3
PULL UP CURRENT (mA)
4
5
Figure 5: PG Clamped Voltage vs. Pull-Up
Current
Over-Current Protection (OCP) and ShortCircuit Protection (SCP)
The MP8770 has a valley-limit control. The LSFET monitors the current flow through the LSFET. The HS-FET waits until the valley current
limit is removed before turning on again.
Meanwhile, the output voltage drops until VFB is
below the under-voltage (UV) threshold
(typically 50% below the reference). Once UV is
triggered, the MP8770 enters hiccup mode to
restart the part periodically.
During over-current protection (OCP), the
device attempts to recover from the overcurrent fault with hiccup mode. This means that
the chip disables the output power stage,
discharges the soft-start cap, and attempts to
soft-start again automatically. If the over-current
condition still remains after the soft-start ends,
the device repeats this operation cycle until the
over-current conditions disappears, and then
the output rises back to the regulation level.
OCP is a non-latch protection.
Pre-Bias Start-Up
The MP8770 is designed for monotonic start-up
into pre-biased loads. If the output is pre-biased
to a certain voltage during start-up, the BST
voltage is refreshed and charged, and the
voltage on the soft-start capacitor is charged as
well. If the BST voltage exceeds its rising
threshold voltage, and the soft-start capacitor
voltage exceeds the sensed output voltage at
FB, the part begins working normally.
MP8770 Rev. 1.1
7/10/2019
Floating Driver and Bootstrap Charging
An external bootstrap capacitor powers the
floating power MOSFET driver. This floating
driver has its own UVLO protection with a rising
threshold of 1.7V and a hysteresis of 150mV.
VIN regulates the bootstrap capacitor voltage
internally through D1, M1, R4, C4, Lo, and Co
(see Figure 6). If VIN - VSW exceeds 5V, U2
regulates M1 to maintain a 3.3V BST voltage
across C4. The BST resistor (R4) is
recommended to be less than 4.7Ω.
Figure 6: Internal Bootstrap Charger
Start-Up and Shutdown Circuit
If both VIN and EN exceed their respective
thresholds, the chip starts up. The reference
block starts first, generating a stable reference
voltage and current, and then the internal
regulator is enabled. The regulator provides a
stable supply for the remaining circuits.
Three events can shut down the chip: EN low,
VIN low, and thermal shutdown. The shutdown
procedure starts by initially blocking the
signaling path to avoid any fault triggering. The
internal supply rail is then pulled down.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
16
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider is used to set the
output voltage. First, choose a value for R2. R2
should be chosen reasonably, since a small R2
leads to considerable quiescent current loss,
while a large R2 makes FB noise-sensitive. R2
is recommended to be between 2 - 100kΩ.
Typically, set the current through R2 to be
below 250µA for a good balance between
system stability and no-load loss. Then
determine R1 with Equation (3):
R1
VOUT VREF
R2
VREF
(3)
The feedback circuit is shown in Figure 7.
determining the inductance value is to design
the peak-to-peak ripple current in the inductor
to be in the range of 30 - 40% of the maximum
output current. Make the peak inductor current
below the maximum switch current limit. The
inductance value can be calculated with
Equation (4):
L
VOUT
V
(1 OUT )
FSW IL
VIN
Where ∆IL is the peak-to-peak inductor ripple
current.
The inductor should not saturate under the
maximum inductor peak current, where the
peak inductor current can be calculated with
Equation (5):
ILP IOUT
Figure 7: Feedback Network
Table 1 lists the recommended resistor values
for common output voltages.
Table 1: Resistor Selection for Common Output
Voltages
VOUT
(V)
1.0
1.2
1.5
1.8
2.5
3.3
5
R1
(kΩ)
20
20
20
20
20
20
20
R2
(kΩ)
30
20
13
10
6.34
4.42
2.7
L (μH)
Cf (pF)
0.56
0.56
0.56
0.82
0.82
1
1.2
56
56
56
56
56
56
56
Rt
(kΩ)
1
1
1
1
1
1
1
Selecting the Inductor
An inductor is necessary for supplying constant
current to the output load while being driven by
the switched input voltage. A larger-value
inductor results in less ripple current and a
lower output ripple voltage but also has a larger
physical footprint, higher series resistance, and
lower saturation current. A good rule for
MP8770 Rev. 1.1
7/10/2019
(4)
VOUT
V
(1 OUT )
2FSW L
VIN
(5)
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous and therefore requires a
capacitor to supply AC current to the step-down
converter while maintaining the DC input
voltage. For the best performance, use ceramic
capacitors placed as close to VIN as possible.
Capacitors with X5R and X7R ceramic
dielectrics are recommended because they are
fairly stable with temperature fluctuations.
The capacitors must also have a ripple current
rating greater than the maximum input ripple
current of the converter. The input ripple current
can be estimated with Equation (6):
ICIN IOUT
VOUT
V
(1 OUT )
VIN
VIN
(6)
The worst-case condition occurs at VIN = 2VOUT,
shown in Equation (7):
ICIN
IOUT
2
(7)
For simplification, choose an input capacitor
with an RMS current rating greater than half of
the maximum load current.
The input capacitance value determines the
input voltage ripple of the converter. If there is
an input voltage ripple requirement in the
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
17
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
system, choose an input capacitor that meets
the specification.
The input voltage ripple can be estimated with
Equation (8):
VIN
IOUT
V
V
OUT (1 OUT )
FSW CIN VIN
VIN
is too high, the output voltage cannot reach the
design value during the soft-start time and fails
to regulate.
The maximum output capacitor value (Co_max)
can be limited approximately with Equation (20):
(8)
CO _ MAX (ILIM _ AVG IOUT ) Tss / VOUT (20)
The worst-case conditions occur at VIN = 2VOUT,
shown in Equation (9):
Where ILIM_AVG is the average start-up current
during the soft-start period, and Tss is the softstart time.
VIN
I
1
OUT
4 FSW CIN
(9)
Selecting the Output Capacitor
The output capacitor is required to maintain the
DC output voltage. Ceramic or POSCAP
capacitors are recommended. The output
voltage ripple can be estimated with Equation
(10):
VOUT
VOUT
V
1
(1 OUT ) (RESR
) (10)
FSW L
VIN
8 FSW COUT
In the case of ceramic capacitors, the
impedance at the switching frequency is
dominated by the capacitance. The output
voltage ripple is mainly caused by the
capacitance. For simplification, the output
voltage ripple can be estimated with Equation
(11):
VOUT
VOUT
V
(1 OUT )
8 FSW 2 L COUT
VIN
(11)
PCB Layout Guidelines
Efficient PCB layout of the switching power
supplies is critical for stable operation. A poor
layout design can result in poor line or load
regulation and stability issues. For best results,
refer to Figure 8 and follow the guidelines below.
1. Place the high current paths (GND, VIN,
and SW) very close to the device with short,
direct, and wide traces.
2. Place the input capacitor as close to VIN
and GND as possible.
3. Place a VCC decoupling capacitor close to
the device.
4. Connect AGND and PGND at the point of
the VCC capacitor’s ground connection.
5. Place the external feedback resistors next
to FB.
6. Keep the switching node (SW) short and
away from the feedback network.
The output voltage ripple caused by the ESR is
very small. Therefore, an external ramp is
needed to stabilize the system. The external
ramp can be generated through a resistor
(RRAMP) and capacitor (Cr).
In the case of POSCAP capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, the output ripple
can be approximated with Equation (12):
VOUT
VOUT
V
(1 OUT ) RESR
FSW L
VIN
(12)
Besides considering the output ripple, a larger
output capacitor can also result in better load
transient response. Be sure to consider the
maximum output capacitor limitation in the
design application. If the output capacitor value
MP8770 Rev. 1.1
7/10/2019
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
18
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
For better performance, it is recommended to
use a four-layer board (the two middle layers
are GND).
Table 2: Design Example
12V
VIN
1V
VOUT
8A
IOUT
GND
VIN
SW
GND
Design Example
Table 2 shows a design example when ceramic
capacitors are applied.
VOUT
The detailed application schematic is shown in
Figure 9 through Figure 15. The typical
performance and waveforms are shown in the
Typical Characteristics section. For more
devices applications, please refer to the related
evaluation board datasheet.
Top Layer
VIN
GND
Bottom Layer
Figure 8: Recommended Layout
MP8770 Rev. 1.1
7/10/2019
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
19
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
Figure 9: VIN = 12V, VOUT = 1V, IOUT = 8A(8)
Figure 10: VIN = 12V, VOUT = 1.2V, IOUT = 8A(8)
Figure 11: VIN = 12V, VOUT = 1.5V, IOUT = 8A(8)
MP8770 Rev. 1.1
7/10/2019
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
20
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS (continued)
Figure 12: VIN = 12V, VOUT = 1.8V, IOUT = 8A(8)
Figure 13: VIN = 12V, VOUT = 2.5V, IOUT = 8A(8)
Figure 14: VIN = 12V, VOUT = 3.3V, IOUT = 8A(8)
MP8770 Rev. 1.1
7/10/2019
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
21
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS (continued)
Figure 15: VIN = 12V, VOUT = 5V, IOUT = 8A(8)
NOTE:
8)
When VIN is low, refer to the Selecting the Input Capacitor Section on page 17.
MP8770 Rev. 1.1
7/10/2019
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
22
MP8770 – 17V, 8A, SYNCHRONOUS, STEP-DOWN CONVERTER
PACKAGE INFORMATION
QFN-16 (3mmx3mm)
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP8770 Rev. 1.1
7/10/2019
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
23
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Monolithic Power Systems (MPS):
MP8770GQ-P MP8770GQ-Z
工商网监
湘ICP备2023018690号
