MP8774H
12A, Wide-Input 3V to 18V, 1.4MHz
Synchronous Step-Down Converter with PG and
External Soft Start in 3mmx3mm QFN Package
DESCRIPTION
FEATURES
The MP8774H is a fully integrated, highfrequency, synchronous, rectified, step-down,
switch-mode converter with internal power
MOSFETs. The MP8774H offers a very
compact solution that achieves 12A of
continuous output current with excellent load
and line regulation over a wide input range. The
MP8774H uses synchronous mode operation
for higher efficiency over the output current load
range.
Constant-on-time (COT) control operation
provides very fast transient response, easy loop
design, and very tight output regulation.
Full protection features include short-circuit
protection (SCP), over-current protection (OCP),
under-voltage protection (UVP), and thermal
shutdown.
Output Adjustable from 0.6V
Wide 3V to 18V Operating Input Range
12A Output Current
16mΩ/5.5mΩ Low RDS(ON) Internal Power
MOSFETs
100μA Quiescent Current
High-Efficiency Synchronous Mode
Operation
Pre-Biased Start-Up
Fixed 1.4MHz Switching Frequency
External Programmable Soft-Start Time
Enable (EN) and Power Good (PG) for
Power Sequencing
Over-Current Protection and Hiccup Mode
Thermal Shutdown
Available in a QFN-16 (3mmx3mm)
Package
APPLICATIONS
The MP8774H requires a minimal number of
readily available, standard external components,
and is available in a space-saving QFN-16
(3mmx3mm) package.
Security Cameras
AP Routers, XDSL Devices
Digital Set-Top Boxes
Flat-Panel Television and Monitors
General Purpose
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive.
For MPS green status, visit the MPS website under Quality Assurance.
“MPS”, the MPS logo, and “Simple, Easy Solutions” are registered
trademarks of Monolithic Power Systems, Inc. or its subsidiaries.
TYPICAL APPLICATION
Efficiency vs. Load Current
VOUT = 1V, L = 0.33μH, DCR = 1.1mΩ
3V-18V
VIN
BST
C1
22µFx2
C3
0.1µF L1
0.33µH
MP8774H
PG
100
95
1V/12A
VOUT
SW
PG
EN
R1
20kΩ
ENABLE
FB
AGND
VCC
PGND
C4
1µF
R4
1kΩ
SS
C5
22nF
R2
30kΩ
C2
22µFx4
EFFICIENCY (%)
VIN
90
85
80
75
VIN=3.3V
70
VIN=5V
65
VIN=12V
60
0
2
4
6
8
10
12
LOAD CURRENT (A)
MP8774H Rev. 1.0
www.MonolithicPower.com
5/22/2019
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© 2019 MPS. All Rights Reserved.
1
MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
MP8774HGQ
Package
QFN-16 (3mmx3mm)
Top Marking
See Below
* For Tape & Reel, add suffix –Z (e.g. MP8774HGQ–Z).
TOP MARKING
BJU: Product code of MP8774HGQ
Y: Year code
LLL: Lot number
PACKAGE REFERENCE
TOP VIEW
SW
16
NC
1
15
NC
BST
2
14
VCC
EN
3
13
PGND
FB
4
12
PGND
5
11
PGND
SS
6
10
PGND
PG
7
9
PGND
AGND
8
VIN
QFN-16 (3mmx3mm)
MP8774H Rev. 1.0
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5/22/2019
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© 2019 MPS. All Rights Reserved.
2
MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
PIN FUNCTIONS
Pin #
1, 15
2
3
4
5
6
7
8
9, 10,
11, 12,
13
14
16
Name
NC
Description
No connection. NC must be left floating.
Bootstrap. Connect a capacitor between SW and BST to form a floating supply across the
BST
high-side switch driver. A BST resistor less than 4.7Ω is recommended.
Enable. Pull EN high to enable the MP8774H. When floating, EN is pulled down to GND
EN
and disabled by an internal 3.3MΩ resistor.
Feedback. FB sets the output voltage when connected to the tap of an external resistor
FB
divider between output and GND.
Signal ground. AGND is not connected to the system ground internally. Ensure that AGND
AGND
is connected to the system ground in the PCB layout.
Soft start. Connect a capacitor across SS and GND to set the soft-start time and avoid
SS
inrush current at start-up.
Power good output. The output of PG is an open drain. PG changes state if UVP, OCP,
PG
OTP, or OV occurs.
Supply voltage. The MP8774H operates from a 3V to 18V input rail. A capacitor (C1) is
VIN
needed to decouple the input rail. Use a wide PCB trace to make the connection.
System ground. PGND is the reference ground of the regulated output voltage. PGND
PGND requires careful consideration during the PCB layout. PGND is recommended to be
connected to GND with coppers and vias.
Internal bias supply output. Decouple VCC with a 1µF capacitor. Place the VCC capacitor
VCC
close to VCC and GND.
SW
Switch output. Connect SW with a wide PCB trace.
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
VIN .................................................-0.3V to +20V
VSW ........................................ -0.3V (-5V < 10ns)
to VIN + 0.7V (23V < 10ns)
VBST ...................................................... VSW + 4V
VEN ................................................................. VIN
All other pins .................................. -0.3V to +4V
Continuous power dissipation (TA = 25°C) (2) (4)
................................................................... 3.2W
Junction temperature ................................150°C
Lead temperature .....................................260°C
Storage temperature ............... -65°C to +125°C
QFN-16 (3mmx3mm)
EV8774H-Q-00A (4) ................ 38 ...... 10 .... °C/W
JESD51-7 (5) .......................... 50 ...... 12 .... °C/W
Recommended Operating Conditions (3)
Supply voltage (VIN) ............................ 3V to 18V
Output voltage (VOUT) ............. 0.6V to VIN * DMAX
or 12V max
Operating junction temp (TJ) .... -40°C to +125°C
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX) - TA) / θJA. Exceeding the maximum allowable power
dissipation produces an excessive die temperature, causing
the regulator to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) The device is not guaranteed to function outside of its
operating conditions.
4) Measured on EV8774H-Q-00A, 4-layer PCB.
5) The value of θJA given in this table is only valid for
comparison with other packages and cannot be used for
design purposes. These values were calculated in
accordance with JESD51-7, and simulated on a specified
JEDEC board. They do not represent the performance
obtained in an actual application.
MP8774H Rev. 1.0
www.MonolithicPower.com
5/22/2019
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© 2019 MPS. All Rights Reserved.
3
MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
(6)
VIN = 12V, TJ = -40°C to +125°C, typical value is tested at TJ = 25°C, unless otherwise noted.
Parameter
Symbol
Condition
Input voltage range
VIN
Supply Current
Supply current (shutdown)
IIN
VEN = 0V
Supply current (quiescent)
IQ
VEN = 2V, VFB = 0.65V
MOSFET
HS switch on resistance
HSRDS(ON) VBST-SW = 3.3V
LS switch on resistance
LSRDS(ON) VCC = 3.3V
Switch leakage
SWLKG
VEN = 0V, VSW = 17V, TJ = 25°C
Current Limit and ZCD
Valley current limit
ILIMIT_VY
(7)
Short hiccup duty cycle
DHICCUP
ZCD
IZCD
Switching Frequency and Minimum On/Off Timer
Switching frequency
fSW
(7)
Minimum on time
tON_MIN
(7)
Minimum off time
tOFF_MIN
Reference and Soft Start
TJ = 25°C
Feedback voltage
VFB
TJ = -40°C to +125°C
Feedback current
IFB
VFB = 700mV
Soft-start current
ISS_START
Enable and UVLO
EN rising threshold
VEN RISING
EN falling threshold
VEN FALLING
EN pull-down resistor
REN_PD
VCC
VCC under-voltage lockout
VCCVth
threshold rising
VCC under-voltage lockout
VCCHYS
threshold
VCC regulator
VCC
VCC load regulation
RegVCC ICC = 5mA
Min
Typ
3
100
Max
Units
18
V
5
150
µA
µA
1
mΩ
mΩ
µA
16
5.5
12
14
10
200
1200
1400
50
100
1600
594
591
600
600
10
6
606
609
50
8
1.1
0.9
1.25
1
1.2
1.4
1.1
V
V
MΩ
2.6
2.8
3
V
4
A
%
mA
kHz
ns
ns
mV
nA
µA
350
mV
3.4
3
V
%
MP8774H Rev. 1.0
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5/22/2019
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© 2019 MPS. All Rights Reserved.
4
MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (continued) (6)
VIN = 12V, TJ = -40°C to +125°C, typical value is tested at TJ = 25°C, unless otherwise noted.
Parameter
Power Good
Power good UV rising
threshold
Power good UV falling
threshold
Power good OV rising
threshold
Power good OV falling
threshold
Power good delay
Power good sink current
capability
Power good leakage current
Thermal Protection
Thermal shutdown (7)
Thermal hysteresis (7)
Symbol
Condition
Min
Typ
Max
Units
PGUVvth_Hi
0.85
0.9
0.95
VFB
PGUVvth_Lo
0.75
0.80
0.85
VFB
PGOVvth_Hi
1.15
1.2
1.25
VFB
PGOVvth_Lo
1.05
1.1
1.15
VFB
PGTd
Both edges
VPG
Sink 4mA
0.4
V
IPG_LEAK
VPG = 5V
10
μA
TSD
TSD-HYS
50
150
20
µs
°C
°C
Notes:
6)
7)
Guaranteed by over-temperature correlation, not tested in production.
Guaranteed by design and characterization test.
MP8774H Rev. 1.0
www.MonolithicPower.com
5/22/2019
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© 2019 MPS. All Rights Reserved.
5
MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs. Load Current
Efficiency vs. Load Current
VOUT = 1V, L = 0.33μH, DCR = 1.1mΩ
VOUT = 1.2V, L = 0.33μH, DCR = 1.1mΩ
100
100
95
95
90
90
EFFICIENCY (%)
EFFICIENCY (%)
VIN = 12V, VOUT = 1V, L = 0.33µH, TA = 25°C, unless otherwise noted.
85
80
75
VIN=5V
70
VIN=12V
65
85
80
75
VIN=5V
70
VIN=12V
65
VIN=18V
VIN=18V
60
60
0
2
4
6
8
10
0
12
2
8
10
Efficiency vs. Load Current
Efficiency vs. Load Current
VOUT = 1.5V, L = 0.33μH, DCR = 1.1mΩ
VOUT = 1.8V, L = 0.47μH, DCR = 0.9mΩ
100
100
95
95
90
90
EFFICIENCY (%)
EFFICIENCY (%)
6
85
80
75
VIN=5V
70
VIN=12V
65
12
LOAD CURRENT (A)
LOAD CURRENT (A)
85
80
75
VIN=5V
70
VIN=12V
65
VIN=18V
60
VIN=18V
60
0
2
4
6
8
10
12
0
2
LOAD CURRENT (A)
95
95
90
90
EFFICIENCY (%)
100
85
80
VIN=5V
VIN=12V
65
8
80
75
VIN=5V
70
VIN=12V
VIN=18V
60
60
2
4
6
8
LOAD CURRENT (A)
12
85
65
VIN=18V
0
10
VOUT = 3.3V, L = 0.56μH, DCR = 1.61mΩ
100
70
6
Efficiency vs. Load Current
VOUT = 2.5V, L = 0.47μH, DCR = 0.9mΩ
75
4
LOAD CURRENT (A)
Efficiency vs. Load Current
EFFICIENCY (%)
4
10
12
0
2
4
6
8
10
12
LOAD CURRENT (A)
MP8774H Rev. 1.0
www.MonolithicPower.com
5/22/2019
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
6
MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1V, L = 0.33µH, TA = 25°C, unless otherwise noted.
Efficiency vs. Load Current
Efficiency vs. Load Current
VIN = 5V, L = 0.33µH, DCR = 1.1mΩ
100
100
95
95
90
90
EFFICIENCY (%)
EFFICIENCY (%)
VIN = 5V, L = 0.68µH, DCR = 1.58mΩ
85
80
75
VIN=7V
70
VIN=12V
65
85
80
75
Vout=1.2V
65
VIN=18V
Vout=1.5V
60
60
0
2
4
6
8
10
0
12
2
6
8
10
12
LOAD CURRENT (A)
Load Regulation vs. Load Current
Load Regulation vs. Load Current
VOUT = 1.2V
0.5
0.5
0.4
0.4
LOAD REGULATION (%)
0.3
0.2
0.1
0
-0.1
-0.2
VIN=5V
-0.3
VIN=12V
-0.4
VIN=18V
0.3
0.2
0.1
0
-0.1
-0.2
VIN=5V
-0.3
VIN=12V
-0.4
VIN=18V
-0.5
-0.5
0
2
4
6
8
10
0
12
2
LOAD CURRENT (A)
4
6
8
10
12
LOAD CURRENT (A)
Load Regulation vs. Load Current
Load Regulation vs. Load Current
VOUT = 1.5V
VOUT = 1.8V
0.5
0.5
0.4
0.4
0.3
0.3
LOAD REGULATION (%)
LOAD REGULATION (%)
4
LOAD CURRENT (A)
VOUT = 1V
LOAD REGULATION (%)
Vout=1V
70
0.2
0.1
0
-0.1
-0.2
VIN=5V
-0.3
VIN=12V
-0.4
VIN=18V
-0.5
0.2
0.1
0
-0.1
-0.2
VIN=5V
-0.3
VIN=12V
-0.4
VIN=18V
-0.5
0
2
4
6
8
LOAD CURRENT (A)
10
12
0
2
4
6
8
10
12
LOAD CURRENT (A)
MP8774H Rev. 1.0
www.MonolithicPower.com
5/22/2019
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© 2019 MPS. All Rights Reserved.
7
MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1V, L = 0.33µH, TA = 25°C, unless otherwise noted.
Load Regulation vs. Load Current
Load Regulation vs. Load Current
VOUT = 3.3V
0.5
0.5
0.4
0.4
LOAD REGULATION (%)
LOAD REGULATION (%)
VOUT = 2.5V
0.3
0.2
0.1
0
-0.1
-0.2
VIN=5V
-0.3
VIN=12V
-0.4
VIN=18V
0.3
0.2
0.1
0
-0.1
-0.2
VIN=5V
-0.3
VIN=12V
-0.4
VIN=18V
-0.5
-0.5
0
2
4
6
8
10
0
12
2
4
6
8
10
12
LOAD CURRENT (A)
LOAD CURRENT (A)
Load Regulation vs. Load Current
Line Regulation vs. Input Voltage
0.5
0.5
0.4
0.4
LINE REGULATION (%)
LOAD REGULATION (%)
VOUT = 5V
0.3
0.2
0.1
0
-0.1
-0.2
VIN=7V
-0.3
VIN=12V
-0.4
VIN=18V
0.3
0.2
0.1
0
-0.1
-0.2
Io=0.01A
-0.3
Io=6A
-0.4
Io=12A
-0.5
-0.5
0
2
4
6
8
10
3
12
Case Temperature Rise vs. Output
Current
50
40
V FB (V)
CASE TEMPERATURE RISE
(℃)
60
30
20
10
0
2
3
4
5
6
Io (A)
7
8
12
15
18
VFB vs. Temperature
70
1
9
INPUT VOLTAGE (V)
LOAD CURRENT (A)
0
6
9 10 11 12
0.605
0.604
0.603
0.602
0.601
0.6
0.599
0.598
0.597
0.596
0.595
-25
25
75
125
TEMPERATURE (℃)
MP8774H Rev. 1.0
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5/22/2019
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MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1V, L = 0.33µH, TA = 25°C, unless otherwise noted.
EN Rising and Falling vs.
Temperature
Enabled Supply Current vs. Input
Voltage
120
ENABLED SUPPLY CURRENT
(μA)
EN RISING AND FALLING (V)
1.3
110
1.2
100
1.1
1
RISING
FALLING
0.9
-25
25
75
125
TEMPERATURE (℃)
90
80
70
60
50
40
3
6
9
12
15
INPUT VOLTAGE (V)
18
Disabled Supply Current vs. Input
Voltage
ENABLED SUPPLY CURRENT
(μA)
5
4
3
2
1
0
3
6
9
12
15
INPUT VOLTAGE (V)
18
MP8774H Rev. 1.0
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5/22/2019
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© 2019 MPS. All Rights Reserved.
9
MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1V, L = 0.33µH, TA = 25°C, unless otherwise noted.
Input/Output Ripple
Input/Output Ripple
IOUT = 0A
IOUT = 0A
CH1:
VOUT/AC
20mV/div.
CH2:
VIN/AC
50mV/div.
CH1:
VOUT/AC
50mV/div.
CH2: VIN/AC
50mV/div.
CH3: VSW
10V/div.
CH3: VSW
10V/div.
CH4: IL
10A/div.
CH4: IL
2A/div.
40ms/div.
2µs/div.
Input/Output Ripple
Start-Up through Input Voltage
IOUT = 12A
IOUT = 0A
CH1:
VOUT/AC
10mV/div.
CH2: VIN/AC
200mV/div.
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH2: VIN
10V/div.
CH3: VSW
10V/div.
CH3: VSW
10V/div.
CH4: IL
2A/div.
CH4: IL
10A/div.
1µs/div.
1ms/div.
Start-Up through Input Voltage
Shutdown through Input Voltage
IOUT = 12A
IOUT = 0A
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH2: VIN
10V/div.
CH3: VSW
10V/div.
CH2: VIN
10V/div.
CH3: VSW
10V/div.
CH4: IL
10A/div.
CH4: IL
10A/div.
1ms/div.
40ms/div.
MP8774H Rev. 1.0
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5/22/2019
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© 2019 MPS. All Rights Reserved.
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MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1V, L = 0.33µH, TA = 25°C, unless otherwise noted.
Shutdown through Input Voltage
Start-Up through EN
IOUT = 12A
IOUT = 0A
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH2: VEN
5V/div.
CH2: VIN
10V/div.
CH3: VSW
10V/div.
CH3: VSW
10V/div.
CH4: IL
2A/div.
CH4: IL
10A/div.
4ms/div.
2ms/div.
Start-Up through EN
Shutdown through EN
IOUT = 12A
IOUT = 0A
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH2: VEN
5V/div.
CH3: VSW
10V/div.
CH2: VEN
5V/div.
CH3: VSW
5V/div.
CH4: IL
2A/div.
CH4: IL
10A/div.
2ms/div.
400ms/div.
Shutdown through EN
Short-Circuit Protection Entry
IOUT = 12A
IOUT = 0A
CH1: VOUT
1V/div.
CHR1: VPG
5V/div.
CH1: VOUT
1V/div.
CH2: VPG
5V/div.
CH2: VEN
5V/div.
CH3: VSW
10V/div.
CH3: VSW
10V/div.
CH4: IL
10A/div.
CH4: IL
10A/div.
200µs/div.
20ms/div.
MP8774H Rev. 1.0
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5/22/2019
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© 2019 MPS. All Rights Reserved.
11
MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 1V, L = 0.33µH, TA = 25°C, unless otherwise noted.
Short-Circuit Protection Steady
State
Short-Circuit Protection Recovery
IOUT = 0A
Short output to GND
CH1: VOUT
1V/div.
CH1: VOUT
1V/div.
CH2: VPG
5V/div.
CH2: VPG
5V/div.
CH3: VSW
10V/div.
CH3: VSW
10V/div.
CH4: IL
10A/div.
CH4: IL
10A/div.
20ms/div.
20ms/div.
Load Transient
IOUT = 6A to 12A
CH1:
VOUT/AC
50mV/div.
CH4: IL
5A/div.
200µs/div.
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12
MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
FUNCTIONAL BLOCK DIAGRAM
VIN
Bias &
Voltage
Reference
EN
3.3MΩ
Bootstrap
Regulator
BST
3.3V
LDO
HS
Driver
Main Switch
(NCH)
ISS
SS
SW
EA
On
Timer
Logic
Control
VCC
COMP
FB
BUF
LS
Driver
Ramp
PWM
Current
Modulator
90% VREF Rising
80% VREF Falling
Synchronous
Rectifier (NCH)
Current Sense
Amplifier
PG
120% VREF Rising
110% VREF Falling
GND
Figure 1: Functional Block Diagram
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MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
OPERATION
The MP8774H is a fully integrated,
synchronous, rectified, step-down, switch-mode
converter. Constant-on-time (COT) control is
employed to provide fast transient response
and ease loop stabilization. Figure 2 shows the
simplified ramp compensation block in the
MP8774H. At the beginning of each cycle, the
high-side MOSFET (HS-FET) turns on when
the feedback voltage (VFB) is below the
reference voltage (VREF), which indicates an
insufficient output voltage. The on period is
determined by both the output voltage and input
voltage to make the switching frequency fairly
constant over the input voltage range.
After the on period elapses, the HS-FET turns
off. The HS-FET turns on again when VFB drops
below VREF. By repeating operation in this way,
the converter regulates the output voltage. The
integrated low-side MOSFET (LS-FET) turns on
when the HS-FET is off to minimize conduction
loss. There is a dead short, called shootthrough, between the input and GND if both the
HS-FET and LS-FET are turned on at the same
time. To avoid shoot-through, a dead time (DT)
is generated internally between the HS-FET off
and LS-FET on period, or vice versa.
Internal compensation is applied for COT
control to provide a more stable operation, even
when ceramic capacitors are used as output
capacitors.
This
internal
compensation
improves jitter performance without affecting
the line or load regulation.
voltage (VEAO), the HS-FET turns on for a fixed
interval, determined by the one-shot on-timer.
When the HS-FET turns off, the LS-FET turns
on until the next period.
Figure 3: Heavy-Load Operation
In CCM operation, the switching frequency is
fairly constant. This is called pulse-width
modulation (PWM) mode.
Light-Load Operation
When the MP8774H works in pulse-frequency
modulation (PFM) during light-load operation,
the MP8774H reduces the switching frequency
automatically to maintain high efficiency, and
the inductor current drops almost to zero. When
the inductor current reaches zero, the LS-FET
driver goes into tri-state (Hi-Z) (see Figure 4).
Therefore, the output capacitors discharge
slowly to GND through the LS-FET, R1, and R2.
This operation improves device efficiency
greatly when the output current is low.
tON is constant
VIN
REF
FB
On
Timer
BUF
RAMP
Logic
Control
L
VOUT
VSW
SW
RESR
R1
VOUT
COUT
RAMP
GENERATOR
IL
IOUT
R2
PWM
VRAMP
Figure 2: Simplified Ramp Compensation Block
Heavy-Load Operation
Continuous conduction mode (CCM) is when
the output current is high and the inductor
current is always above 0A (see Figure 3).
When VFB is below the error amplifier output
VEAO
Figure 4: Light-Load Operation
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MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
Light-load operation is also called skip mode
because the HS-FET does not turn on as
frequently as it does during heavy-load
conditions. The HS-FET turn-on frequency is a
function of the output current. As the output
current increases, the current modulator
regulation time period becomes shorter, and the
HS-FET turns on more frequently. The switching
frequency increases in turn. The output current
reaches the critical level when the current
modulator time is zero, and can be determined
with Equation (1):
IOUT
(VIN VOUT ) VOUT
2 L fSW VIN
(1)
The device reverts to PWM mode once the
output current exceeds the critical level.
Afterward, the switching frequency remains
fairly constant over the output current range.
VCC Regulator
The 3.4V internal regulator powers most of the
internal circuitries. This regulator takes VIN and
operates in the full VIN range. When VIN
exceeds 3.4V, the output of the regulator is in
full regulation. When VIN falls below 3.4V, the
output of the regulator decreases following VIN.
A 1μF decoupling ceramic capacitor is needed
at VCC.
Enable (EN)
EN is a digital control pin that turns the
regulator on and off. Drive EN above 1.25V to
turn on the regulator. Drive EN below 1V to turn
off the regulator. When floating, EN is pulled
down to GND by an internal 3.3MΩ resistor. EN
can be connected directly to VIN, and supports a
18V input range.
Under-Voltage Lockout (UVLO)
Under-voltage lockout (UVLO) protects the chip
from operating at an insufficient supply voltage.
The MP8774H UVLO comparator monitors the
output voltage of the internal regulator (VCC).
The VCC UVLO rising threshold is about 2.8V,
while its falling threshold is 2.45V.
When the input voltage is higher than the UVLO
rising threshold voltage, the MP8774H powers
up. The MP8774H shuts off when the input
voltage is lower than the UVLO falling threshold
voltage. This is a non-latch protection.
Soft Start (SS)
The MP8774H employs a soft start (SS)
mechanism to ensure smooth output ramping
during power-up. When EN goes high, an
internal current source (6μA) charges up the SS
capacitor. The SS capacitor voltage takes over
VREF to the PWM comparator. The output
voltage ramps up smoothly with the SS voltage
(VSS). Once VSS rises above VREF, it continues to
ramp up until VREF takes over. At this point, the
soft start finishes, and the device enters steadystate operation.
The SS capacitor value can be determined with
Equation (2):
Css (nF) 0.83
t ss (ms) Iss (A)
VREF (V)
(2)
If the output capacitance is large, it is not
recommended to set the SS time too short.
Otherwise, the current limit can be reached
easily during SS. An SS capacitor of less than
4.7nF should be avoided.
Power Good (PG) Indicator
PG is the open drain of a MOSFET that
connects to VCC or another voltage source
through a resistor (e.g. 100kΩ). The MOSFET
turns on with the application of an input voltage,
so PG is pulled to GND before SS is ready.
After VFB reaches 90% of VREF, there is a 50μs
delay, and then PG is pulled high. When VFB
drops to 80% of VREF, PG is pulled low.
When UVLO or over-temperature protection
(OTP) occurs, PG is pulled low immediately.
When an over-current (OC) condition occurs,
PG is pulled low when VFB drops below 80% of
VREF following a 0.05ms delay. When an overvoltage (OV) condition occurs, PG is pulled low
when VFB rises above 120% of VREF following a
0.05ms delay. If VFB falls below 110% of VREF,
PG is pulled high following a 0.05ms delay.
If the input supply fails to power the MP8774H,
PG is clamped low, even though PG is tied to
an external DC source through a pull-up
resistor. Figure 5 shows the relationship
between the PG voltage and the pull-up current.
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MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
Thermal Shutdown
Thermal shutdown prevents the chip from
operating at exceedingly high temperatures.
When the silicon die temperature exceeds
150°C, the entire chip shuts down. When the
temperature falls below its lower threshold
(typically 130°C), the chip is enabled again.
PG Clamped Voltage vs. Pull-Up Current
PG CLAMPED VOLTAGE (V)
1.2
1
0.8
0.6
0.4
0.2
0
0
1
2
3
PULL-UP CURRENT (mA)
4
5
Figure 5: PG Clamped Voltage vs. Pull-Up
Current
Over-Current Protection (OCP) and ShortCircuit Protection (SCP)
The MP8774H has a valley-limit control. The
LS-FET monitors the current flowing through
the LS-FET. The HS-FET waits until the valley
current limit is removed before turning on again.
Meanwhile, the output voltage drops until VFB is
below the under-voltage (UV) threshold
(typically 50% below the reference). Once UV is
triggered, the device enters hiccup mode to
restart the part periodically.
During over-current protection (OCP), the
MP8774H attempts to recover from the overcurrent fault with hiccup mode. This means that
the chip disables the output power stage,
discharges the soft-start capacitor, and
attempts to soft start again automatically. If the
over-current condition still remains after the soft
start ends, the device repeats this operation
cycle until the over-current condition disappears,
and then the output rises back to the regulation
level. OCP is a non-latch protection.
Pre-Bias Start-Up
The MP8774H is designed for monotonic startup into pre-biased loads. If the output is prebiased to a certain voltage during start-up, the
BST voltage is refreshed and charged, and the
voltage on the soft-start capacitor is charged as
well. If the BST voltage exceeds its rising
threshold voltage and the soft-start capacitor
voltage exceeds the sensed output voltage at
FB, the part begins working normally.
Floating Driver and Bootstrap Charging
An external bootstrap capacitor powers the
floating power MOSFET driver. This floating
driver has its own UVLO protection, with a
rising threshold of 1.7V and a hysteresis of
150mV. VIN regulates the bootstrap capacitor
voltage internally through D1, M1, R4, C4, LO,
and CO (see Figure 6). If VIN - VSW exceeds 5V,
U2 regulates M1 to maintain a 3.3V BST
voltage across C4. The BST resistor (R4) is
recommended to be less than 4.7Ω.
VIN
D1
3.3V
M1
R4
C4
U2
SW
VOUT
LO CO
Figure 6: Internal Bootstrap Charger
Start-Up and Shutdown Circuit
If both VIN and EN exceed their respective
thresholds, the chip starts up. The reference
block starts first, generating a stable reference
voltage and current, and then the internal
regulator is enabled. The regulator provides a
stable supply for the remaining circuits.
Three events can shut down the chip: EN low,
VIN low, and thermal shutdown. The shutdown
procedure starts by blocking the signaling path
initially to avoid any fault triggering. The internal
supply rail is then pulled down.
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MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
APPLICATION INFORMATION
Setting the Output Voltage
An external resistor divider is used to set the
output voltage. First, choose a value for R2. R2
should be chosen carefully, as a small R2 leads
to considerable quiescent current loss, while a
large R2 makes FB noise-sensitive. R2 is
recommended to be between 2kΩ and 100kΩ.
Set the current through R2 to be below 250µA
for a good balance between system stability
and no-load loss. Then determine R1 with
Equation (3):
R1
VOUT VREF
R2
VREF
(3)
VOUT
FB
R1
Cf
Rt
R2
Figure 7: Feedback Network
Table 1 lists the recommended resistor values
for common output voltages.
Table 1: Resistor Selection for Common Output
Voltages
VOUT
(V)
1.0
1.2
1.5
1.8
2.5
3.3
5
R1
(kΩ)
20
20
20
20
20
20
20
R2
(kΩ)
30
20
13
10
6.34
4.42
2.7
L (μH)
0.33
0.33
0.33
0.47
0.47
0.56
0.68
Cf
(pF)
56
56
56
56
56
56
56
L
VOUT
V
(1 OUT )
fSW IL
VIN
Rt
(kΩ)
1
1
1
1
1
1
1
Selecting the Inductor
An inductor is necessary for supplying constant
current to the output load while being driven by
the switched input voltage. A larger-value
inductor results in less ripple current and a
lower output ripple voltage, but also has a
larger physical footprint, higher series
resistance, and lower saturation current. A good
rule for determining the inductance value is to
(4)
Where ∆IL is the peak-to-peak inductor ripple
current.
The inductor should not saturate under the
maximum inductor peak current. Calculate the
peak inductor current with Equation (5):
ILP IOUT
Figure 7 shows the feedback circuit.
MP8774H
design the peak-to-peak ripple current in the
inductor to be between 30% and 40% of the
maximum output current, and ensure that the
peak inductor current is below the maximum
switch current limit. The inductance value can
be calculated with Equation (4):
VOUT
V
(1 OUT )
2fSW L
VIN
(5)
Selecting the Input Capacitor
The step-down converter has a discontinuous
input current, and requires a capacitor to supply
AC current to the converter while maintaining
the DC input voltage. For the best performance,
use ceramic capacitors placed as close to VIN
as possible. Capacitors with X5R and X7R
ceramic dielectrics are recommended because
they are fairly stable amid temperature
fluctuations. The capacitors must also have a
ripple current rating greater than the maximum
input ripple current of the converter. The input
ripple current can be estimated with Equation
(6):
ICIN IOUT
VOUT
V
(1 OUT )
VIN
VIN
(6)
The worst-case condition occurs at VIN = 2VOUT,
calculated with Equation (7):
ICIN
IOUT
2
(7)
For simplification, choose an input capacitor
with an RMS current rating greater than half of
the maximum load current.
The input capacitance value determines the
input voltage ripple of the converter. If there is
an input voltage ripple requirement in the
system, choose an input capacitor that meets
the specification.
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MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
The input voltage ripple can be estimated with
Equation (8):
VIN
IOUT
V
V
OUT (1 OUT )
fSW CIN VIN
VIN
(8)
The worst-case condition occurs at VIN = 2VOUT,
calculated with Equation (9):
VIN
I
1
OUT
4 fSW CIN
(9)
Selecting the Output Capacitor
An output capacitor is required to maintain the
DC output voltage. Ceramic or POSCAP
capacitors are recommended. The output
voltage ripple can be estimated with Equation
(10):
VOUT
VOUT
V
1
(1 OUT ) (RESR
)
fSW L
VIN
8 fSW COUT
(10)
The maximum output capacitor value (Co_max)
can be limited approximately with Equation (13):
CO _ MAX (ILIM_ AVG IOUT ) t ss / VOUT (13)
Where ILIM_AVG is the average start-up current
during the soft-start period, and tss is the softstart time.
Design Example
Table 2 shows a design example when ceramic
capacitors are applied.
Table 2: Design Example
12V
VIN
1V
VOUT
12A
IOUT
For detailed application schematics, see page
20. The typical performance and waveforms are
shown in the Typical Characteristics section on
page 6. For more devices applications, refer to
the related evaluation board datasheet.
For ceramic capacitors, the capacitance
dominates the impedance at the switching
frequency. The output voltage ripple is mainly
caused by the capacitance. For simplification,
the output voltage ripple can be estimated with
Equation (11):
VOUT
VOUT
V
(1 OUT )
8 fSW 2 L COUT
VIN
(11)
For POSCAP capacitors, the ESR dominates
the impedance at the switching frequency. For
simplification, the output ripple can be
estimated with Equation (12):
VOUT
VOUT
V
(1 OUT ) RESR
fSW L
VIN
(12)
In addition to considering the output ripple,
choosing a larger output capacitor can also
result in a better load transient response. Be
sure to consider the maximum output capacitor
limitation in the design application. If the output
capacitor value is too high, the output voltage
cannot reach the design value during the softstart time, and fails to regulate.
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MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
PCB Layout Guidelines
Efficient PCB layout of the switching power
supplies is critical for stable operation. Poor
layout design can result in poor line or load
regulation and stability issues. For better
performance, it is recommended to use a 4layer board (two middle layers are GND). For
best results, refer to Figure 8 and follow the
guidelines below:
Top Layer
VIN
GND
1. Place the high-current paths (GND, VIN,
and SW) very close to the device with short,
direct, and wide traces.
2. Place the input capacitor as close to VIN
and GND as possible.
Bottom Layer
Figure 8: Recommended Layout
3. Place a VCC decoupling capacitor close to
the device.
4. Connect AGND and PGND at the point of
the VCC capacitor’s ground connection.
5. Place the external feedback resistors next
to FB.
6. Keep the switching node (SW) short and
away from the feedback network.
GND
VIN
SW
GND
VOUT
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MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
VIN
12V
C1
22µF
8
C1A
22µF
C1B
0.1µF
VIN
BST
R3
0Ω
C3
0.1µF L1
0.33µH
R6
100kΩ
MP8774H
3
EN
PG
7
SW
NC
FB
14
PGND
9,10,11,
12,13
SS
VOUT
1V
16
1,15
C6
56pF
R1
C2
C2A C2B
20kΩ 22µF 22µF 22µF
C2C
22µF
4
R2
30kΩ
R4
1kΩ
VCC
C4
1µF
AGND
EN
PG
R5
100kΩ
2
6
C5
22nF
5
Figure 9: VIN = 12V, VOUT = 1V, IOUT = 12A (8)
VIN
12V
C1
22µF
8
C1A
22µF
C1B
0.1µF
VIN
BST
C3
0.1µF L1
0.33µH
R6
100kΩ
MP8774H
3
EN
PG
7
R5
100kΩ
SW
NC
FB
14
PGND
9,10,11,
12,13
SS
VOUT
1.2V
16
1,15
C6
56pF
R1
C2
C2A C2B
20kΩ 22µF 22µF 22µF
C2C
22µF
4
R2
20kΩ
R4
1kΩ
VCC
C4
1µF
AGND
EN
PG
2
R3
0Ω
6
C5
22nF
5
Figure 10: VIN = 12V, VOUT = 1.2V, IOUT = 12A (8)
VIN
12V
C1
22µF
8
C1A
22µF
C1B
0.1µF
VIN
BST
C3
0.1µF L1
0.33µH
MP8774H
SW
NC
FB
9,10,11,
12,13
SS
5
VOUT
1.5V
16
1,15
C6
56pF
R1
C2
C2A C2B
20kΩ 22µF 22µF 22µF
C2C
22µF
4
R4
1kΩ
VCC
PGND
C4
1µF
14
EN
PG
AGND
7
R5
100kΩ
R3
0Ω
R6
100kΩ
3
EN
PG
2
6
R2
13kΩ
C5
22nF
Figure 11: VIN = 12V, VOUT = 1.5V, IOUT = 12A (8)
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MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS (continued)
VIN
12V
C1
22µF
8
C1A
22µF
C1B
0.1µF
VIN
BST
C3
0.1µF L1
0.47µH
3
EN
PG
7
SW
NC
FB
14
PGND
9,10,11,
12,13
SS
VOUT
1.8V
16
1,15
C6
56pF
R1
C2
C2A C2B
20kΩ 22µF 22µF 22µF
C2C
22µF
4
R2
10kΩ
R4
1kΩ
VCC
C4
1µF
AGND
R5
100kΩ
R3
0Ω
R6
100kΩ
MP8774H
EN
PG
2
6
C5
22nF
5
Figure 12: VIN = 12V, VOUT = 1.8V, IOUT = 12A (8)
VIN
12V
C1
22µF
8
C1A
22µF
C1B
0.1µF
VIN
BST
C3
0.1µF L1
0.47µH
3
EN
PG
7
SW
NC
FB
14
PGND
9,10,11,
12,13
SS
VOUT
2.5V
16
1,15
C6
56pF
R1
C2
C2A C2B
20kΩ 22µF 22µF 22µF
C2C
22µF
4
R2
6.34kΩ
R4
1kΩ
VCC
C4
1µF
AGND
R5
100kΩ
R3
0Ω
R6
100kΩ
MP8774H
EN
PG
2
6
C5
22nF
5
Figure 13: VIN = 12V, VOUT = 2.5V, IOUT = 12A (8)
VIN
12V
C1
22µF
8
C1A
22µF
C1B
0.1µF
VIN
BST
C3
0.1µF L1
0.56µH
3
SW
NC
FB
9,10,11,
12,13
SS
5
VOUT
3.3V
16
1,15
C6
56pF
R1
C2
C2A C2B
20kΩ 22µF 22µF 22µF
C2C
22µF
4
R4
1kΩ
VCC
PGND
C4
1µF
14
EN
PG
AGND
7
R5
100kΩ
R3
0Ω
R6
100kΩ
MP8774H
EN
PG
2
6
R2
4.42kΩ
C5
22nF
Figure 14: VIN = 12V, VOUT = 3.3V, IOUT = 12A (8)
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MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS (continued)
VIN
12V
C1
22µF
8
C1A
22µF
C1B
0.1µF
VIN
BST
C3
0.1µF L1
0.68µH
3
SW
NC
FB
9,10,11,
12,13
SS
5
VOUT
5V
16
1,15
C6
56pF
R1
C2
C2A C2B
20kΩ 22µF 22µF 22µF
C2C
22µF
4
R4
1kΩ
VCC
PGND
C4
1µF
14
EN
PG
AGND
7
R5
100kΩ
R3
0Ω
R6
100kΩ
MP8774H
EN
PG
2
6
R2
2.7kΩ
C5
22nF
Figure 15: VIN = 12V, VOUT = 5V, IOUT = 12A (8)
Note:
8)
When VIN is low, see the Selecting the Input Capacitor section on page 17.
MP8774H Rev. 1.0
www.MonolithicPower.com
5/22/2019
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
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MP8774H – 18V, 12A, SYNCHRONOUS, STEP-DOWN CONVERTER
PACKAGE INFORMATION
QFN-16 (3mmx3mm)
PIN 1 ID
MARKING
PIN 1 ID
INDEX AREA
TOP VIEW
BOTTOM VIEW
SIDE VIEW
NOTE:
1) ALL DIMENSIONS ARE IN
MILLIMETERS.
2) LEAD COPLANARITY SHALL BE 0.10
MILLIMETERS MAX.
3) JEDEC REFERENCE IS MO-220.
4) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP8774H Rev. 1.0
www.MonolithicPower.com
5/22/2019
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2019 MPS. All Rights Reserved.
23
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