MP8796B
16V, 30A, Scalable, Digital, Synchronous
Step-Down Converter with PMBus
DESCRIPTION
FEATURES
The MP8796B is a fully integrated, PMBuscompatible, high-frequency, synchronous buck
converter. The MP8796B offers a very compact
solution that achieves up to 30A of output
current per phase with excellent load and line
regulation over a wide input supply range. The
MP8796B operates at high efficiency over a
wide output current load range.
The PMBus interface provides converter
configurations and key parameter monitoring.
The MP8796B adopts MPS’s proprietary, multiphase constant-on-time (MCOT) control, which
provides fast transient response and eases loop
stabilization. The MCOT control scheme also
allows multiple MP8796B devices to be
connected in parallel with excellent current
sharing and phase interleaving for high-current
applications.
Fully integrated protection features include
over-current protection (OCP), over-voltage
protection (OVP), under-voltage protection
(UVP), and over-temperature protection (OTP).
The MP8796B requires a minimal number of
readily available, standard external components,
and is available in a TQFN-25 (4mmx5mm)
package.
PMBus 1.3 Compliant
Scalable Multi-Phase Operation
3.1V to 16V with External 3.3V VCC Bias,
4V to 16V with Internal Bias or External
3.3V VCC Bias
30A Continuous Output Current per Phase
Low RDS(ON) Integrated Power MOSFETs
Lossless, Accurate On-Die Current Sensing
Adaptive COT for Ultra-Fast Transient
Response
Stable with Zero-ESR Output Capacitors
0.5% Reference Voltage Over 0°C to +70°C
Junction Temperature Range
Output Voltage True Remote Sense
Output Adjustable from 0.4V to 0.9 x VIN Up
to 5.5V Max
Output Voltage/Current, Input Voltage, and
Junction Temperature Reporting
Built-In MTP to Store Custom
Configurations
Configurable via PMBus
o Output Voltage
o Output Current Limit
o Selection of Pulse Skip or Forced CCM
Operation
o Soft-Start Time
o Selection of Switching Frequency from
400kHz, 600kHz, 800kHz, or 1000kHz
o Selection of Hiccup or Latch-Off Mode
for OCP, OVP, and OTP
o Ramp Compensation
Available in a TQFN-25 (4mmx5mm)
Package
APPLICATIONS
Telecom and Networking Systems
Base Stations
Servers
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For
MPS green status, please visit the MPS website under Quality Assurance.
“MPS”, the MPS logo, and “Simple, Easy Solutions” are trademarks of
Monolithic Power Systems, Inc. or its subsidiaries.
MP8796B Rev. 1.0
www.MonolithicPower.com
1/19/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
1
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
TYPICAL APPLICATION CIRCUITS
Single-Phase Operation
R1
CBST
VIN
BST
IN
CIN
L1
VOUT
SW
MP8796B
EN
COUT
FB
EN
PG
R2
CVCC
CCDRV
ALT
RADDR
SCL
RREF
SDA
Two-Phase Operation
CBST
R1
VIN
IN
BST
L1
VOUT
SW
CIN
MP8796B
COUT
EN
EN
FB
PG
CVCC
CDRV
RADDR
RREF
CBST1
L2
IN
BST
SW
CIN1
MP8796B
EN
CVCC1
FB
CDRV1
ALT
RADDR1
SCL
SDA
RREF1
MP8796B Rev. 1.0
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1/19/2020
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© 2020 MPS. All Rights Reserved.
2
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP8796BGVT- xxxx**
TQFN-25 (4mmx5mm)
See Below
MP8796BGVT - 0000
TQFN-25 (4mmx5mm)
See Below
EVKT-MP8796B-30A
EVKT-MP8796B-180A
Evaluation kit
Evaluation kit
See Below
See Below
MSL
Rating
Note
Single phase 0.92V
output
1
* For Tape & Reel, add suffix –Z (e.g. MP8796BGVT-xxxx**–Z).
** “xxxx” is the configuration code identifier for the register settings stored in the MTP. The default number is
“0000”. Each “x” is a hexadecimal value between 0 and F. See table 7 and 8 on page 51 for the detailed
configuration and register value. For customized configurations, please contact MPS Field Application Engineer to
assign a 4-digit suffix code.
TOP MARKING
MPS: MPS prefix
Y: Year code
WW: Week code
M8796B: Part number
LLLLLL: Lot number
EVALUATION KIT EVKT-MP8796B
Contents (items below can be ordered separately, and the GUI installation file and supplemental documents can
be downloaded from the MPS website):
EVKT-MP8796B-30A: Single-phase
Item #
Part Number
1
EV8796B-V-1Phase-00A
2
EVKT-USBI2C-02
Item
Quantity
MP8796B single phase evaluation board
1
Includes one USB to I2C communication interface
device, one USB cable, and one ribbon cable
1
EVKT-MP8796B-180A: Six-phase
Item #
Part Number
1
EV8796B-V-6Phase-00A
2
EVKT-USBI2C-02
Item
Quantity
MP8796B six-phase evaluation board
I2C
Includes one USB to
communication interface
device, one USB cable, and one ribbon cable
1
1
Order directly from monolithicpower.com or our distributors.
MP8796B Rev. 1.0
www.MonolithicPower.com
1/19/2020
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© 2020 MPS. All Rights Reserved.
3
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
Input Power Supply
Input
USB Cable
GUI
Ribbon Cable
Evaluation Board
2
USB to I C Communication
Interface EVKT-USBI2C-02
Output
Load
Load
Figure 1: EVKT-MP8796B Kit Set-Up
PACKAGE REFERENCE
TOP VIEW
BST
VCC
25
24
AGND VOSNS+ VOSNS- IREF
23
22
21
20
ISUM ADDR
PS#
19
IN
SW
16 IN
2
15 PGND
SW
3
PGND 4
14
5
6
7
8
9
10
VDRV
SCL
SDA
ALT#
CTRL
PG
11
12
PASS TAKE
PGND
13
SET
TQFN-25 (4mmx5mm)
MP8796B Rev. 1.0
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1/19/2020
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4
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
PIN FUNCTIONS
Pin #
Name
1, 16
IN
2, 3
SW
4, 14, 15
PGND
5
VDRV
6
7
SCL
SDA
8
ALT#
9
CTRL
10
PG
11
PASS
12
TAKE
13
SET
17
PS#
18
ADDR
19
ISUM
20
IREF
21
22
23
Description
Supply voltage. IN supplies power to the internal MOSFET and regulator. Use an input
capacitor to decouple the input rail. Use wide PCB traces and multiple vias to make the
connection.
Switch output. Connect SW to the inductor and bootstrap capacitor. SW is driven up to
VIN by the high-side switch during the PWM duty cycle on time. The inductor current drives
SW negative during the off time. Use wide PCB traces to make the connection.
System ground. PGND is the reference ground of the regulated output voltage, and
requires careful consideration during PCB layout. Connect PGND with wide PCB traces.
Decoupling input pin for 3.3V driver power supply. Decouple VDRV with a minimum
1µF ceramic capacitor, placed as close to VDRV as possible. X7R or X5R-grade dielectric
ceramic capacitors are recommended. VDRV accepts a 3.3V external bias. If no 3.3V
external bias is provided, connect VDRV to VCC through a 2Ω to 10Ω resistor.
PMBus clock.
PMBus data.
PMBus alert pin. ALT# is active low. A pull-up resistor connected to 3.3V is required if the
ALT# function is needed.
PMBus control pin. CTRL is a digital input pin that turns the regulator on or off with
proper ON_OFF_CONFIG (02h) configuration. Drive CTRL high to turn on the regulator;
drive it low to turn off the regulator. Do not float CTRL.
Power good output. The output of PG is an open-drain signal. PG requires a pull-up
resistor connected to a DC voltage to indicate high if the output voltage is above 90% of
the nominal voltage. There is a PGOOD delay from low to high. PG must be pulled high to
ensure proper operation.
Passes RUN signals to the next phase.
Receives RUN signals from the previous phase. TAKE is used for master detection
during the device’s initial power-up. For the master phase, TAKE must be pulled high
through a resistor. For the slave phase, TAKE is connected to the PASS of the previous
phase.
PWM signal. SET turns the high-side MOSFET on when a RUN signal is present. For
multi-phase operation, tie the SET pins of all phases together.
Phase shedding. With proper PMBus setting, pull PS# high to enable a slave phase. Pull
it low to disable a slave phase. Connect PS# of the master phase to AGND.
PMBus slave address setting pin. Connect a resistor from ADDR to AGND to set the
address of this device.
Current-sense output. For single-phase operation, keep ISUM floating. For multi-phase
operation, tie the ISUM pins of all phases together for current sharing.
Reference current generator amplifier output. Connect a 60.4kΩ or 180kΩ resistor with
1% or greater accuracy to IREF.
Output voltage sense negative return. VOSNS- is tied directly to the GND sense point
of the load. Connect VOSNS- to AGND if the remote sense is not used.
Output voltage sense positive return. Connect VOSNS+ to the output voltage sense
VOSNS+
positive side to provide feedback voltage to the system. Avoid vias on the VO traces.
AGND Analog ground. Select AGND as the control-circuit reference point.
VOSNS-
MP8796B Rev. 1.0
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1/19/2020
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5
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
PIN FUNCTIONS (continued)
Pin #
Name
24
VCC
25
BST
Description
Internal 3.3V LDO output. VCC powers the analog and digital control circuits. Decouple
VCC with a minimum 4.7µF ceramic capacitor, placed as close to VCC as possible. X7R
or X5R-grade dielectric ceramic capacitors are recommended. During MTP programming,
a 5V voltage with a 300ms period may be observed on VCC. The VCC pin does not
accept external voltage bias. For multi-phase applications, connect the VCC pins of all
phases together.
Bootstrap. A capacitor connected between SW and BS is required to form a floating
supply across the high-side switch driver.
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (5)
Supply voltage (VIN) ...................................... 18V
VIN - VSW (DC) ................................ -0.3V to +18.3V
VIN - VSW (25nc) .................................... -5V to +25V
VSW (DC) ........................................ -0.3V to +18.3V
VSW (25ns) (2)......................................... -5V to +25V
VBST............................................................. 22.3V
VBST - VSW (25ns) (2) ............................................. 5V
VCC, VDRV ..................................................... 4.5V
VCC (1s) (3).......................................................... 6V
All other pins ................................ -0.3V to +4.3V
All other pins (1s) (3) ........................................... 6V
Junction temperature ................................ 170°C
Lead temperature...................................... 260°C
Storage temperature .................-65°C to +170°C
TQFN-25 (4mmx5mm) ......... 1.8 ....... 6.3 ... °C/W
θJB
θJC_TOP
Notes:
1) Exceeding these ratings may damage the device.
2) Specified by design. Measured using a differential
oscilloscope probe.
3) Voltage rating during MTP programming.
4) The device is not guaranteed to function outside of its
operating conditions.
5) θJB is the thermal resistance from the junction to the board
around the PGND soldering point.
θJC_TOP is the thermal resistance from the junction to the top of
the package.
ESD Rating
Human-body model (HBM) ......................... ±1kV
Charged-device model (CDM)................... ±2kV
Recommended Operating Conditions (4)
Supply voltage (VIN) ............................ 4V to 16V
Output voltage (VOUT) ...................... 0.6V to 5.5V
External VDRV bias ........................... 2.9V to 3.6V
Operating junction temp (TJ) .....-40°C to +125°C
MP8796B Rev. 1.0
www.MonolithicPower.com
1/19/2020
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© 2020 MPS. All Rights Reserved.
6
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
ELECTRICAL CHARACTERISTICS
VIN = 12V, TJ = -40°C to +125°C(7), typical value is tested at TJ = 25°C, unless otherwise noted.
Parameters
VIN Supply Current
Supply current (quiescent)
MOSFET
RDS(ON)
Switch leakage
Symbol
Condition
IIN
RONHS
RONLS
SWLKG_HS
SWLKG_LS
Typ
Max
Units
VCTRL = 0V
2.5
4
mA
SW = 0V
SW = 12V
4.4
1.5
0.1
1
10
20
μA
30
33
A
Output Current Limit
Output current limit (inductor
ILIM_VALLEY
D7h = 0x14
valley)
Min output current limit
(inductor valley) programmable ILIM_VALLEY_MIN
value (6)
Max output current limit
(inductor valley) programmable ILIM_VALLEY_MAX
value
Min output over-current
ILIM_DC_MIN
programmable value (6)
Min output over-current warning
programmable value (6)
D5h[2] = 1b’0
Low-side negative current limit
ILIM_NEG_OVP
in OVP
D5h[2] = 1b’1
Low-side negative current limit
ILIM_NEG_OSM
in OSM (6)
Frequency and Timer
VO = 1V, IO = 0A, TA = 25°C,
(D2h[2:1] = 2b’00)
VO = 1V, IO = 0A, TA = 25°C,
(D2h[2:1]
= 2b’01)
Switching frequency (6)
fSW
VO = 1V, IO = 0A, TA = 25°C,
(D2h[2:1] = 2b’10)
VO = 1V, IO = 0A, TA = 25°C,
(D2h[2:1] = 2b’11)
Minimum on time (6)
tON_MIN
fSW = 1000kHz, VO = 0.6V
Minimum off time (6)
tOFF_MIN
VFB = 580mV
Min
27
mΩ
1.5
36
40
A
44
A
3
A
3
A
-13
-20
A
A
-10
A
280
400
520
kHz
480
600
720
kHz
680
800
920
kHz
850
1000
1150
kHz
50
220
MP8796B Rev. 1.0
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1/19/2020
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ns
ns
7
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C(7), typical value is tested at TJ = 25°C, unless otherwise noted.
Parameters
Symbol
Condition
Output Over-Voltage and Under-Voltage Protection (OVP, UVP)
OVP threshold
VOVP
Default setting (D4h[1:0] = 2b’00)
UVP threshold
VUVP
Default setting (D9h[3:2] = 2b’10)
Max programmable OVP
D4h[1:0] = 2b’11
VOVP_MAX
threshold
Min programmable OVP
D4h[1:0] = 2b’00
VOVP_MIN
threshold
OVP threshold resolution
Max programmable UVP
threshold
Min programmable UVP
threshold
OSM threshold falling
Typ
Max
Units
112%
76%
115%
79%
83%
VREF
VREF
127%
130%
133%
VREF
112%
115%
VREF
5%
VREF
Per LSB
VUVP_MAX
D9h[3:2] = 2b’11
81%
84%
88%
VREF
VUVP_MIN
D9h[3:2] = 2b’00
66%
69%
72%
VREF
UVP threshold resolution
OSM threshold rising
Min
Per LSB
VOSM_RISE
VOSM_FALL
VREF
VREF
VREF
5%
104.8%
EAh[9] = 1b’0
102.2%
CTRL
Input high voltage
VIH_CTRL
Input low voltage
VIL_CTRL
ADC
2.15
V
1.20
V
1.28
V
(6)
Input voltage range
0
10
Bits
DNL
1
LSB
Sample rate
3
kHz
ADC resolution
DAC (Feedback Voltage)
Range
Feedback accuracy
Resolution
Output voltage slew rate
VFB
21h = 0x012C, D1h[1:0] = 2b’00
Per LSB
Default setting
(DAh[3:0] = 4b’0000)
Minimum output voltage slew
DAh[3:0] = 4b’1111
rate
Maximum output voltage slew
DAh[3:0] = 4b’0000
rate
Maximum feedback voltage with VFB_MG_HIGH_
margin (6)
MAX
Minimum feedback voltage with VFB_MG_LOW_
margin (6)
MIN
Feedback voltage with margin
VFB_MG_HIGH
high (6)
Feedback voltage with margin
VFB_MG_LOW
low (6)
512
594
600
600
2
672
606
20
30
40
20
50
mV
mV
mV
µs/
2mV
µs/
2mV
µs/
2mV
672
mV
512
mV
672
mV
512
mV
MP8796B Rev. 1.0
www.MonolithicPower.com
1/19/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
8
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C(7), typical value is tested at TJ = 25°C, unless otherwise noted.
Parameters
Symbol
Soft Start and Turn-On Delay
Soft-start time
tSS
Min programmable soft-start
tSS_MIN
time (6)
Max programmable soft-start
tSS_MAX
time (6)
Turn-on delay
tON_DELAY
(6)
Min turn-on delay
tON_DELAY_MIN
(6)
Max turn-on delay
tON_DELAY_MAX
Error Amplifier
Feedback current
IFB
Soft Shutdown
Soft shutdown discharge
RON_DISCH
MOSFET
Under-Voltage Lockout (UVLO)
VCC under-voltage lockout
VCCVth_Rise
threshold rising
VCC under-voltage lockout
VCCVth_Fall
threshold falling
VCC output voltage
VCC
Min input programmable
VIN_ON_MIN
turn-on voltage
Max input programmable
VIN_ON_MAX
turn-on voltage
Min input programmable
VIN_OFF_MIN
turn-off voltage (6)
Max input programmable
VIN_OFF_MAX
turn-off voltage
VDRV under-voltage lockout
VDRVVth_Rise
rising threshold
VDRV under-voltage lockout
falling threshold
Condition
Min
Typ
Max
Units
61h[2:0] = 3b’001
1.7
2.3
3.0
ms
61h[2:0] = 3b’000
60h = 0x0001
60h = 0x0000
60h = 0x0100
ms
16
ms
4.5
0
1024
5.1
ms
ms
ms
VFB = VREF
50
100
nA
TJ = 25°C
60
120
Ω
2.60
2.75
2.9
V
2.35
2.50
2.65
V
3.10
3.25
3.40
V
2.65
2.90
3.1
V
16
16.5
17
V
2.5
2.75
3
V
VCC = 3.3V
VCC = 3.3V
3.9
1
15.75
VDRVVth_Fall
V
2.55
2.75
2.95
V
2.15
2.35
2.55
V
91%
94%
97%
VREF
112% 115% 118%
VREF
76%
79%
83%
VREF
1.6
2.0
2.4
ms
0.3
V
Power Good (PG)
Power good high threshold
PGVth_Hi_Rise
PGVth_Lo_Rise
Power good low threshold
PGVth_Lo_Fall
Power good low-to-high delay
PGTd
Power good sink current
capability
VPG
FB from low to high, default
setting (D9h[1:0] = 2b’01)
FB from low to high, default
setting (D4h[1:0] = 2b’00)
FB from high to low, default
setting (D9h[3:2] = 2’b10)
Default setting
(D1h[5:2] = 4b’0000)
IPG = 10mA
MP8796B Rev. 1.0
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1/19/2020
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© 2020 MPS. All Rights Reserved.
9
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C(7), typical value is tested at TJ = 25°C, unless otherwise noted.
Parameters
Symbol
Condition
Power Good (PG)
Power good leakage current
IPG_LEAK
VPG = 3V
VIN = 0V, pull PGOOD up to 3.3V
through a 100kΩ resistor,
TJ = 25°C
VIN = 0V, pull PGOOD up to 3.3V
through a 10kΩ resistor,
TJ = 25°C
VOL_100
Power good low-level output
voltage
VOL_10
Thermal Protection (TP)
TP fault rising threshold (6)
TSD_Rise
TP fault falling threshold (6)
TSD_Fall
Min TP fault temp (6)
Max TP fault temp (6)
TP warning rising threshold (6)
TP warning falling threshold (6)
Min TP warning temp (6)
Max TP warning temp (6)
Monitoring Parameters
Min output voltage monitor
range (6)
Max output voltage monitor
range (6)
Output voltage monitor
accuracy (6)
Output voltage monitor
accuracy (6)
Output voltage bit resolution
Output current monitor
accuracy
Output current monitor
accuracy (6)
Output current bit resolution (6)
Min input voltage monitor (6)
Max input voltage monitor (6)
Input voltage monitor accuracy
Input voltage bit resolution (7)
Min
Typ
Max
Units
1.5
2.3
µA
600
720
mV
700
820
Default setting (4Fh = 0x0091)
Default setting (4Fh = 0x007D
and D6h[2:1] = 2b’00)
145
°C
125
°C
TSD_WARN_MIN
TSD_WARN_MAX
TWARN_Rise Default setting (51h = 0x0078)
Default setting (51h = 0x0078,
TWARN_Fall
D6h[2:1] = 2b’00)
TSD_WARN_MIN
TSD_WARN_MAX
35
165
120
°C
°C
°C
100
°C
35
160
°C
°C
MVOUT_RANGE
0
V
MVOUT_RANGE
5.5
V
MVOUT_ACC
VO = 0.6V to 2.5V
-2%
MVOUT_ACC
VO = 2.5V to 5.5V
50
0.6
+2%
V
50
mV
1.25
mV
MIOUT_ACC
VO = 1.2V, fSW = 800kHz,
IO = 30A
-2.5
+2.5
A
MIOUT_ACC
3A ≤ IO ≤ 30A
-2.5
+2.5
A
MIN_RANGE
MIN_RANGE
MIN_ACC
-2%
62.5
2.5
18
12
25
MP8796B Rev. 1.0
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1/19/2020
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+2%
mA
V
V
V
mV
10
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C(7), typical value is tested at TJ = 25°C, unless otherwise noted.
Parameters
Symbol
Condition
PMBus DC Characteristics (SDA, SCL, ALT#, CTRL) (6)
Input high voltage
VIH
Input low voltage
VIL
Output low voltage
VOL
IOL = 1mA
Input leakage current
SDA, SCL, ALT# = 3.3V
ILEAK
Transient voltage including
Maximum voltage (SDA, SCL,
VMAX
ringing
ALT#, CTRL)
Pin capacitance on SDA,SCL
CPIN
PMBus Timing Characteristics (7)
Min operating frequency
Max operating frequency
Bus free time
Between stop and start condition
Holding time
Repeated start condition
set-up time
Stop condition set-up time
Data hold time
Data set-up time
Clock low timeout
Clock low period
Clock high period
Clock/data fall time
Clock/data rise time
Min
Typ
Max
Units
2.1
0.4
+10
V
V
V
µA
+3.6
V
10
pF
0.8
-10
-0.3
3.3
10
1000
4.7
4.0
kHz
kHz
µs
µs
4.7
µs
4.0
300
250
25
4.7
4.0
µs
ns
ns
ms
µs
µs
ns
ns
35
50
300
1000
Notes:
6) Guaranteed by design.
7) Guaranteed by design; not tested in production. The parameter is tested during parameter characterization.
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
TYPICAL PERFORMANCE CHARACTERISTICS
VIN=12V, VOUT=1.2V, TA=+25°C, unless otherwise noted.
fSW vs. IOUT
Load Regulation
VIN = 12V, CCM
1.215
1000
1.213
900
1.211
800
1.209
700
1.207
600
fSW (kHz)
VO (V)
VIN = 12V, CCM, fSW = 1000kHz
1.205
1.203
500
400
1.201
300
1.199
200
Pulse Skip
CCM
1.197
100
1.195
0
5
10
IO (A)
15
0
20
0
10
20
30
IO (A)
Thermal Derating
Efficiency
VIN = 12V, fSW = 1000kHz, TJ = 125°C,
no air flow
VIN = 12V, fSW = 1000kHz, L = 0.44μH/0.18mΩ
100
35
95
30
20
15
10
Vo=1.2V
Vo=2.5V
Vo=5V
5
EFFICIENCY (%)
90
25
LOAD (A)
1000KHz
800KHz
600KHz
400KHz
85
80
75
70
65
5V
2.5V
1.2V
60
55
50
0
5
55
105
AMBIENT TEMP (℃)
0
10
20
30
IO (A)
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN=12V, VOUT=1.2V, TA=+25°C, unless otherwise noted.
VO Ripple
VO Ripple
IOUT = 0A, CCM, 1000kHz, single phase
IOUT = 30A, CCM, 1000kHz, single phase
CH1: VSW
5V/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
10mV/div.
CH2:
VOUT/AC
10mV/div.
1μs/div.
1μs/div.
VO Ripple
VO Ripple
IOUT = 0A, DCM, 1000kHz, single phase
IOUT = 30A, DCM, 1000kHz, single phase
CH1: VSW
5V/div.
CH1: VSW
5V/div.
CH2:
VOUT/AC
10mV/div.
CH2:
VOUT/AC
10mV/div.
4ms/div.
1μs/div.
Start-Up through CTRL
Start-Up through CTRL
CCM, IOUT = 0A, single phase
CCM, IOUT = 30A, single phase
CH1: VCTRL
2V/div.
CH1: VCTRL
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
CH4:
CH4: VPGOOD
5V/div.
VPGOOD
5V/div.
1ms/div.
1ms/div.
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN=12V, VOUT=1.2V, TA=+25°C, unless otherwise noted.
Start-Up through CTRL
Start-Up through CTRL
DCM, IOUT = 0A, single phase
DCM, IOUT = 30A, single phase
CH1: VCTRL
2V/div.
CH1: VCTRL
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
CH4:
CH4: VPGOOD
5V/div.
VPGOOD
5V/div.
1ms/div.
1ms/div.
Shutdown through CTRL
Shutdown through CTRL
CCM, IOUT = 0A, single phase
CCM, IOUT = 30A, single phase
CH1: VCTRL
2V/div.
CH1: VCTRL
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
CH4:
CH4: VPGOOD
5V/div.
VPGOOD
5V/div.
20ms/div.
20ms/div.
Shutdown through CTRL
Shutdown through CTRL
DCM, IOUT = 0A, single phase
DCM, IOUT = 30A, single phase
CH1: VCTRL
2V/div.
CH1: VCTRL
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
CH4:
CH4: VPGOOD
5V/div.
VPGOOD
5V/div.
20ms/div.
20ms/div.
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN=12V, VOUT=1.2V, TA=+25°C, unless otherwise noted.
Pre-Biased Start-Up
Pre-Biased Start-Up
CCM, single phase
DCM, single phase
CH1: VCTRL
2V/div.
CH1: VCTRL
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
CH4:
CH4: VPGOOD
5V/div.
VPGOOD
5V/div.
1ms/div.
1ms/div.
Load Transient
Load Transient
IOUT = 0A to 10A, CCM, 1000kHz
IOUT = 0A to 10A, DCM, 1000kHz
CH3: IOUT
4A/div.
CH3: IOUT
4A/div.
CH4: VOUT
50mV/div.
CH4: VOUT
50mV/div.
20μs/div.
20μs/div.
OCP
OCP
CCM, single phase, latch-off mode
CCM, single phase, hiccup mode
CH1: VSW
10V/div.
CH1: VSW
10V/div.
CH2: VPGOOD
2V/div.
CH2:
VPGOOD
2V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
40ms/div.
40ms/div.
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN=12V, VOUT=1.2V, TA=+25°C, unless otherwise noted.
OCP
OCP
DCM, single phase, latch-off mode
CH1: VSW
10V/div.
DCM, single phase, hiccup mode
CH1: VSW
10V/div.
CH2: VPGOOD
2V/div.
CH2:
VPGOOD
2V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
40ms/div.
40ms/div.
OVP
OVP
DCM, single phase, hiccup mode
CCM, single phase, hiccup mode
CH1: VOUT
1V/div.
CH1: VOUT
1V/div.
CH2: VPGOOD
2V/div.
CH2:
VPGOOD
2V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
400μs/div.
400μs/div.
OVP
OVP
DCM, single phase, latch-off mode
CCM, single phase, latch-off mode
CH1: VOUT
1V/div.
CH1: VOUT
1V/div.
CH2:
VPGOOD
2V/div.
CH2: VPGOOD
2V/div.
CH3: IL
10A/div.
CH3: IL
10A/div.
400μs/div.
400μs/div.
MP8796B Rev. 1.0
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16
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
FUNCTIONAL BLOCK DIAGRAM
RAMP
VOSNS+
FB
Gain
VCC
References
Bias Current
Generator
LDO
VIN
VDRV
BST
20MHz
VTEMP
FB+RAMP
+
FB
VOSNS-
IREF
Temp
Sense
MN1
SET
+ Gm1
+
VCOMP
Drivers
Comp1
+
S
Q
R
xQ
SW
PWM
COMP-OUT
MN2
CC1
Soft
Start
ZCD
REF
VIN
SW
DAC
PGND
R
O
IS1
ISEN
ISUM
IS2
tON Generator
SET
Master
Direction
TAKE
LS Current Sense
CC2
Valley Current Limit
MS
Take Pass
Logic
ILIM
RUN
Out
+
Gm2
Blank
In
I
O
OneShot 2
PASS
2MΩ
Hi-Z
SDA
PMBus
SCL
ALT#
System
Configure
Registers
Control
Logic
Slave Fault
ADC
MUX
ADC
Slave Fault
Detect
ISUM
ISEN
FB
ADDR
SS_RDY
VIN
VTEMP
FB
REF
MTP
CTRL
PS#
FB
Monitor
PG
MN3
AGND
Figure 2: Functional Block Diagram
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
MULTI-PHASE OPERATION
R4
VIN
BST
IN
EN
EN
MP8796B
CBST
VOUT
L1
SW
FB
VOS+
VOS+
COUT
VOS-
CVCC
VOS-
MASTER
ALT
SCL
SDA
RREF
BST
IN
EN
CBST1
L2
SW
FB
MP8796B
RADDR
VOS+
VOS-
CVCC1
SLAVE1
RREF1
BST
IN
EN
MP8796B
CBSTn
RADDR1
Ln
SW
FB
VOS+
VOS-
CVCCn
SLAVEn
RREFn
RADDRn
Figure 3: Multi-Phase (n + 1) Configuration
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
MULTI-PHASE OPERATION (continued)
VFB+RAMP
VCOMP
COMP-OUT
SET
RUN1
PWM1
PASS1/TAKE2
RUN2
PWM2
PASS2/TAKE3
RUN3
PWM3
PASS3/TAKE4
RUN4
PWM4
PASS4/TAKE1
t0 t1
t2
t3 t4
t5
t6 t7
t8
t9 t10
t11
t12
t13
t14
Figure 4: Multi-Phase Interleaved Operation (Steady State)
VFB+RAMP
VCOMP
COMP_OUT
SET
RUN1
PWM1
PASS1/TAKE2
RUN2
PWM2
PASS2/TAKE3
RUN3
PWM3
PASS3/TAKE4
RUN4
PWM4
PASS4/TAKE1
t0
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
Figure 5: Multi-Phase Interleaved Operation (Load Step-Up Response)
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
OPERATION
MCOT OPERATION
The MP8796B is a fully integrated, synchronous,
step-down, switch-mode converter that uses
multi-phase constant-on-time (MCOT) control to
provide fast transient response. Selectable
internal ramp compensation stabilizes the
system and makes the MP8796B easy to use.
Master/Slave Auto-Detection
One master phase is required for both singleand multiple-phase operation. To be configured
as a master phase, the TAKE pin of the phase
must be pulled high to a voltage source. The
PASS/TAKE pins of all the phases are
connected in a daisy chain configuration. The
PASS pin of the last phase is connected back
to the TAKE pin of the first (master) phase. For
single-phase operation, the PASS and TAKE
pins are connected together. After power-up,
the master phase is determined, and the rest of
the phases are slave phases.
MCOT Operation (Master)
The master phase has the following functions:
Accepts both write and read commands
through the system’s PMBus
Generates the SET signals
Manages start-up, shutdown, and all
protections
Monitors fault alerts from the slave phases
through the PG pin
Starts the first on pulse
Starts the on pulse when receiving RUN
and SET signals
Determines the on-pulse width of its own
phase based on the per-phase and total
current
Carries on the PASS/TAKE signal
MCOT Operation (Slave)
The slave phase has the following functions:
Accepts write commands through the
system’s PMBus
Takes the SET signal from the master
Sends an OV/UV/OT alert to the master
through PG
Starts the on pulse when receiving RUN
and SET signals
Determines the on-pulse width of its own
phase based on the per-phase and total
current
Carries on the PASS/TAKE signal
Figure 3 on page 18 shows MCOT operation.
MCOT operation follows the timeline below:
t0: At t0, VFB + RAMP drops below the
reference level (VCOMP) in the master phase and
generates a SET signal. All phases receive this
SET signal, but only the phase that has the
active RUN signal takes action (in this case, the
master). The master turns on the high-side
MOSFET (HS-FET). Meanwhile, a fixed on
pulse is generated on the PASS pin, and this
signal is passed to the TAKE pin of Slave 1.
t1: At t1, the falling edge of Slave 1’s TAKE pin
activates the RUN signal, and Slave 1 waits for
the SET signal to turn on the HS-FET.
t2: At t2, the on pulse of the master phase
expires, and the HS-FET turns off. The onpulse width is fixed with the given input voltage,
output voltage, and selected switching
frequency. The on-pulse width is fine-tuned
based on the per-phase and total currents.
t3: At t3, VFB + RAMP drops below the
reference level (VCOMP) in the master phase
again. Only Slave 1 has an active RUN signal,
and it turns on its HS-FET. All other phases
ignore this SET signal. Meanwhile, Slave 1
generates a fixed on pulse on the PASS pin,
and this on pulse is passed to the TAKE pin of
Slave 2.
The above operation continues, and the phase
turns on its HS-FETs one by one for a fixed on
time. The operation is executed during a
PASS/TAKE loop, and only the phase that has
received the RUN signal turns on the HS-FET
when the SET signal is ready.
The MP8796B utilizes constant-on-time (COT)
control for fast load transient response. When a
load step-up occurs, the FB signal is below
REF, so the SET signal is generated more
frequently than during steady state to respond
to the load transient. This is based on the load
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
transient step size and slew rate. The SET
signal can be generated with a minimum 50ns
interval (i.e. the next phase can turn on 50ns
after the turn-on of the previous phase to
provide fast load transient response). Figure 5
on page 19 shows this operation.
Ramp Compensation
The MP8796B provides internal ramp
compensation to support all types of output
capacitors. Only the master phase utilizes ramp
compensation. When a SET signal is generated,
the ramp increases with a certain amplitude in a
fixed period. The ramp is then discharged with
an adaptive slew rate. This ramp signal is
superimposed onto the FB signal. When the
superimposed ramp and FB signal reaches the
REF signal, a new SET signal is generated.
The ramp is selectable through PMBus
command D0h[3:1] to support a wide range of
operation configurations. Larger ramps improve
jitter but result in slower load transient response.
It is recommended to choose an optimal ramp
that meets the application’s load transient target
design.
In single-phase operation, the ramp does not
need to be reset by the SET signal and can be
reset by pulse-width modulation (PWM) instead.
This option can be selected through PMBus
command EAh[3]. When EAh[3] = 0, the ramp
is reset by PWM. This is only for single-phase
operation. When EAh[3] = 1b’1, the ramp is
reset by the SET signal. This is optimal for both
single-phase and multi-phase operation.
Mode Selection
The MP8796B provides both forced continuous
conduction mode (CCM) operation and pulse
skip operation under light-load conditions. The
operation mode is selected through PMBus
command D2h[0]. When D2h[0] = 1b’1, the
device operates in CCM. When D2h[0] = 0, the
device operates in pulse skip mode.
Phase-Shedding Operation (Slave)
For multi-phase operation, the slave phases
can be enabled or disabled through the PMBus
or PS# pin. The phase-shedding function is
disabled in the master phase to ensure proper
operation.
MP8796B Rev 1.0
1/19/2020
Phase shedding is controlled through the E5h[0]
command on the PMBus. When E5h[0] = 1b’0,
the slave phases are enabled. When E5h[0] =
1b’1, the slave phases are disabled.
If phase shedding is controlled through the PS#
pin, set the E5h[1] command to 1b’1. The slave
phases are enabled when PS# is pulled high,
and disabled when PS# is pulled low.
Soft Start (SS)
The soft-start (SS) time can be programmed
through PMBus command TON_RISE (61h).
The minimum SS time is 1ms when 61h =
0x0000. Selectable SS time options include
1ms, 2ms, 4ms, 8ms, and 16ms.
Pre-Biased Start-Up
The MP8796B is designed for monotonic startup into pre-biased loads. If the output voltage is
pre-biased to a certain voltage during start-up,
the IC disables switching for both the high-side
and low-side switches until the internal
reference voltage exceeds the sensed output
voltage at the FB pin (VFB). If the BST voltage is
below the 2.4V threshold before the reference
voltage (VREF) reaches the pre-biased FB level,
the low-side MOSFET (LS-FET) is forced on for
about 200ns to charge up the BST voltage.
Output Voltage Discharge
When the MP8796B is disabled through CTRL
or the PMBus OPERATION command, output
voltage discharge mode is enabled if this
function is selected. Both the HS-FET and LSFET are latched off. A discharge MOSFET
connected between SW and GND turns on to
discharge the output voltage. The typical switch
on resistance for this MOSFET is about 50Ω.
Once VFB drops below 10% of VREF, the
discharge MOSFET turns off. This feature can
be enabled or disabled through PMBus
command MFR_CTRL_01 (D1h[6]).
Current Sense and Over-Current Protection
(OCP)
The MP8796B features on-die current sensing
and a programmable, positive, current-limit
threshold. The MP8796B provides inductor
valley current limiting (set by PMBus command
D7h).
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
Inductor Valley Over-Current Protection
(OCP) (D7h)
When the LS-FET is on, the SW current
(inductor current) is sensed and monitored
cycle by cycle. When FB drops below the
reference, the HS-FET is only allowed to turn
on if no over-current (OC) condition is detected
while the LS-FET is on. Therefore, the inductor
current is limited cycle by cycle. If an OC
condition is detected for 31 consecutive cycles,
over-current protection (OCP) is triggered.
If the output voltage drops below the undervoltage protection (UVP) threshold during an
over-current condition or output short-circuit
condition, the device enters OCP immediately.
Once OCP is triggered, the device enters either
hiccup mode or latches off based on the PMBus
selection. If it latches off, power recycling of
VCC or VIN is required to enable the part again.
The inductor valley over-current limit can be
programmed through PMBus command D7h.
D7h only sets the per-phase inductor valley
current limit, regardless of whether the device is
operating in single-phase or multi-phase
operation.
Negative Inductor Current Limit
When the LS-FET detects a negative current
lower than the limit set through the PMBus
D5h[2] command, the part turns off the LS-FET
for a certain period of time to limit the negative
current. This period is set through PMBus
command D5h[3].
Under-Voltage Protection (UVP)
The MP8796B monitors the output voltage
using the FB pin connected to the tap of a
resistor divider to detect an under-voltage
condition. If the VFB drops below the undervoltage protection (UVP) threshold (set through
the
PMBus
VOUT_UV_FAULT_LIMIT
command), UVP is triggered. After UVP is
triggered, the device enters hiccup mode or
latches off based on the PMBus selection. If it
latches off, a power recycling of VCC or CTRL
is required to enable the part again.
condition. See the MFR_OVP_NOCP_SET
section on page 47 for detailed OVP responses.
Output Sinking Mode (OSM)
The MP8796B employs an output-sinking mode
(OSM) to regulate the output voltage to the
targeted value. When VFB exceeds 105% of
VREF but is below the OVP threshold, OSM is
triggered. During OSM, the MP8796B runs in
forced CCM. The MP8796B exits OSM when
the HS-FET turns back on. OSM can be
enabled and disabled through PMBus
command EAh bit[9].
Over-Temperature Protection (OTP)
The
MP8796B
offers
over-temperature
protection (OTP). The IC monitors the junction
temperature
internally.
If
the
junction
temperature exceeds the threshold value (set
through
the
PMBus
OT_FAULT_LIMIT
command), the converter shuts off. After OTP is
triggered, the device enters hiccup mode or
latches off depending on the PMBus command
MFR_OVP_NOCP_SET. If it latches off, power
recycling of VCC or CTRL is needed to enable
the part again.
Output Voltage Setting
The internal DAC reference of the MP8796B
ranges from 162mV to 672mV. To achieve a
higher output voltage, either an external or an
internal voltage divider can be used. The
commands VOUT_SCALE_LOOP (29h) and
MFR_CTRL_VOUT
(D1h[1:0])
are
used
together to set different output voltages. Table 1
shows
the
relationship
between
VOUT_SCALE_LOOP
(29h)
and
MFR_CTRL_VOUT (D1h[1:0]).
Over-Voltage Protection (OVP)
The MP8796B monitors the output voltage
using the FB pin connected to the tap of a
resistor divider to detect an over-voltage
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
2. Set D1[1:0] to 2’b00 for the external voltage
divider option.
Table 1: VOUT_SCALE_LOOP vs.
MFR_CTRL_VOUT
VOUT_SCALE_
LOOP (29h)
29h = RFB2 /
(RFB1 + RFB2)
29h = 0x03E8
29h = 0x01F4
29h = 0x00FA
29h = 0x007D
FB
Divider
External
Internal
MFR_CTRL_
VOUT (D1h[1:0])
D1h[1:0] = 2’b00
D1h[1:0] = 2’b00
D1h[1:0] = 2’b01
D1h[1:0] = 2’b10
D1h[1:0] = 2’b11
It
is
not
recommended
to
change
VOUT_SCALE_LOOP (29h) and MFR_CTRL_
VOUT (D1h[1:0]) when the power stage is
enabled.
External Voltage Divider
If an external voltage divider is used to set the
output voltage, the MFR_CTRL_VOUT (D1h)
command can only be set to D1[0:0] = 2’b00.
Figure 6 shows the configuration when an
external voltage divider is used. VOSNS+ and
VOSNS- are connected to the output voltage
sense point through a resistor divider (RFB1 and
RFB2).
3. Choose RFB1 and RFB2 to have a 600mV FB
voltage. In this case, RFB2 / (RFB1 + RFB2) =
0.24.
4. Set VOUT_SCALE_LOOP (29h) to 0x00F0
to match the external voltage divider ratio
(0.24).
5. Set VOUT_COMMAND (21h) to 0x04E2
(LSB = 2mV). VOUT_COMMAND = 600mV
/ VOUT_SCALE_LOOP.
6. VOUT_COMMAND (21h) must be sent after
VOUT_SCALE_LOOP (29h) and D1h.
Otherwise, the change of VOUT_SCALE_
LOOP (29h) and D1h will not be effective.
Internal Voltage Divider
Figure 7 shows the configuration of the internal
voltage divider. VOSNS+ and VOSNS- are
connected directly to the output voltage sense
point.
OPERATION
Command
VOUT_MARGIN_HIGH
VOUT_COMMAND
MUX
Vo_set
VOUT_SCALE_LOO P
DAC_reference
EAMP
VOUT_MARGIN_LOW
OPERATION
Command
To PWM
FB
VOUT_MARGIN_HIGH
VOUT_COMMAND
MUX
Vo_set
VOUT_SCALE_LOO P
DAC_reference
EAMP
VOUT_MARGIN_LOW
VOSNS+
To PWM
D1h = 00
FB
200kΩ
VOSNS+
D1h = 01
VO
D1h = 00
200kΩ
D1h = 01
D1h = 10
COUT
50kΩ
RFB1
COUT
100kΩ
D1h = 11
50kΩ
RFB2
D1h = 10
VOSNS-
50kΩ
D1h = 11
VO
100kΩ
50kΩ
VOSNS-
Figure 7: Output Voltage Set by Internal Resistor
Divider
Figure 6: Output Voltage Set by External
Resistor Divider
Table 2 shows the internal voltage divider
options through MFR_CTRL_VOUT (D1h).
The MP8796B provides output voltage
monitoring through register READ_VOUT (8Bh).
To achieve accurate output voltage setting and
monitoring, the registers of VOUT_COMMAND
(21h),
VOUT_MARGIN_
HIGH
(25h),
VOUT_MARGIN_LOW
(26h),
and
VOUT_SCALE_LOOP (29h) should be set
correspondingly. The steps below show how to
set the output voltage to 2.5V.
Table 2: Output Voltage Range with Internal
Voltage Divider
1. Determine the Vo_set source based on the
OPERATION (01h) command. Assume that
VOUT_COMMAND (21h) is selected.
MFR_CTRL_VOUT (D1h)
Bits
Description
2’b00: VREF / VO = 1,
VO = 0.4V to 0.672V
2’b01: VREF / VO = 0.5,
VO = 0.4V to 1.344V
[1:0]
2’b10: VREF / VO = 0.25,
VO = 0.7 to 2.688V
2’b11: VREF / VO = 0.125,
VO = 1.3V to 5.376V
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
The MP8796B provides output voltage
monitoring through register READ_VOUT (8Bh).
To achieve correct output voltage setting and
monitoring, the registers VOUT_COMMAND
(21h),
VOUT_MARGIN_
HIGH
(25h),
VOUT_MARGIN_LOW
(26h),
and
VOUT_SCALE_LOOP (29h) should be set
correspondingly. Follow the steps below to set
the output voltage to 2.5V:
1. Determine the Vo_set source using the
OPERATION (01h) command. Assume that
VOUT_COMMAND (21h) is selected.
2. Choose the D1[1:0] value based on the
Vo_set value. The D1[1:0] value should pull
the FB voltage as close to 600mV as
possible. In this case, both D1[1:0] = 2’b10
and D1[1:0] = 2’b11 can provide VO = 2.5V.
However, D1[1:0] = 2’b10 yields a 625mV
FB voltage, while D1[1:0] = 2’b11 yields a
312.5mV FB voltage. Choose D1[1:0] =
2’b10.
When the converter encounters any fault (e.g.
UV, OV, OT, UVLO), PG is latched low and
cannot be pulled high again until a new soft
start initiates.
When the MP8796B is configured as the master
in single- or multi-phase operation, the PG pin
is used for fault indication. Therefore, PG must
be pulled high to ensure proper operation.
Otherwise, the MP8796B may enter a
protection mode.
This slave fault detection feature can be
enabled or disabled through the PMBus bit
D0h[0].
If the input supply fails to power the MP8796B,
PG is clamped low even though it is tied to an
external DC source through a pull-up resistor.
Figure 8 shows the relationship between the
PG voltage and the pull-up current.
2
1.8
3. Set VOUT_SCALE_LOOP (29h) to 0x00FA
to match D1[1:0] = 2’b10.
1.6
4. Set VOUT_COMMAND (21h) to 0x4E2
(LSB = 2mV).
1.2
5. VOUT_COMMAND (21h) must be sent after
VOUT_SCALE_LOOP (29h) and D1h.
Otherwise, the change of VOUT_SCALE_
LOOP (29h) and D1h will not be effective.
6. VOUT_COMMAND (21h) cannot exceed
the minimum/maximum value specified in
Table 2.
Power Good (PG)
The MP8796B has a power good (PG) output.
PG is the open drain of a MOSFET. Connect
PG to VDRV or another external voltage source
below 3.6V through a pull-up resistor (typically
100kΩ). After applying the input voltage, the
MOSFET turns on, and PG is pulled to GND
before soft start is ready. After the FB voltage
(VFB) reaches the threshold set by PMBus
command POWER_GOOD_ON, PG is pulled
high after a delay set by PMBus. The delay can
be chosen through the PMBus command
MFR_CTRL_VOUT (D1h) [5:2].
MP8796B Rev 1.0
1/19/2020
IPG (mA)
1.4
1
0.8
0.6
0.4
0.2
0
0.6
0.65
0.7
0.75
0.8
0.85
0.9
VPG (V)
Figure 8: PGOOD Clamped Voltage vs. Pull-Up
Current
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
1
VOUT
V
)
(1 OUT ) (RESR
8 fSW COUT
fSW L
VIN
APPLICATION INFORMATION
VOUT
Selecting the Input Capacitor
The step-down converter has a discontinuous
input current, and requires a capacitor to supply
AC current to the converter while maintaining
the DC input voltage. Use ceramic capacitors
for the best performance. During the layout
stage, place the input capacitors as close to the
IN pin as possible.
When
using
ceramic
capacitors,
the
capacitance dominates the impedance at the
switching frequency, and causes most of the
output voltage ripple. For simplification,
estimate the output voltage ripple with Equation
(6):
The capacitance can vary significantly with
temperature. Capacitors with X5R and X7R
ceramic dielectrics are recommended because
they are fairly stable over a wide temperature
range.
The capacitors must also have a ripple current
rating that exceeds the converter’s maximum
input ripple current. Estimate the input ripple
current with Equation (1):
ICIN
V
VOUT
IOUT
(1 OUT )
VIN
VIN
(1)
The worst-case condition occurs at VIN = 2VOUT,
calculated with Equation (2):
ICIN
IOUT
2
(2)
For simplification, choose an input capacitor
with an RMS current rating that exceeds half
the maximum load current.
The input capacitance value determines the
converter input voltage ripple. Select a
capacitor value that can meet any input voltage
ripple requirements.
Estimate the input voltage ripple with Equation
(3):
IOUT
V
V
OUT (1 OUT )
f SW C IN
VIN
VIN
VOUT
VOUT
2
8 fSW L C OUT
(1
VOUT
)
VIN
(5)
(6)
When using capacitors with a larger ESR (e.g.
POSCAP, OSCON), the ESR dominates the
switching frequency impedance. The output
voltage ripple can be determined by the ESR
values. For simplification, the output ripple can
be calculated with Equation (7):
VOUT
VOUT
V
(1 OUT ) R ESR
f SW L
VIN
(7)
Selecting the Inductor
The inductor supplies constant current to the
output load while being driven by the switching
input voltage. A larger-value inductor results in
less ripple current and a lower output ripple
voltage, but also has a larger physical size,
higher series resistance, and lower saturation
current. Select an inductor value that sets the
inductor peak-to-peak ripple current between
30% and 40% of the maximum switch current
limit. Design for a peak inductor current that is
below the maximum switch current limit.
Calculate the inductance value with Equation
(8):
L
VOUT
V
(1 OUT )
f SW IL
VIN
(8)
(3)
Where ∆IL is the peak-to-peak inductor ripple
current.
The worst-case condition occurs at VIN = 2VOUT,
calculated with Equation (4):
Choose an inductor that will not saturate under
the maximum inductor peak current. The peak
inductor current can be calculated with
Equation (9):
VIN
VIN
IOUT
1
4 f SW C IN
(4)
Selecting the Output Capacitor
The output capacitor maintains the DC output
voltage. The output voltage ripple can be
estimated with Equation (5):
ILP IOUT
VOUT
V
(1 OUT )
VIN
2 f SW L
MP8796B Rev. 1.0
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(9)
25
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
PCB Layout Guidelines
Efficient PCB layout is critical for stable
operation. For the best results, refer to Figure 9
and follow the guidelines below:
6. Place a VCC decoupling capacitor close to
the device.
1. Place the input MLCC capacitors as close
to the IN and PGND pins as possible.
8. Place the BST capacitor as close to BST
and SW as possible.
2. Place one 1μF to 4.7μF 0402 MLCC near
pin 1.
9. Use a trace width of 20 mils or higher to
route the path (a 0.1μF to 1µF bootstrap
capacitor is recommended).
3. Place the major MLCC capacitors on the
same layer as the MP8796B.
4. Maximize the VIN and PGND copper plane
to minimize the parasitic impedance.
5. Place as many PGND vias as possible
close to the pin to minimize parasitic
impedance and thermal resistance.
7. Connect AGND and PGND at the point of
the VCC capacitor’s ground connection.
10. Place an REF capacitor close to TRK/REF
to RGND.
11. Place one 10pF to 100pF MLCC between
the two remote sense lines.
VOSENSE+
RLC
RFB1
CFF
VOSENSE-
PGND
CBST
CIN3
VOUT
RFB2
PGND
VIN
CIN3
SW
CIN1
CIN2
Crv1
PGND
Rrv1
Vcc
Figure 9: Recommended PCB Layout (Placement and Top Layer PCB)
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
PMBUS INTERFACE
PMBus Serial Interface Description
The power management bus (PMBus) is an
open-standard power management protocol
that defines a means of communication with
power conversion and other devices.
The PMBus is a two-wire, bidirectional, serial
interface, consisting of a data line (SDA) and a
clock line (SCL). The lines are pulled to a bus
voltage externally when they are idle. When
connecting to the lines, a master device
generates an SCL signal and device address,
then arranges the communication sequence.
This is based on I2C operation principles. The
MP8796B is a PMBus slave that supports
standard mode (100kHz) and fast mode
(400kHz and 1000kHz). The PMBus interface
adds flexibility to the power supply solution.
Slave Address
To support the use of multiple MP8796B
devices on the same PMBus, use the ADDR pin
to program the slave address for each
MP8796B device. There is 10µA of current
flowing out of ADDR. Connect a resistor
between ADDR and AGND to set the ADDR
voltage. The internal ADC converts the pin
voltage to set the PMBus address. A maximum
of 32 addresses can be set via the ADDR pin.
Table 3 shows the PMBus address for different
resistor values from ADDR to AGND. Preset
Register MFR_ADDR_PMBUS (D3h) to set the
PMBus address.
For multi-phase configurations, the slave
phases can share the same address as the
masters or have different addresses, based on
the application requirements. The slave phases
can only accept write (W) commands, and
cannot accept read (R) commands from the
PMBus master. The master phase can accept
both write and read commands from the PMBus
master.
Start and Stop Conditions
The start (S) and stop (P) conditions are
signaled by the master device, which signifies
the beginning and end of the PMBus transfer. A
start condition is defined as the SDA signal
transitioning from high to low while the SCL is
high. A stop condition is defined as the SDA
signal transitioning from low to high while the
SCL is high (see Figure 10).
Table 3: PMBus Address vs. ADDR Resistor
Slave Address
Slave Address
RADDR
(R_IREF =
(R_IREF =
(kΩ)
60.4kΩ)
180kΩ)
4.99
30h
40h
15
31h
41h
24.9
32h
42h
34.8
33h
43h
45.3
34h
44h
54.9
35h
45h
64.9
36h
46h
75
37h
47h
84.5
38h
48h
95.3
39h
49h
105
3Ah
4Ah
115
3Bh
4Bh
124
3Ch
4Ch
133
3Dh
4Dh
147
3Eh
4Eh
154
3Fh
4Fh
The master then generates the SCL clocks and
transmits the device address and the read/write
direction bit (R/W) on the SDA line. Data is
transferred in 8-bit bytes by the SDA line. Each
byte of data is followed by an acknowledge
(ACK) bit.
PMBus Update Sequence
The MP8796B requires a start condition, a valid
PMBus address, a register address byte, and a
data byte for a single data update. The
MP8796B acknowledges the receipt of each
byte by pulling the SDA line low during the high
period of a single clock pulse. A valid PMBus
address selects the MP8796B. The MP8796B
then performs an update on the falling edge of
the LSB byte.
Protocol Usage
All PMBus transactions on the MP8796B are
done using defined bus protocols. The following
protocols are implemented:
• End byte with PEC
• Receive byte with PEC
• Write byte with PEC
• Read byte with PEC
• Write word with PEC
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
• Read word with PEC
• Block read with PEC
PMBus Bus Message Format
In Figure 11 on page 29, unshaded cells
indicate that the bus host is actively driving the
bus, and shaded cells indicate that the
MP8796B is driving the bus.
S = Start condition
Sr = Repeated start condition
P = Stop condition
R = Read bit
W = Write bit
A = Acknowledge bit (0)
A = Acknowledge bit (1)
“A” represents the acknowledge (ACK) bit. The
ACK bit is active low (logic 0) if the transmitted
byte is received successfully by a device.
However, when the receiving device is the bus
master, the acknowledge bit for the last byte
read is logic 1, indicated by A (see Figure 10).
Packet Error Checking (PEC)
The MP8796B PMBus interface supports the
use of a packet error checking (PEC) byte. The
PEC byte is transmitted by the MP8796B during
a read transaction or sent by the bus host to the
MP8796B during a write transaction.
The PEC byte is used by the bus host or the
MP8796B to detect errors during a bus
transaction (depending on whether the
transaction is a read or a write). If the host
determines that the PEC byte read during a
read transaction is incorrect, it can decide to
repeat the read if necessary. If the MP8796B
determines that the PEC byte sent during a
write transaction is incorrect, it ignores the
command (does not execute it) and sets a
status flag. Within a group command, the host
can choose to send or not send a PEC byte as
part of the message to the MP8796B.
PMBus Alert Response Address (ARA)
The PMBus alert response address (ARA) is a
special address that can be used by the bus
host to locate any devices that need to talk to it.
A host typically uses a hardware interrupt pin to
monitor the PMBus ALERT pins of a number of
devices. When a host interruption occurs, the
host issues a message on the bus using the
PMBus receive byte, or the receive byte with
PEC protocol.
The special address used by the host is 0x0C.
Any devices that have a PMBus use the ALERT
signal to return their own 7-bit address as the 7
MSBs of the data byte. The LSB value is not
used, and can be either 1 or 0. The host reads
the device address from the received data byte
and proceeds to handle the alert condition.
More than one device may have an active
PMBus ALERT signal and attempt to
communicate with the host. In this case, the
device with the lowest address dominates the
bus and succeeds in transmitting its address to
the host. The device that succeeds disables its
PMBus alert signal. If the host sees that the
PMBus alert signal is still low, it continues to
read addresses until all devices that need to
talk to it have successfully transmitted their
addresses.
Figure 10: Data Transfer over PMBus
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
1. Send Byte and Send Byte with PEC
1
S
7
Slave Address
1
Wr
1
A
8
Data Byte
1 1
A P
1
S
7
Slave Address
1
Wr
1
A
8
Data Byte
1
A
8
PEC
1 1
A P
2. Receive Byte and Receive Byte with PEC
1
S
7
Slave Address
1
Rd
1
A
8
Data Byte
1 1
A P
1
S
7
Slave Address
1
Rd
1
A
8
Data Byte
1
A
8
PEC
1 1
A P
3. Write Byte and Write Byte with PEC
1
S
7
Slave Address
1
Wr
1
A
8
Command Code
1
A
8
Data Byte
1 1
A P
1
S
7
Slave Address
1
Wr
1
A
8
Command Code
1
A
8
Data Byte
1
A
8
PEC
1 1
A P
4. Write Word and Write Word with PEC
1
S
7
Slave Address
1 1
Wr A
8
Command Code
1
A
8
Data Byte Low
1
A
8
Data Byte High
1 1
A P
1
S
7
Slave Address
1 1
Wr A
8
Command Code
1
A
8
Data Byte Low
1
A
8
Data Byte High
1
A
1
1
8
PEC
1 1
A P
5. Read Byte and Read Byte with PEC
1
7
1
1
8
S
Slave Address
1
7
Wr
A
Command Code
1
1
8
S
Slave Address
Wr
A
Command Code
A S
1
7
1
1
Slave Address Rd A
1
7
1
1
8
Data Byte
1
1
A P
8
1
8
Data Byte
A
PEC
A S
Slave Address Rd A
8
Command Code
1 1
A S
7
1 1
Slave Address Rd A
8
Data Byte Low
1
A
8
Data Byte High
1
A
8
Command Code
1 1
A S
7
1 1
Slave Address Rd A
8
Data Byte Low
1
A
8
Data Byte High
1
A
1
1
A P
6. Read Word and Read Word with PEC
1
S
1
S
7
Slave Address
7
Slave Address
1
Wr
1
Wr
1
A
1
A
1
P
8
PEC
1
A
1
P
7. Block Read with PEC
Figure 11: PMBus Message Format
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
Data and Numerical Formats
The MP8796B uses a direct format internally to
represent real-world values such as voltage,
current, power, and temperature.
All numbers without a suffix in this document
are decimals unless explicitly designated
otherwise.
Numbers in the binary format are indicated by
the prefix “n’b”, where n is the binary count. For
example, 5’b01010 indicates a 5-bit binary data,
and the data is 01010.
The suffix “h” indicates a hexadecimal format,
which is used for the register address numbers
in this document.
The symbol “0x” indicates a hexadecimal format,
which is used for the value in the register. For
example, 0xA3 is a 1-byte number whose
hexadecimal value is A3.
PMBus Communication Failure
A data transmission fault occurs when the data
is not transferred between the devices properly.
There are several types of data transmission
faults listed below:
Sending too little data
Reading too little data
Sending too many bytes
Reading too many bytes
Improperly set read bit in the address byte
Unsupported command code
PMBus Reporting and Status Monitoring
The MP8796B supports real-time monitoring for
some operation parameters and status with the
PMBus interface (see Table 4).
Table 4: PMBus Monitored Parameters and
Status
Parameter/Status
PMBus
Output voltage
1.25mV/LSB
Output current
60.5mA/LSB
Temperature
1°C/LSB
Input voltage
25mV/LSB
VIN OV
VIN UV
VIN OV Warn
VIN UV Warn
VO OV
VO UV
Over-Temperature (OT)
OT Warn
VO OC
VO OC Warn
Multi-Time Programming (MTP)
The MP8796B has built-in multiple-time
programming (MTP) cells to store user
configurations. The standard command of 15h
(STORE_USER_ALL)
is
not
currently
supported in the MP8796B. Alternatively, the
MTP cells can be programmed through the
following command combination:
E7h (2000h) E7h (1000h) E7h (4000h)
In the MPS GUI for the MP8796B, the above
commands are integrated together and named
as 15h (STORE_USER_ALL). MPS’s GUI
software supports the 15h command.
When MTP is being programmed, the VCC
voltage may rise as high as 5V. Take caution if
VCC is connected to circuits that cannot take
such high voltage. The MTP programming
typically takes about 300ms.
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
REGISTER MAP
Name
OPERATION
ON_OFF_CONFIG
Code
01h
02h
CLEAR_FAULTS
03h
WRITE_PROTECT
10h
STORE_USER_ALL
15h
RESTORE_USER_ALL
16h
CAPABILITY
VOUT_MODE
VOUT_COMMAND
VOUT_MAX
VOUT_MARGIN_HIGH
VOUT_MARGIN_LOW
VOUT_SCALE_LOOP
VOUT_MIN
VIN_ON
VIN_OFF
OT_FAULT_LIMIT
OT_WARN_LIMIT
VIN_OV_FAULT_LIMIT
VIN_OV_WARN_LIMIT
VIN_UV_WARN_LIMIT
TON_DELAY
TON_RISE
TOFF_DELAY
STATUS_BYTE
STATUS_WORD
STATUS_VOUT
STATUS_IOUT
STATUS_INPUT
STATUS_TEMPERATURE
STATUS_CML
READ_VIN
READ_VOUT
READ_IOUT
READ_TEMPERATURE_1
PMBUS_REVISION
19h
20h
21h
24h
25h
26h
29h
2Bh
35h
36h
4Fh
51h
55h
57h
58h
60h
61h
64h
78h
79h
7Ah
7Bh
7Ch
7Dh
7Eh
88h
8Bh
8Ch
8Dh
98h
MFR_ID(8)
99h
MFR_CTRL_COMP
MFR_CTRL_VOUT
MFR_CTRL_OPS
MFR_ADDR_PMBUS
MFR_VOUT_OVP_FAULT_LIMIT
MFR_OVP_NOCP_SET
MFR_OT_OC_SET
MFR_OC_PHASE_LIMIT
MFR_HICCUP_ITV_SET
MFR_UVP_PGOOD_ON _LIMIT
MFR_VOUT_STEP
MFR_LOW_POWER
MFR_CTRL
D0h
D1h
D2h
D3h
D4h
D5h
D6h
D7h
D8h
D9h
DAh
E5h
EAh
Type
R/W w/ PEC
R/W w/ PEC
Send byte w/
PEC
R/W w/ PEC
Send byte w/
PEC
Send byte w/
PEC
R w/ PEC
R w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R w/ PEC
R w/ PEC
R w/ PEC
R w/ PEC
R w/ PEC
R w/ PEC
R w/ PEC
R w/ PEC
R w/ PEC
R w/ PEC
R w/ PEC
R w/ PEC
Block read w/
PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
R/W w/ PEC
Bytes
1
1
Default Value
0x80
0x16
0
-
1
0x00
0
-
0
-
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
1
2
1
1
1
1
1
2
2
2
2
1
1 (byte) +
3 (data)
1
1
1
1
1
1
1
1
1
1
1
1
2
0xB0
0x40
0x01CC (0.92V)
0x0226 (1.1V)
0x0226 (1.1V)
0x0190 (0.8V)
0x028C (0.652)
0x0170F (0.736V)
0x0C (3V)
0x0B (2.75V)
0x0091(145°C)
0x008C (140°C)
0x0020 (16V)
0x001E (15V)
0x0028 (10V)
0x0000 (0ms)
0x0001 (2ms)
0x0000 (0ms)
MTP?
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
0x33h, ASCII “13” (PMBus 1.3)
0x4D 0x50 0x53, ASCII “MPS”
0x09
0x40
0x05
0xB0
0x0E
0x00
0x00
0x15 (31.5A)
0x00
0x09
0x04
0x00
bit[9] = 0, bit[3] = 0
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Note:
8) For manufacturer use only.
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
OPERATION (01h)
OPERATION is a paged register. The OPERATION command turns the converter output on or off in
conjunction with the input from the CTRL pin. OPERATION also sets the output voltage to the upper or
lower margin voltages. The unit remains in the commanded operating mode until a subsequent
OPERATION command or a change in the state of the CTRL pin instructs the converter to change to
another mode. This OPERATION command re-enables the converter after a fault-triggered shutdown.
Writing an off command followed by an on command clears all faults. Writing only an on command after
a fault-triggered shutdown will not clear the fault registers.
Command
Format
Bit
Access
Function
Default Value
Bit[7:6]
00
01
10
10
10
10
10
7
R/W
6
R/W
5
R/W
1
0
0
Bit[5:4]
XX
XX
00
01
01
10
10
Bit[3:2]
XX
XX
XX
01
10
01
10
Bit[1:0]
XX
XX
XX
XX
XX
XX
XX
OPERATION
Unsigned binary
4
3
R/W
R/W
0
0
On/Off
Immediate off
Soft off
On
On
On
On
On
2
R/W
0
1
R
X
X
Margin state
N/A
N/A
Off
Margin low (ignore fault)
Margin low (act on fault)
Margin high (ignore fault)
Margin high (act on fault)
0
R
X
X
01h
0x00
0x40
0x80
0x94
0x98
0xA4
0xA8
ON_OFF_CONFIG (02h)
The ON_OFF_CONFIG command configures the combination of the CTRL input and the PMBus
commands to turn the converter on and off. This includes how the converter responds when an input
voltage is applied.
Command
Format
Bit
Access
Function
Default Value
7
R
0
6
R
X
0
5
R
0
ON_OFF_CONFIG
Unsigned binary
4
3
R/W
R/W
On
Op
1
0
2
R/W
Ctrl
1
1
R/W
Pol_Ctrl
1
0
R
Delay
0
On
The on bit sets the device to either operate whenever the input voltage is present, or for the on/off
function to be controlled by the CTRL and PMBus commands.
Bit[4] Value
0
1
Meaning
Converter powers up when the input voltage is present, regardless of state the of the CTRL pin.
Converter does not power up until commanded by the CTRL pin and OPERATION command (as
programmed in bit[3:0]).
Op
The op bit controls how the converter responds to the OPERATION commands.
Bit[3] Value
0
1
Meaning
Converter ignores the “on” bit in the OPERATION command from the PMBus.
Converter responds to the “on” bit in the OPERATION command from the PMBus.
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
Ctrl
The ctrl bit controls how the converter responds to the CTRL pin.
Bit[2] Value
0
1
Meaning
Converter ignores the CTRL pin (on/off function is controlled by the OPERATION command).
Converter requires the CTRL pin to be asserted to power up. Depending on the bit[3] op bit, the
OPERATION command may also be required to instruct the converter to power up.
Pol_ctrl
The pol_ctrl bit sets the polarity of the CTRL pin.
Bit[1] Value
0
1
Meaning
Active low (pull the CTRL pin low to start the converter).
Active high (pull the CTRL pin high to start the converter).
Delay
The delay bit sets the turn-off action when the converter is commanded to turn off through the PMBus.
This bit is read-only and cannot be modified by the end user.
Bit[0] Value
0
Meaning
TOFF_DELAY, TOFF_FALL
CLEAR_FAULTS (03h)
The CLEAR_FAULTS command resets all stored warning and fault flags. If a fault or warning condition
still remains when the CLEAR_FAULTS command is issued, the ALT# signal may not be cleared or is
reasserted almost immediately. Issuing a CLEAR_FAULTS command will not cause the converter to
restart in the event of a fault shutdown. The converter restart must be done by issuing an OPERATION
command after the fault condition is cleared. This command uses the PMBus to send the byte protocol.
WRITE_PROTECT (10h)
The WRITE_PROTECT command controls writes to the converter. This command provides protection
against accidental changes. This command is not intended to provide protection against deliberate
changes to the converter’s configuration or operation.
All the supported commands may have their parameters read, regardless of the WRITE_PROTECT
settings.
0
0
Bit[7:0] Value
0 0 0 0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
Meaning
Enable writes to all commands.
Disable all writes except to the WRITE_PROTECT, OPERATION, PAGE, ON_OFF_
CONFIG, and VOUT_COMMAND commands.
Disable all writes except to the WRITE_PROTECT, OPERATION, and PAGE
commands.
Disable all writes except to the WRITE_PROTECT command.
When 10h is set to a value other than 0x00, in order to program the MTP, 15h must be programmed
through the MPS GUI. A separate MTP command on E7h cannot be used. See the Multi-Time
Programming (MTP) section on page 30 for details on MTP programming.
The default value of 10h is 0x00.
STORE_USER_ALL (15h)
This command writes all data from the registers to the internal MTPs. This process operates when the
MP8796B receives a STORE_USER_ALL command from the PMBus interface. Currently, the
MP8796B does not support a standard 15h command, but it can accept a 15h command from MPS’s
GUI software for the MP8796B. See the Multi-Time Programming (MTP) section on page 30 for details.
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
The following registers can be stored using STORE_USER_ALL.
OPERATION (01h)
ON_OFF_CONFIG (02h)
WRITE_PROTECT (10h)
VOUT_COMMAND (21h)
VOUT_MAX (24h)
VOUT_MARGIN_HIGH (25h)
VOUT_MARGIN_LOW (26h)
VOUT_SCALE_LOOP (29h)
VOUT_MIN (2Bh)
VIN_ON (35h)
VIN_OFF (36h)
OT_FAULT_LIMIT (4Fh)
OT_WARN_LIMIT (51h)
VIN_OV_FAULT_LIMIT (55h)
VIN_OV_WARN_LIMIT (57h)
VIN_UV_WARN_LIMIT (58h)
TON_DELAY (60h)
TON_RISE (61h)
TOFF_DELAY (64h)
MFR_REVISION (9Bh)
MFR_4_DIGIT (9Dh)
MFR_CTRL_COMP (D0h)
MFR_CTRL_VOUT (D1h)
MFR_CTRL_OPS (D2h)
MFR_ADDR_PMBUS (D3h)
MFR_VOUT_OVP_FAULT_LIMIT (D4h)
MFR_OVP_NOCP_SET (D5h)
MFR_OT_OC_SET (D6h)
MFR_OC_PHASE_LIMIT (D7h)
MFR_HICCUP_ITV_SET (D8h)
MFR_UVP_PGOOD_ON_LIMIT (D9h)
MFR_VOUT_STEP (DAh)
MFR_LOW_POWER (E5h)
MFR_CTRL (EAh)
MFR_LOW_POWER (E5h)
MFR_CTRL (EAh)
RESTORE_USER_ALL (16h)
The RESTORE_USER_ALL command instructs the MP8796B to copy the entire contents of the MTP
values to the matching locations in the registers. The values in the registers are overwritten by the
value retrieved from the MTP. Any items in the MTPs that do not have matching locations in the
operating memory are ignored.
The RESTORE_USER_ALL command can be used while the MP8796B is operating. However, this is
not recommended as the MP8796B may be unresponsive during the operation with unpredictable
results.
This command is write-only.
CAPABILITY (19h)
The CAPABILITY command returns information about the PMBus functions supported by the MP8796B.
This command is read with the PMBus read byte protocol.
Command
Format
Bit
Access
Function
Default Value
Bit[6:5] Value
0
0
0
1
1
0
1
1
7
R
PEC
1
CAPABILITY
Unsigned binary
6
5
4
3
2
1
R
R
R
R
R
R
Max bus speed
Alert
X
X
X
0
1
1
0
0
0
PEC supported, max speed 1MHz, supports PMBus alert and ARA.
0
R
X
0
Meaning
Maximum supported bus speed is 100kHz.
Maximum supported bus speed is 1MHz.
Maximum supported bus speed is 400kHz.
Reserved.
The default value of 19h is 0xB0.
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
VOUT_MODE (20h)
The VOUT_MODE command reads and sets the output voltage. The 3 MSBs are used to determine the
data format (only direct format is supported in the MP8796B), and the other 5 bits represent the
exponent used in the output voltage read/write commands.
The default value of 20h is 0x40.
VOUT_COMMAND (21h)
VOUT_COMMAND sets the output voltage of the MP8796B. Together, VOUT_COMMAND and
VOUT_SCALE_ LOOP determine the feedback reference voltage: VOUT_COMMAND x
VOUT_SCALE_LOOP.
See the Output Voltage Setting section on page 22 for details on setting the output voltage.
Command
Format
Bit
Access
Function
Default Value
VOUT_COMMAND
Direct
9
8
7
6
15
14
13
12
11
10
R
R
R
R
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
1
1
X
R/W
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
0
1
1
0
0
2mV/LSB
1
0
The value is unsigned, and 1LSB = 2mV. The default value of 21h is 0.92V, which is 0x01CC.
VOUT_MAX (24h)
The VOUT_MAX command sets an upper limit on the output voltage of the converter to enable the
command, regardless of any other commands or combinations. The intent of this command is to
provide a safeguard against an accidental setting of the output voltage to a possibly destructive level,
not to be the primary output over-voltage protection.
Command
Format
Bit
Access
Function
Default Value
VOUT_MAX
Direct
8
7
15
14
13
12
11
10
9
R
R
R
R
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
1
0
0
x
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
1
1
0
2mV/LSB
0
1
If an attempt is made to program the output voltage above the limit set by this command, the device
responds as follows:
The commanded output voltage is set to VOUT_MAX
The VOUT bit is set in STATUS_WORD
The VOUT_MAX_MIN warning bit is set in the STATUS_VOUT register
The device notifies the host
The value is unsigned, and 1LSB = 2mV. The maximum value of VOUT_MAX is 5.5V, and the default
value is 1.1V. Therefore, the default value of 24h is 0x0226.
VOUT_MARGIN_HIGH (25h)
Command
Format
Bit
Access
Function
Default Value
VOUT_MARGIN_HIGH
Direct
9
8
7
6
15
14
13
12
11
10
R
R
R
R
R/W
R/W
R/W
R/W
R/W
X
0
X
0
X
0
X
0
0
0
1
0
0
R/W
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
0
0
1
1
0
2mV/LSB
0
1
The value is unsigned, and 1LSB = 2mV. The default value is 1.1V. Therefore, the default value of 25h
is 0x0226.
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
VOUT_MARGIN_LOW (26h)
Command
Format
Bit
Access
Function
Default Value
VOUT_MARGIN_LOW
Direct
9
8
7
6
15
14
13
12
11
10
R
R
R
R
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
1
1
X
R/W
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
1
0
0
0
0
2mV/LSB
0
0
The value is unsigned, and 1LSB = 2mV. The default value is 0.8V, which is 0x0190.
VOUT_SCALE_LOOP (29h)
VOUT_SCALE_LOOP sets the feedback resistor divider ratio, and is equal to VFB / VOUT. Regardless of
whether an external or internal feedback resistor divider is used, VOUT_SCALE_LOOP should match
the actual feedback resistor divider value.
Command
Format
Bit
Access
Function
Default Value
VOUT_SCALE_LOOP
Direct
9
8
7
6
15
14
13
12
11
10
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
1
0
1
0
X
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
1
1
0
0
0.001/LSB
0
0
The value is unsigned, and 1LSB = 0.001. The default value is 0.652, which is 0x028C.
VOUT_MIN (2Bh)
The VOUT_MIN command sets a lower limit on the output voltage of the converter to enable a
command, regardless of any other commands or combinations. The intent of this command is to
provide a safeguard against an accidental setting of the output voltage to a possible destructive level,
not to be the primary output under-voltage protection.
Command
Format
Bit
Access
Function
Default Value
VOUT_MIN
Direct
8
7
15
14
13
12
11
10
9
R
R
R
R
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
1
0
X
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
1
0
0
0
0
2mV/LSB
1
1
If an attempt is made to program the output voltage below the limit set by this command, the device
responds as follows:
The commanded output voltage is set to VOUT_MIN
The VOUT bit is set in STATUS_WORD
The VOUT_MAX_MIN warning bit is set in the STATUS_VOUT register
The device notifies the host
The minimum value of VOUT_MIN is 0.5V. The value is unsigned, and 1LSB = 2mV. The default value
is 0.736V, which is 0x0170.
VIN_ON (35h)
The VIN_ON command sets the value of the input voltage (in V) at which the converter should start up
if all other required start-up conditions are met. The VIN_ON value can be set between 4V and 15V
with a 0.25V increment. The VIN_ON value should always be set above the VIN_OFF value, with
enough margin so there is no bouncing between VIN_ON and VIN_OFF during power conversion.
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
Command
Format
Bit
Access
Function
Default Value
15
14
13
12
11
10
9
VIN_ON
Direct
8
7
6
5
4
3
2
1
0
R
R
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
250mV/LSB
1
1
The value is unsigned, and 1LSB = 250mV. The default value is 3V, which is 0x000C.
VIN_OFF (36h)
The VIN_OFF command sets the value of the input voltage (in V) at which the converter should stop
power conversion once operation has started. The VIN_OFF value can be set between 2.75V and
14.75V with a 0.25V increment. The VIN_OFF value should be always set below the VIN_ON value,
with enough margin so that there is no bouncing between VIN_OFF and VIN_ON during power
conversion.
Command
Format
Bit
Access
Function
Default Value
15
14
13
12
11
10
9
VIN_OFF
Direct
8
7
6
5
4
3
2
1
0
R
R
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
0
1
1
X
250mV/LSB
1
0
The value is unsigned, and 1LSB = 250mV. The default value is 2.75V, which is 0x000B.
OT_FAULT_LIMIT (4Fh)
The OT_FAULT_LIMIT configures or reads the threshold for over-temperature (OT) fault detection. If
the measured temperature exceeds this value, an OT fault is triggered, the OT fault flags are set in the
STATUS BYTE (78h) and STATUS_WORD (79h), respectively, and the ALT# signal is asserted. After
the measured temperature falls below the value in this register, the MOSFET may be switched back on
with the OPERATION command when the part works in latch-off mode. The minimum temperature fault
detection time should be shorter than 20ms. The temperature ranges from 0°C to +255°C.
If an OT fault occurs when the temperature exceeds this register value, the part implements auto-retry
when the temperature drops below 20°C of this register value.
Command
Format
Bit
Access
Function
Default
Value
15
R
14
R
13
R
12
R
0
0
0
0
11
R
10
R
0
0
OT_FAULT_LIMIT
Direct
9
8
7
6
R
R
R/
R/
W
W
5
R/
W
0
0
X
0
1
0
4
3
R/
R/
W
W
1°C/LSB
1
0
2
R/
W
1
R/
W
0
R/
W
0
0
1
The value is unsigned, and 1LSB = 1°C. The default value is 0091h. The corresponding value is 145°C.
The OT_FAULT_LIMIT setting value should be below 160°C. If the OT_FAULT_LIMIT value is above
160oC, the register value is neglected, and the MP8796B enters thermal shutdown when the junction
temperature reaches 160°C.
Table 5 shows the relationship between direct values and real-world values.
Table 5: Direct Value vs. Real-World Value
Direct Value
0000 0000
0000 0001
1111 1111
Real-World Value (°C)
0
+1
+255
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
OT_WARN_LIMIT (51h)
OT_WARN_LIMIT configures or reads the threshold for over-temperature (OT) warning detection. If the
sensed temperature exceeds this value, an OT warning is triggered, the OT warning flags are set in
STATUS BYTE (78h) and STATUS_WORD (79h), respectively, and the ALT# signal is asserted. The
minimum temperature warning detection time should be shorter than 20ms.
Command
Format
Bit
Access
15
14
13
12
11
10
R
R
R
R
R
R
0
0
Function
Default
Value
OT_WARN_LIMIT
Direct
9
8
7
6
R/
R/
R
R
W
W
5
R/
W
4
3
R/
R/
W
W
1°C/LSB
2
R/
W
1
R/
W
0
R/
W
0
0
0
1
0
0
X
0
0
0
0
0
1
0
1
The value is unsigned, and 1LSB = 1°C. The default value is 0x008Ch. The corresponding value is
140°C. The OT_WARN_LIMIT setting value should be below 160°C. The relationship between the
direct value and real-world value is the same as it is with the command OT_FAULT_LIMIT.
VIN_OV_FAULT_LIMIT (55h)
The VIN_OV_FAULT_LIMIT command configures or reads the threshold for input over-voltage (OV)
fault detection. If the measured value of VIN exceeds the value in this register, the VIN OV fault flags are
set in their respective registers. The MP8796B disables the power stage. When VIN drops below the
VIN_OV_FAULT_LIMIT, the MP8796B begins working again.
Command
Format
Bit
Access
Function
Default
Value
15
14
13
12
11
10
VIN_OV_FAULT_LIMIT
Direct
9
8
7
6
R
R
R
R
R
R
R
R
R
R
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
0
0
X
0
0
0
0
0
500mV/LSB
0
0
0
0
0
1
0
0
0
The value is unsigned and 1LSB = 500mV. The default value is 20h. The corresponding value is 16V.
The VIN_OV_FAULT_LIMIT setting value should not exceed 18V.
VIN_OV_WARN_LIMIT (57h)
The VIN_OV_WARN_LIMIT command configures or reads the threshold for input over-voltage (OV)
warning detection. If the measured value of VIN exceeds the value in this register, the VIN OV warning
flags are set in their respective registers, and the ALT# signal is asserted.
Command
Format
Bit
Access
Function
Default
Value
15
14
13
12
11
10
VIN_OV_WARN_LIMIT
Direct
9
8
7
6
5
4
3
2
1
0
R
R
R
R
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
0
0
0
1
1
0
X
500mV/LSB
1
1
The value is unsigned and 1LSB = 500mV. The default value is 0x1E. The corresponding value is 15V.
The VIN_OV_WARN_LIMIT setting value should not exceed 18V.
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
VIN_UV_WARN_LIMIT (58h)
The VIN_UV_WARN_LIMIT command configures or reads the threshold for input under-voltage (UV)
fault detection. If the measured value of VIN falls below the value in this register, the VIN UV warning
flags are set in their respective registers, and the ALT# signal is asserted.
Command
Format
Bit
Access
Function
Default
Value
15
14
13
12
11
10
VIN_UV_WARN_LIMIT
Direct
9
8
7
6
R
R
R
R
R
R
R
R
R
R
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
0
0
X
0
0
0
0
0
250mV/LSB
0
0
0
0
0
1
0
1
0
The value is unsigned and 1LSB = 250mV. The default value is 0x28. The corresponding value is 10V.
The VIN_UV_WARN_LIMIT setting value should not be set below 3.3V.
TON_DELAY (60h)
The TON_DELAY command sets the time (in ms) from when a start condition is received (as
programmed by the ON_OFF_CONFIG command) until the output voltage starts to rise.
Command
Format
Bit
Access
Function
Default
Value
15
R
14
R
13
R
12
R
11
R
10
R/W
0
0
TON_DELAY
Direct
9
8
7
6
R/W R/W R/W R/W
5
R/W
X
0
0
0
0
0
0
0
0
0
4
3
R/W R/W
4ms/LSB
0
2
R/W
1
R/W
0
R/W
0
0
0
0
The value is unsigned and 1LSB = 4ms. The maximum value is FFh (1020ms). The default value is
0ms.
TON_RISE (61h)
The TON_RISE command sets the soft-start time (in ms) from when the output starts to rise until the
voltage reaches the regulation point.
Command
Format
Bit
Access
Function
Default
Value
15
14
13
12
11
10
9
R
R
R
R
R/W
R/W
R/W
TON_RISE
Direct
8
7
R/W
R/W
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
X
0
0
0
0
0
0
0
1ms/LSB
0
0
0
0
0
0
0
0
1
The only supported values are:
3’b000: 1ms
3’b001: 2ms
3’b010: 4ms
3’b011: 8ms
3’b100 and up: 16ms
The default value is 0x01 (i.e. 2ms for soft-start time).
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
TOFF_DELAY (64h)
The TOFF_DELAY command sets the time in ms from EN off to the moment when the output starts to
fall.
command
format
Bit
Access
Function
Default value
15
r
14
r
13
r
12
r
0
0
0
0
11
r
10
r
0
0
9
r
TOFF_DELAY
Direct
8
7
6
r
r/w
r/w
5
r/w
x
0
0
0
0
0
4
3
r/w
r/w
4ms/LSB
0
0
2
r/w
1
r/w
0
r/w
0
1
0
The value is unsigned and 1LSB=4ms. The maximum value is FFh (1020ms). The default value is 0ms.
STATUS_BYTE (78h)
The STATUS_BYTE command returns the value of a number of flags indicating the state of the
MP8796B. Accesses to this command should use the read byte protocol. To clear bits in this register,
the underlying fault should be removed and a CLEAR_FAULTS command should be issued.
Bits
Name
[7]
RESERVED
[6]
OFF
[5]
VOUT_OV
[4]
IOUT_OC_FAULT
[3]
VIN_UV
[2]
OT_FAULT_WARN
[1]
COMM_ERROR
[0]
NONE_OF_THE_ABOVE
Behavior
Default
Description
0
Always read as 0.
0
0: Part enabled
1: Part disabled. This can be due to an VIN UV/OV fault,
or the OPERATION command turning off
0
An output over-voltage fault has occurred.
0
0: No over-current fault detected
1: Over-current fault detected
0
Not supported, always read as 0.
Live
0
0: No over-temperature warning or fault detected
1: Over-temperature warning or fault detected
Latched
0
0: No communication error detected
1: Communication error detected
Live
0
0: No other fault or warning
1: Fault or warning not listed in bit[7:1] has occurred
Live
Latched
STATUS_WORD (79h)
The STATUS_WORD returns the value of a number of flags indicating the state of the MP8796B. To
clear bits in this register, the underlying fault should be removed and a CLEAR_FAULTS command
should be issued.
Bits
Name
Behavior
Default
[15]
[14]
VOUT_STATUS
Live
0
0: No output fault or warning
1: Output fault or warning
IOUT_STATUS
Live
0
0: No IOUT fault
1: IOUT fault
0
0: No VIN fault
1: VIN fault, at the period when VIN starts up, the initial flag
is 1 before VIN passes the UVLO threshold. The flag is
cleared once VIN passes the UVLO threshold
0
Always read as 0.
0
0: Power good signal is asserted
1: Power good signal is not asserted
[13]
VIN_STATUS
[12]
MFR_STATUS
[11]
POWER_GOOD#
Live
Live
Description
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MP8796B – 16V, 30A, SYNC STEP-DOWN CONVERTER WITH PMBUSTM
[10]
RESERVED
0
Always read as 0.
[9]
RESERVED
0
Always read as 0.
[8]
UNKNOWN
0
0: No other fault has occurred
1: A fault type not specified in bit[15:1] of STATUS_
WORD has been detected.
Low
Byte
Latched
STATUS_BYTE
STATUS BYTE is the low byte of STATUS WORD.
STATUS_VOUT (7Ah)
The STATUS_VOUT command returns one data byte with contents as follows.
Bits
Name
Behavior
Default
Description
Live
0
0: No output OV fault
1: Output OV fault
RESERVED
Latched
0
Always read as 0.
[5]
RESERVED
Latched
0
Always read as 0.
[4]
VOUT_UV_FAULT
Live
0
0: No output UV fault
1: Output UV fault
0
0: No VOUT_MAX, VOUT_MIN warning
1: An attempt has been made to set the output voltage to
a value above that allowed by the VOUT_MAX command
or below the limit allowed by the VOUT_MIN command
[7]
VOUT_OV_FAULT
[6]
[3]
VOUT_MAX_MIN
Live
[2]
RESERVED
0
Always read as 0.
[1]
RESERVED
0
Always read as 0.
[0]
UNKNOWN
0
0: No other fault has occurred
1: A fault type not specified in bit[15:1] of STATUS_
WORD has been detected
Latched
STATUS_IOUT (7Bh)
Command
Format
Bit
Access
Function
Default Value
7
R
IOUT_OC
0
STATUS_IOUT
Unsigned binary
5
R
IOUT_OC_WARNING
0
6
R
IOUT_OC & VOUT_UV
0
4
R
X
0
3
R
X
0
2
R
X
0
1
R
X
0
0
R
X
0
STATUS_INPUT (7Ch)
The STATUS_INPUT returns the value of the flags indicating the input voltage status of the MP8796B.
To clear the bits in this register, the underlying fault or warning should be removed and a
CLEAR_FAULTS command should be issued.
Bits
Name
Behavior
Default Set
[7]
VIN_OV_FAULT
R, latched
0
0: No over-voltage detected on the OV pin
1: Over-voltage detected on the OV pin
[6]
VIN_OV_WARN
R, latched
0
0: No over-voltage condition on VIN
1: Over-voltage condition on VIN has occurred
[5]
VIN_UV_WARN
R, latched
0
0: No under-voltage condition on VIN
1: Under-voltage condition on VIN has occurred
R
0
Always read as 0000.
[4:0]
RESERVED
MP8796B Rev 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
STATUS_TEMPERATURE (7Dh)
The STATUS_TEMPERATURE returns the value of flags indicating the over temperature fault or over
temperature waring of MP8796B. To clear the bits in this register, the underlying fault should be
removed and a CLEAR_FAULTS command should be issued.
Bits
Name
Behavior
Default
[7]
OT_FAULT
R, latched
0
1: Over-temperature fault has occurred
[6]
OT_WARNING
R, latched
0
1: Over-temperature warning has occurred
R
0
Always read as 0.
[5:0]
RESERVED
Description
STATUS_CML (7Eh)
Command
Format
Bit
Access
7
R
Invalid or
unsupported
command
0
Function
Default Value
STATUS_CML
Unsigned binary
5
4
R
R
6
R
3
R
2
R
1
R
0
R
Invalid or
unsupported data
X
Memory fault
detected
X
X
Other fault
Memory
busy
0
0
0
0
0
0
0
READ_VIN (88h)
The READ_VIN command returns the 10-bit measured value of the input voltage.
Command
Format
Bit
Access
Function
Default Value
15
R
14
R
13
R
0
0
0
12
R
11
R
10
R
9
R
0
0
0
0
READ_VOUT
Direct
8
7
R
R
6
R
X
0
0
0
5
4
R
R
25mV/LSB
0
0
3
R
2
R
1
R
0
R
0
0
0
0
READ_VOUT (8Bh)
The READ_VOUT command returns the 13-bit measured value of the output voltage.
Command
Format
Bit
Access
Function
Default Value
15
R
14
R
X
0
0
13
R
12
R
11
R
10
R
9
R
0
0
0
0
0
READ_VOUT
Direct
8
7
6
5
R
R
R
R
1.25mV/LSB
0
0
0
0
4
R
3
R
2
R
1
R
0
R
0
0
0
0
0
READ_IOUT (8Ch)
The READ_IOUT command returns the 14-bit measured value of the output current. This value is also
compared with IOUT_OC_FAULT_LIMIT and IOUT_OC_WARN_LIMIT, and can affect STATUS_IOUT.
Command
Format
Bit
Access
Function
Default Value
15
R
14
R
13
R
12
R
11
R
10
R
9
R
0
0
0
0
0
1
X
0
READ_IOUT
Direct
8
7
6
R
R
R
62.5mA/LSB
0
0
1
5
R
4
R
3
R
2
R
1
R
0
R
0
1
1
0
0
0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
READ_TEMPERATURE_1 (8Dh)
The READ_TEMPERATURE_1 command returns the internal sensed temperature. This value is also
used internally for over-temperature warning and fault detection. This data has a range of -255°C to
+255°C.
Command
Format
Bit
Access
Function
Default Value
15
14
13
12
11
10
READ_TEMPERATURE_1
Direct
9
8
7
6
5
4
3
2
1
0
R
R
R
R
R
R
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
Sign
0
0
0
0
1
0
1
0
X
1°C/LSB
1
0
READ_TEMPERATURE_1 is a 2-byte, two’s complement integer. Bit[9] is the sign bit. Table 6 shows
the relationship between direct values and real-world values.
Table 6: Direct Value vs. Real-World Value
Sign
Direct Value
Real-World Value (°C)
0
0 0000 0000
0
0
0 0000 0001
1
0
1 1111 1111
+511
1
0 0000 0001
-511
1
1 1111 1111
-1
PMBUS_REVISION (98h)
The PMBUS_REVISION command returns the protocol revision used. Accesses to this command
should use the read byte protocol. Bit[7:4] indicates the PMBus revision of specification Part I to which
the device is compliant. Bit[3:0] indicates the revision of specification Part II to which the device is
compliant.
Name
Format
Bit
Access
Default Value
7
R
0
6
R
0
5
R
1
PMBUS_REVISION
Unsigned binary
4
3
R
R
1
0
2
R
0
1
R
1
0
R
1
Bit[7:4] is always read as 4’b0011, specification PMBus Part I Revision 1.3.
Bit[3:0] is always read as 4’b0011, specification PMBus Part II Revision 1.3.
MFR_ID (99h)
The MFR_ID command returns the company identification.
Byte
Byte Name
Value
0
Byte Count
0x03
1
2
3
Character 1
Character 2
Character 3
0x4D, ASCII of “M”
0x50, ASCII of “P”
0x53, ASCII of “S”
Description
Always read as 0x03. The number of data bytes that the
block read command expects to read.
Always read as 0x4D.
Always read as 0x50.
Always read as 0x53.
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
MFR_CTRL_COMP (D0h)
The MFR_CTRL_COMP command adjusts the loop compensation of the MP8796B.
Bits
[7:5]
[4]
Name
RESERVED
Cff
Access
R/W
Behavior
Live
R/W
Live
Default
000
0
Description
Sets the feed-forward capacitance when the internal
feedback resistor divider is selected.
0: 20pF
1: 50pF
Set the internal ramp compensation to stabilize the loop.
Note: The actual ramp amplitude is related to EAh[3]. Refer
to the register EAh description below for details.
[3:1]
[0]
RAMP
Slave Fault
Detection
R/W
Live
R/W
Live
100
1
EAh[3] = 0 (singlephase)
000: 5.6mV ramp
001: 9.8mV ramp
010: 18mV ramp
011: 30mV ramp
100: 8.5mV ramp
101: 15.1mV ramp
110: 27mV ramp
111: 44mV ramp
EAh[3] = 1 (multi-phase)
000: 8.6mV ramp
001: 15mV ramp
010: 27mV ramp
011: 45mV ramp
100: 13mV ramp
101: 23mV ramp
110: 41mV ramp
111: 68mV ramp
Enables or disables the slave fault detection function
through the PG pin.
0: Slave-phase fault detection is enabled
1: Slave-phase fault detection is disabled
MFR_CTRL_VOUT (D1h)
The MFR_CTRL_VOUT command adjusts the output voltage behaviors of the MP8796B.
Bits
[7]
[6]
[5:2]
Name
RESERVED
Vo
discharge
PG delay
Access
R/W
Behavior
Live
Default
0
R/W
Live
1
R/W
Live
0000
Description
1: Output voltage discharge at CTRL low
0: No active output voltage discharge
0000: 1ms
0001: 2ms
…
1110: 15ms
1111: 0ms
Chooses the internal voltage divider ratio.
[1:0]
VO_RANGE
R/W
Live
00
00: VREF / VO = 1, VO = 0.4V to 0.672V, LSB = 2mV
01: VREF / VO = 0.5, VO = 0.4V to 1.344V, LSB = 2mV
10: VREF / VO = 0.25, VO = 0.7V to 2.688V, LSB = 2mV
11: VREF / VO = 0.125, VO = 1.3V to 5.376V, LSB = 2mV
The default value of D1h is 0x40.
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
MFR_CTRL_OPS (D2h)
The MFR_CTRL_OPS command sets the switching frequency and light-load operation mode of the
MP8796B.
Bits
[7:3]
Name
RESERVED
[2:1]
SWITCHING_
FREQUENCY
R/W
Live
10
00: Set fSW to 400kHz
01: Set fSW to 600kHz
10: Set fSW to 800kHz
11: Set fSW to 1000kHz
SKIP_CCM
(SYNC)
R/W
Live
1
0: Pulse-skip mode at light load
1: Forced CCM at light load
[0]
Access
Behavior
Default
00000
Description
The default value of D2h is 0x05.
MFR_ADDR_PMBUS (D3h)
Command
Format
Bit
Access
Function
Default Value
7
R/W
Enable
1
6
R/W
5
R/W
0
1
MFR_ADDR_PMBUS
Direct
4
3
R/W
R/W
ADDR
1
0
2
R/W
1
R/W
0
R/W
0
0
0
Bit[7] (enable bit):
1: The address is decided by MFR_ADDR_PMBUS [6:0]
0: The address is decided by the ADDR pin
The default value of D3h is 0xB0.
MFR_VOUT _OVP_FAULT_LIMIT (D4h)
This MFR_VOUT _FAULT_LIMIT command sets the thresholds for UVP and OVP.
Bits
[7:4]
[3:2]
[1:0]
Name
RESERVED
OV_EXIT_
TH
OV_TH
Access
R/W
R/W
Behavior
Live
Live
Default
0000
Description
11
Sets the OVP exit threshold.
00: 10% of VREF
01: 50% of VREF
10: 80% of VREF
11: 102.5% of VREF
10
Sets the OVP entry threshold.
00: 115% of VREF
01: 120% of VREF
10: 125% of VREF
11: 130% of VREF
The above thresholds are relative values of the reference voltage. The default value of D4h is 0x0E.
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
MFR_OVP_NOCP_SET (D5h)
This MFR_OVP_NOCP_SET command sets the responses of the output voltage OVP.
Bits
[7:4]
Name
RESERVED
Access
Behavior
Default
0000
Description
[3]
DELAY_NOCP
(D400)
R/W
Live
0
0: 100ns delay after NOCP
1: 200ns delay after NOCP
[2]
NOCP
R/W
Live
0
0: Set NOCP to -10A
1: Set NOCP to -15A
VOUT_OV
_Response
R/W
Live
00
00: Latch off with output voltage discharge
01: Latch off without output voltage discharge in DCM
10: Hiccup with output voltage discharge
11: Hiccup without output voltage discharge in DCM
[1:0]
Bit[1:0] of the MFR_OVP_NOCP_SET command tells the converter what action to take in response to
an output over-voltage fault. The device also:
Sets the VOUT_OV bit in STATUS_BYTE
Sets the VOUT bit in STATUS_WORD
Sets the VOUT over-voltage fault bit in the STATUS_VOUT command
Notifies the host by asserting the ALERT pin
There are four OVP response modes that can be chosen through bit[1:0] of MFR_VOUT_OVP_
NOCP_SET:
Latch off with output discharge: Once the MP8796B reaches the OV entry threshold, the LS-FET
turns on until the MP8796B reaches NOCP. The MP8796B turns off for a fixed amount of time then
turns on again. This operation repeats until FB drops below the OVP exit threshold set by register
D4[3:2]. Then the LS-FET turns off. If FB rises beyond the OV entry threshold again, the LS-FET is
turns on again to discharge the output voltage. However, the converter does not attempt to restart
until the power of either VIN, VCC, or CTRL is recycled.
Latch off without output discharge (only effective in DCM): Once the MP8796B reaches the OV
entry threshold, the LS-FET turns on. When the inductor current crosses zero, the converter enters
Hi-Z mode (output disabled). The converter stops discharging the output voltage. The converter
does not attempt to restart until the power of either VIN, VCC, or CTRL is recycled.
Hiccup with output discharge: Once the MP8796B reaches the OV entry threshold, the LS-FET
remains on until the MP8796B reaches NOCP. The MP8796B turns off for a fixed amount of time
then turns on again. This operation repeats until FB drops below the OVP exit threshold set by
register D4[3:2]. Then the LS-FET turns off, and a new SS is initiated.
Hiccup without output discharge (only effective in DCM): Once the MP8796B reaches OV, the LSFET remains on until the MP8796B reaches NOCP. Then a new SS is initiated.
The default value of D5h is 0x00.
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
MFR_OT_OC_SET (D6h)
The MFR_OT_OC_SET command sets the responses of OCP, and sets the responses and hysteresis
of OTP. This is a 1-byte command.
Bits
[7:4]
[3]
[2:1]
[0]
Name
RESERVED
Access
Behavior
Default
0000
Description
OC_response
R/W
Live
0
0: Latch off, never retry
1: Retry
OT_hyst
R/W
Live
00
00: 20°C
01: 25°C
10: 30°C
11: 35°C
OT_Response
R/W
Live
0
0: Latch off, never retry
1: Retry after the temp drops by the value set by bit[2:1]
The MFR_OT_OC_SET command tells the converter which action to take in response to an overtemperature fault and a total output over-current fault.
The default value of D6h is 0x00.
MFR_OC_PHASE_SET (D7h)
The MFR_OC_PHASE_SET command sets the inductor valley current limit of each individual phase.
This is a cycle-by-cycle current limit. After 31 consecutive cycles of an over-current (OC) condition,
OCP is triggered. This is a 1-byte command.
Bits
[7:5]
[4:0]
Name
RESERVED
OC_limit
Access
Behavior
R/W
Live
Default
000
10101
Description
Current limit. 1.5A/LSB, [00000] = 0A.
The value is unsigned, and 1LSB = 1.5A. The default value of D7h is 0x15, which corresponds to 31.5A
of the inductor valley current limit.
MFR_HICCUP_ITV_SET (D8h)
This MFR_HICCUP_ITV_SET command sets the hiccup interval during OCP. This is a 1-byte
command.
Bits
[7:6]
Name
RESERVED
[5:0]
Hiccup_itv
Access
Behavior
Default
00
R/W
Live
000000
Description
OC fault hiccup interval time.
000000: 4ms
1 LSB = 4ms
D8h is only effective when EAh bit[10] is set to 1 and reaches the total output current limit.
When EAh bit[10] is set to 0 or when it reaches the inductor valley current limit set by
MFR_OC_PHASE_LIMIT, the OCP hiccup time is about five times the soft-start time set by TON_RISE
(61h).
The default value of D8h is 0x00.
MP8796B Rev. 1.0
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47
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
MFR _UVP_PGOOD_ON _LIMIT (D9h)
This MFR_UVP_PGOOD_ON_LIMIT command sets the thresholds UVP and PGOOD on. Any fault
condition will pull PG low. The default value of D9h is 0x09.
Bits
[7:4]
[3:2]
[1:0]
Name
RESERVED
UV_TH
PG_ON
Access
Behavior
R/W
Live
R/W
Live
Default
0000
Description
10
Sets the UVP threshold. When FB drops below the UV_TH
level, the MP8796B enters UVP. The response of UVP is
the same as in OCP.
00: 69% of VREF
01: 74% of VREF
10: 79% of VREF
11: 84% of VREF
01
Sets the threshold of FB at which PG is pulled high during
soft start. Once FB reaches the threshold, PG is pulled high
after the delay set by D1[5:2].
00: 90% of VREF
01: 92.5% of VREF
10: 95% of VREF
11: 97.5% of VREF
Any fault condition will pull PG low.
MFR_VOUT _STEP (DAh)
This MFR_VOUT_STEP command sets the slew rate of the output voltage transition after soft start
finishes. This command does not determine the output voltage slew rate during soft start.
Bits
[7:4]
Name
RESERVED
[3:0]
Vout_step
Access
Behavior
Default
0000
R/W
Live
0100
Description
0000: 20µs/2mV
1LSB = 2.5µs/2mV
The default value of DAh is 0x04.
MFR_LOW_POWER (E5h)
The MFR_LOW_POWER enables or disables the slave phases in multi-phase configuration.
Bits
[7:2]
Name
RESERVED
Access
Behavior
Default
000000
Description
[1]
LP_PS#
R/W
Live
0
0: Low-power mode is disabled regardless of PS#
1: Low-power mode is enabled when PS# is low, and
disabled when PS# is high
[0]
LP_PMBus
R/W
Live
0
0: Low-power mode is disabled through the PMBus
1: Low-power mode is enabled through the PMBus
The slave phases can be enabled/disabled directly through bit[0] of the MFR_LOW_POWER command.
When bit[1] of MFR_LOW_POWER is set to 1, the slave phases can be enabled or disabled by the
PS# pin. The master phase cannot be disabled through the MFR_LOW_POWER command. The
default value of E5h is 0x00.
MP8796B Rev. 1.0
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MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
MFR_CTRL (EAh)
Some bits of MFR_CTRL enables or disables some functions.
Bits
[15:11]
Name
RESERVED
Access
Behavior
R
Live
Default
Description
For manufacturer use only.
[10]
Total_Oc_
hiccup_interval
R/W
Live
0
[9]
OSM
R/W
Live
0
R
Live
00000
Chooses whether the interval during OCP hiccup can be
changed through register D8h.
0: Fixed OCP hiccup interval
1: Adjustable OCP hiccup interval
Enables or disables the output sink mode (OSM) function.
[8:4]
[3]
RESERVED
Phase_
operation
R/W
Live
1
0: Enable output sink mode (OSM)
1: Disable OSM
For manufacturer use only.
Determines single-phase or multi-phase operation. The
selection of this bit affects the actual ramp amplitude
chosen
through
register
D0h[3:1].
See
the
MFR_CTRL_COMP (D0h) section on page 45 for details.
0: For single-phase operation
1: For multi-phase operation
[2:0]
RESERVED
R
Live
000
For manufacturer use only.
MP8796B Rev. 1.0
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49
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
DEFAULT MTP CONFIGURATION
Table 7: 0000 Suffix Code Configuration
Output Voltage
0.92V
Input Voltage
Mode
12V
Forced CCM
Max Load(A)
30A
Valley Current Limit
31.5A
Number of IC in Parallel
1
Switch Frequency
800kHz
Soft-Start Time (1ms, 2ms, 4ms, 8ms,
16ms available)
2ms
Input UVLO Rising Voltage (V, 3V by
default)
Default
Input UVLO Falling Voltage (V, 2.75V
by default)
Default
Protection Mode (Hiccup and Latchoff available)
Latch off
Table 8: 0000 Suffix Code Register Value
Suffix Code
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
0000
Register
0x01
0x02
0x10
0x21
0x24
0x25
0x26
0x29
0x2B
0x35
0x36
0x4F
0x51
0x55
0x57
0x58
Hex Value
80
16
0
1CC
226
226
190
28C
170
C
B
91
8C
20
1E
28
Register
0x60
0x61
0x64
0XD0
0XD1
0XD2
0XD3
0XD4
0XD5
0XD6
0XD7
0XD8
0XD9
0XDA
0XE5
Hex Value
0
1
0
09
40
5
B0
E
0
0
15
0
9
4
0
MP8796B Rev. 1.0
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50
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
PACKAGE INFORMATION
TQFN-25 (4mmx5mm)
17
PIN 1 ID
MARKING
25
1
16
1.20
0.55
PIN 1 ID
INDEX AREA
0.00
0.55
4
14
1.20
5
13
BOTTOM VIEW
TOP VIEW
SIDE VIEW
NOTE:
1) LAND PATTERNS OF PINS 1-4 AND 14-16
HAVE THE SAME LENGTH AND WIDTH.
2) LAND PATTERNS OF PIN 5, 13, 17, AND 25
HAVE THE SAME LENGTH AND WIDTH.
3) ALL DIMENSIONS ARE IN MILLIMETERS.
4) LEAD COPLANARITY SHALL BE 0.08
MILLIMETERS MAX.
5) JEDEC REFERENCE IS MO-220.
6) DRAWING IS NOT TO SCALE.
1.20
0.55
0.00
0.55
1.20
RECOMMENDED LAND PATTERN
MP8796B Rev. 1.0
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51
MP8796B – 16V, 30A, SYNCHRONOUS STEP-DOWN CONVERTER WITH PMBUS
CARRIER INFORMATION
Pin1
1
1
ABCD
1
1
ABCD
ABCD
ABCD
Feed Direction
Part Number
MP8796BGVT- xxxx-Z
Package
Description
TQFN 4x5
Quantity/
Reel
5000
Quantity/
Tube
N/A
Reel
Diameter
13in
Carrier
Tape Width
12mm
Carrier
Tape Pitch
8mm
Notice: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP8796B Rev. 1.0
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1/19/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
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52
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