MP8848
6A, High-Efficiency, Synchronous,
Step-Down Switcher with I2C Interface
NOT RECOMMENDED FOR NEW DESIGNS, REFER TO MP8847
DESCRIPTION
FEATURES
The MP8848 is a highly integrated, highfrequency, synchronous, step-down switcher
with an I2C control interface. The MP8848 can
support up to 6A of load current over an input
supply range from 2.7V to 6V with excellent
load and line regulation.
•
•
•
Constant-frequency hysteretic mode provides
an extremely fast transient response without
loop compensation to achieve high efficiency
easily under light-load condition.
The output voltage level can be controlled onthe-fly through a 3.4Mbps I2C serial interface.
The voltage range can be adjusted from 0.6V to
1.235V in 5mV steps. The voltage slew rate,
switching frequency, and power-saving mode
are also selectable through the I2C interface.
Full protection features include internal soft
start, over-current protection (OCP), and overtemperature protection (OTP).
The MP8848 requires a minimal number of
readily
available,
standard,
external
components and is available in a compact
QFN-15 (2mmx3mm) package.
•
•
•
•
•
•
•
•
2.7V to 6V Input Voltage Range
Up to 6A Load Current
Internal 32mΩ High-Side and 15mΩ LowSide Power MOSFETs
I2C-Compatible Interface up to 3.4Mbps
I2C-Programmable Output Range from 0.6V
to 1.235V in 5mV Steps
Factory Adjustable Switching Frequency
from 0.85MHz to 2.2MHz
Power-Saving Mode Selectable via I2C
Internal 1ms Soft Start
Power Good Indicator
Current Overload and Thermal Shutdown
Protection
Available in a QFN-15 (2mmx3mm)
Package
APPLICATIONS
•
•
Processor Core Supplies
Micro Converters
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under
Quality Assurance. “MPS” and “The Future of Analog IC Technology” are
registered trademarks of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
MP8848 Rev. 1.0
2/16/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2023 MPS. All Rights Reserved.
1
MP8848 – 6A, HIGHLY EFFICIENT, SYNC, STEP-DOWN SWITCHER WITH I2C
NOT RECOMMENDED FOR NEW DESIGNS, REFER TO MP8847
ORDERING INFORMATION
Part Number*
MP8848GD
Package
QFN-15 (2mmx3mm)
Top Marking
See Below
* For Tape & Reel, add suffix –Z (e.g. MP8848GD–Z)
TOP MARKING
AVV: Product code of MP8848GD
Y: Year code
WW: Week code
LLL: Lot number
PACKAGE REFERENCE
TOP VIEW
AVIN
14
SCL
13
PG
1
12
VOUT
SDA
2
11
AGND
GND
3
VIN
4
VIN
5
15
6
7
VIN
SW
10
EN
9
SW
8
SW
QFN-15 (2mmx3mm)
MP8848 Rev. 1.0
2/16/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2023 MPS. All Rights Reserved.
2
MP8848 – 6A, HIGHLY EFFICIENT, SYNC, STEP-DOWN SWITCHER WITH I2C
NOT RECOMMENDED FOR NEW DESIGNS, REFER TO MP8847
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
Supply voltage (VIN) ........................ -0.3V to 7V
VSW ............................... -0.3V (-5V for 110% of target output)
MP8848 Rev. 1.0
2/16/2017
PG
Low
Low
Low
Low
High
Low
Low
REGULATION
Off
Off
On
Off
On
Off
On
LATCH-OFF
No
N/A
No
Yes
No
Yes
No
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© 2023 MPS. All Rights Reserved.
STATUS BIT
OVP
UVLO
OTW
N/A
ILIM
VoUV
VoOV
14
MP8848 – 6A, HIGHLY EFFICIENT, SYNC, STEP-DOWN SWITCHER WITH I2C
NOT RECOMMENDED FOR NEW DESIGNS, REFER TO MP8847
BLOCK DIAGRAM
VIN
AVIN
AVIN
PG
UVLO &
Power Status
Control
EN
Clock
PLL
AVIN
SCL
SDA
I2C IF
&
Registers
Clock
DAC
PWM
+
SS
+
_
VOUT
Diff.
Amp
Driver
&
Control
+
SW
GND
AGND
Ramp
Figure 1: Functional Block Diagram
MP8848 Rev. 1.0
2/16/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2023 MPS. All Rights Reserved.
15
MP8848 – 6A, HIGHLY EFFICIENT, SYNC, STEP-DOWN SWITCHER WITH I2C
NOT RECOMMENDED FOR NEW DESIGNS, REFER TO MP8847
Soft Start (SS)
OPERATION
The MP8848 has a built-in soft start that ramps
The MP8848 is a low-voltage, 6A, synchronous,
2
up the output voltage at a controlled slew rate,
step-down converter with a controllable I C
preventing inrush current and output voltage
interface. The MP8848 applies MPS’s patented
overshoot at start-up. The soft-start time is
constant-frequency hysteretic control to utilize
about 1ms.
fast transient response of the hysteretic control
and keep the switching frequency constant. No
Power Good (PG) Indicator
compensation is required, which simplifies the
The MP8848 has an open-drain output for
design procedure.
power good (PG) indication. When the output
voltage is within ±10% of the regulation voltage,
The MP8848 integrates an I2C-compatible
PG is pulled up to VIN by the external resistor.
interface that allows transfers of up to 3.4Mbps.
This communication interface can be used for
Current Limit
dynamic voltage scaling with voltage steps
The MP8848 has a typical 11A current limit for
down to 5mV with the output voltage from 0.6V
the high-side switch. When the high-side switch
to 1.235V. The voltage transition slew rate can
reaches the current limit, the MP8848 expands
be controlled as well.
the minimum off time until the current drops to
Light-Load Operation
5.8A before the high-side switch is turned on for
the next switching cycle. This prevents the
In light-load condition, the MP8848 uses a
inductor current from continuing to build up and
proprietary control scheme to save power and
damaging the components.
improve efficiency. The MP8848 turns off the
low-side switch when the inductor current
Thermal Protection
begins reversing. The MP8848 then works in
The MP8848 employs thermal shutdown by
discontinuous
conduction
mode
(DCM)
monitoring the junction temperature of the IC
operation.
internally. If the junction temperature exceeds
Enable (EN)
the thermal warning threshold (around 130°C),
OTW is set. If there is no action or response
When the input voltage is greater than the
from the system, the junction temperature
under-voltage lockout (UVLO) threshold
continues rising until it exceeds the thermal
(typically 2.55V), the MP8848 can be enabled
shutdown threshold (typically 150°C). After
by pulling EN above 1.8V. Pull EN down to
thermal shutdown, a new power start-up cycle
ground to disable the MP8848. The IC can also
is needed to turn on the MP8848 again.
be disabled by floating EN. There is an internal
1MΩ resistor from EN to ground.
MP8848 Rev. 1.0
2/16/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2023 MPS. All Rights Reserved.
16
MP8848 – 6A, HIGHLY EFFICIENT, SYNC, STEP-DOWN SWITCHER WITH I2C
NOT RECOMMENDED FOR NEW DESIGNS, REFER TO MP8847
Output Voltage Select
I C INTERFACE
The MP8848 output voltage is I2CThe MP8848 can communicate with the core
programmable. There is no need to set
and the I2C for smart design. MPS has a GUI
feedback resistors to achieve different output
control interface (see Figure 2). The installation
voltages. The default output voltage is 0.94V
process and usage can be found in the MP884x
but can be set from 0.6V to 1.235V in 5mV
Family Software Guide.
steps via the I2C. To change the output voltage,
2
I C Address
write the Go bit (Reg03 Syscntlreg2 [D5]) to 1.
The I2C slave address of the MP8848 is
This action means that the output voltage can
0xC0H/0xC1H internally (see Table 2). If other
be set to another value that is not the default Vo
slave addresses are needed, please contact the
voltage. Then write the Output Reference bit
factory.
(Reg01 VSEL [D6:D0]). The output voltage can
be changed according to Table 1.
Table 2: I2C Slave Address
2
Hex
W 0xC0
R 0xC1
Address
A7
A6
A5
A4
A3
A2
A1
A0
1
1
0
0
0
0
0
R/W
0x60
I2C Enable
The MP8848’s EN pin can start up and shut
down the converter, and the I2C EN pin can
control the converter as well. The Reg01 VSEL
D7 bit is I2C-controlled enabled. When writing
D7 = 0, the converter is off. When writing D7 =
1, the converter is on. Both the external EN and
I2C EN can control the converter. The converter
works only when both EN pins are high.
To guarantee a normal output voltage, the input
voltage is suggested to be 1.5V higher than the
pre-set output voltage.
Switching Frequency
The default switching frequency of the MP8848
is 1.25MHz. However, the frequency can also
be changed based on the application. By writing
the
Switching
Frequency
bits
(Reg02
SysCntlreg1 [D7:D5], the switching frequency
can be programmed to one of six possible
values. Their corresponding data can be found
in Reg02 SysCntlreg1.
Figure 2: MP884x Family Control Interface
MP8848 Rev. 1.0
2/16/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2023 MPS. All Rights Reserved.
17
MP8848 – 6A, HIGHLY EFFICIENT, SYNC, STEP-DOWN SWITCHER WITH I2C
NOT RECOMMENDED FOR NEW DESIGNS, REFER TO MP8847
PG Configuration
Output Voltage Transition Slew Rate
The MP8848 has an option to use the
When the output voltage switches from low to
PG_LOHI function. This function can be written
high or from high to low, the transition slew rate
in the PG_LOHI bit (Reg02 Syscntlreg1 [D2]).
can differ. There are two possible values for
The default value is 1, where PG senses both a
selection. Through writing the Slew Rate bits
positive and negative excursion of Vo from the
(Reg03 Syscntlreg2 D2), the transition slew rate
reference. If writing this bit to 0, PG only senses
can be set at one possible value based on the
a negative voltage excursion of Vo from the
application. The internal reference follows the
reference.
set slew rate, but the output voltage slew rate
does not always follow the internal reference.
Input Over-Voltage Protection (OVP)
Considering the output capacitor and inductor,
The MP8848 has an option to use the
the actual output voltage slew rate should be a
VIN_OVP function. This function can be written
little slower.
in the VIN_OVP bit (Reg02 Syscntlreg1 [D1]).
AVIN Multi-Use
The default value is 0, where the VIN_OVP
function is enabled. When VIN is higher than
The MP8848’s AVIN pin has multi-usage. When
6.3V, the converter is disabled. After VIN
the P3 Enable bit (Reg03 SysCntlreg2 D1) is 0,
recovers to 6.2V, the converter restarts. If the
AVIN is an internal analog supply. When the P3
VIN_OVP bit is set to 1, VIN OVP is disabled.
Control bit (Reg03 sysCntlrge2 D1) is 1, the P3
The converter will not stop, even if VIN exceeds
voltage is controlled by the P3 Set bit (Reg03
its safe range.
sysCntlrge2 D0). The P3 voltage is high if D0 =
0; otherwise, the P3 voltage is low (see Table
Forced Continuous Conduction Mode (CCM)
3).
The
MP8848
has
auto-pulse-frequency
Table 3: AVIN Multi-Use
modulation (PFM) mode and forced continuous
D1
D0
AVIN
conduction mode (CCM). This function can be
0
0
written in the Mode bit (Reg02 Syscntlreg1
Internal analog supply
0
1
[D0]). The default value is 0, where auto-PFM
1
0
Forced to 1
mode is selected. Considering a smaller Vo
1
1
Forced to 0
ripple and regulation for a full load range, forced
2
CCM is recommended. Set this bit to 1 to
I C Register Hold On
disable PFM mode.
The MP8848 has a special function: the I2C
Output Discharge
register can hold on after EN changes low. The
updated register can be held for later
The MP8848 has an output discharge function.
application conditions, even if the external EN
Writing the Out-dis bit (Reg03 SysCntlreg2 [D4])
pulls low.
can change the output discharge mode. The
default value is 1. Discharge the internal Vo
resistance when EN is low. Writing D4 = 1 can
enable the function, and then the output voltage
can be discharged by the internal pull-down
resistance.
MP8848 Rev. 1.0
2/16/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2023 MPS. All Rights Reserved.
18
MP8848 – 6A, HIGHLY EFFICIENT, SYNC, STEP-DOWN SWITCHER WITH I2C
NOT RECOMMENDED FOR NEW DESIGNS, REFER TO MP8847
TYPICAL APPLICATION CIRCUITS
Figure 3: Application Circuit
MP8848 Rev. 1.0
2/16/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2023 MPS. All Rights Reserved.
19
MP8848 – 6A, HIGHLY EFFICIENT, SYNC, STEP-DOWN SWITCHER WITH I2C
NOT RECOMMENDED FOR NEW DESIGNS, REFER TO MP8847
PACKAGE INFORMATION
QFN-15 (2mmx3mm)
PIN 1 ID
PIN 1 ID
MARKING
PIN 1 ID
INDEX AREA
BOTTOM VIEW
TOP VIEW
SIDE VIEW
0.10X45º
NOTE:
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) LEAD COPLANARITY SHALL BE 0.10
MILLIMETERS MAX.
3) JEDEC REFERENCE IS MO-220.
4) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP8848 Rev. 1.0
2/16/2017
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2023 MPS. All Rights Reserved.
20