MP9184A
19A, 600kHz, 20V Wide Input Range,
Synchronous Boost Converter
with Input Disconnect Function
The Future of Analog IC Technology
DESCRIPTION
The MP9184A is a 600kHz, fixed frequency,
high-efficiency, wide input range, current-mode
boost converter with optional input disconnect
and an input average current limit function. The
input disconnect feature provides additional
protection by isolating the input from the output
during output short or shutdown. For batteryoperated applications, this feature also helps in
preventing
battery
depletion.
With
a
programmable input average current limit, the
MP9184A supports a wide range of applications,
including POS, Thunderbolt, Bluetooth Audio,
Power Banks, and Fuel Cells. The MP9184A
features a 10mΩ, 24V power switch and a
synchronous gate driver for high efficiency. An
external compensation pin allows flexibility in
setting loop dynamics and obtaining optimal
transient performance at all conditions.
The MP9184A includes under-voltage lockout,
switching current limiting, and thermal
shutdown to prevent damage in the event of an
output overload.
The MP9184A is available in a low-profile
QFN-22 (3mm x 4mm) package.
FEATURES
3V to 20V Wide Input Range
Integrated 10mΩ Low-Side Power FET
SDR Driver for Synchronous Solution
19A Internal Switch Current Limit or
External Programmable Input Current
Limit
Input Disconnect and Output SCP
External Soft Start and Compensation for
Higher Flexibility
Programmable UVLO and Hysteresis
< 1µA Shutdown Current
Thermal Shutdown at 150°C
Available in QFN-22 (3mm x 4mm)
Package
APPLICATIONS
Thunderbolt Interface
Notebooks and Tablets
Bluetooth Audio
Power Banks
Fuel Cells
POS Systems
Other Electronic Accessories
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For
MPS green status, please visit the MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
MP9184A Rev. 1.1
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MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
ORDERING INFORMATION
Part Number*
MP9184AGL
Package
QFN-22 (3mm x 4mm)
Top Marking
See Below
* For Tape & Reel, add suffix –Z (e.g. MP9184AGL–Z)
TOP MARKING
MP: MPS prefix;
Y: year code;
W: week code:
9184A : first five digits of the part number;
LLL: lot number;
PACKAGE REFERENCE
TOP VIEW
MP9184A Rev. 1.1
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MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
SW .....................–0.3V to +24V (28V for 5.5V) for automatic start-up. Also, EN can be
used to program Vin UVLO. Do NOT leave EN floating.
Driver for the input disconnect MOSFET. If it’s connected to the gate of the input
MOSFET or floating, an external current-sense resistor is needed. Connect CLDR to
5
CLDR
GND to use the internal current sense circuit. Do NOT pull CLDR down to GND
through a resistor.
6
SENSE Voltage sense. Voltage sensed between SENSE and IN determines the external
current-sense signal. Connect SENSE to IN if the internal current sense solution is
selected.
Power switch output. SW is the drain of the internal power MOSFET. Connect the
7,8,19,20,21
SW
power inductor and output rectifier to SW.
9,10,17,18,22 PGND Power ground.
11
IN
Input supply. IN must be bypassed locally.
Internal bias supply. Decouple with a 2.2μF ceramic capacitor as close to VDD as
12
VDD
possible.
Compensation. Connect a capacitor and resistor in series to analog ground for loop
13
COMP
stability.
Feedback input. The reference voltage is 1.225V. Connect a resistor divider from VOUT
14
FB
to FB.
Soft-start control. Connect a soft-start capacitor to SS. The soft-start capacitor is
15
SS
charged with a constant current. Leave SS disconnected if the soft start is not used.
16
AGND Analog ground.
MP9184A Rev. 1.1
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MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
FUNCTIONAL BLOCK DIAGRAM
Figure 1: Functional Block Diagram
MP9184A Rev. 1.1
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MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
OPERATION
Boost Function
The MP9184A uses a constant frequency, peak
current mode, boost regulation architecture to
regulate the output voltage.
At the beginning of each cycle, the N-channel
MOSFET switch Q is turned on, forcing the
inductor current to rise. The current flowing
through switch Q is measured externally (or
measured internally when CLDR is connected
to GND) and converted to a voltage by the
current amplifier. That voltage is compared with
the error voltage on the internal COMP, which
is a buffer voltage from the external COMP pin
during normal operation. The voltage on the
external COMP pin is an amplified version of
the difference between the 1.225V reference
voltage and the feedback voltage. When the
sensed voltage is equal to the buffered COMP
voltage, the PWM comparator turns off switch Q,
forcing the inductor current into the output
capacitor through the external rectifier. This
causes the inductor current to decrease. The
peak inductor current is controlled by the
voltage on COMP, which in turn is controlled by
the output voltage. Thus the output voltage is
regulated by the inductor current to satisfy the
load. Current mode regulation improves the
transient response and control loop stability.
VDD Power
The MP9184A internal circuit is powered by
VDD. A ceramic capacitor (no lower than 2.2μF)
is required to decouple VDD. During start-up,
VDD power is regulated from IN. Once the
output voltage exceeds the input voltage, VDD
is powered from VOUT instead of VIN. This allows
the MP9184A to maintain low RON and high
efficiency even with low input voltage.
Soft Start (SS)
The MP9184A uses one external capacitor on
SS to control the switching frequency during
start-up. The operation frequency is initially 1/4
of the normal frequency. As the SS capacitor is
charged (the charging happens after the
MP9184A runs in boost operation), the
frequency increases continually. When the
voltage on SS exceeds 0.65V, the frequency
switches to a normal frequency. In addition, the
voltage on COMP is clamped within VSS + 0.7V.
So during start-up, the COMP voltage reaches
0.7V quickly and then rises at the same rate of
VSS. These two mechanisms prevent high
inrush current from the input power supply.
SDR and BST Function
The MP9184A generates a synchronous gate
driver, which is complementary to the gate
driver of the internal low-side MOSFET. The
SDR driver is powered from BST (5V, typically).
A low QG, N-channel MOSFET with a gate
threshold voltage lower than 2.5V is preferred
for synchronous rectification. In high-power
application, using a synchronous rectifier switch
improves the overall converting efficiency. If a
synchronous rectifier switch is not used, float
SDR.
The 5V BST voltage is powered from OUT. If
the output voltage is low or the duty cycle is too
low, the BST voltage may not be regulated to
5V, triggering a BST_UVLO. If this condition
occurs, a Schottky diode from an external 5V
source to BST is recommended. Otherwise the
SDR driver signal may be lost.
Current Sensing Configuration
The MP9184A offers the option of using an
internal circuit or an external resistor to sense
the inductor current. When using an internal
current-sense circuit, the CLDR must be
connected directly to GND before powering on.
Meanwhile, SENSE should be connected to IN.
In this condition, the internally sensed current is
compared to both the COMP voltage and the
peak inductor current limit to generate the duty
cycle.
When CLDR is connected to the gate of the
input MOSFET or left floating before powering
on, the inductor current is sensed by an
external resistor between IN and SENSE.
Under this configuration, the externally sensed
current is compared with COMP for low-side
switch on/off control. The over-load protection
or disconnect function is achieved by
MP9184A Rev. 1.1
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MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
monitoring the average input current through
the external sensing resistor (see the
“Protection and Input Disconnect Function”
section below for additional details).
Protection and Input Disconnect Function
The MP9184A features excellent OCP and SCP.
During start-up, the MP9184A monitors the
voltage on CLDR to determine internal or
external current sensing. Connecting CLDR to
the gate of an external MOSFET or leaving it
floating selects an external sensing resistor;
connecting CLDR directly to GND selects an
internal sensing circuit.
If internal current sensing is selected, OCP is
achieved by limiting the peak inductor current in
every switching cycle (without hiccup in OCP)
unless VOUT is pulled below VIN. After the SS
voltage exceeds about 0.7V, the MP9184A may
run in hiccup if it detects that the output voltage
is lower than the input voltage. This prevents
the MP9184A from damage even if there isn’t
an input disconnecting MOSFET during a
heavy-load condition.
If external current sensing is selected, CLDR is
charged by a typical 13µA current from the
internal charge pump. Once the voltage on
CLDR reaches the MOSFET’s threshold, the
input current is generated, charging up the
output capacitors, and hence the output voltage
follows the CLDR voltage with a MOSFET (VTH)
threshold difference. The MP9184A has a
current feedback loop to control the CLDR and
COMP voltage, so the input current will not
exceed VCL(mV)/RSENSE(mΩ).
During start-up with external current sensing (if
VCLDR is lower than VIN + 1.6V), the linear
charge current limit works with the VCL/RSENSE
limitation (VCLDR is regulated to limit the current),
and the MP9184A shuts down if the linear
charge current limit is triggered for more than
0.5ms by pulling CLDR down to GND. The
MP9184A will wait for 20ms~70ms (the hiccup
time depends on VIN and VOUT) to restart if it is
not reset by VIN or EN. A normal load will not
lead to hiccup protection during start-up.
If VCLDR is higher than VIN + 1.6V, boost
switching is enabled. SS is charged, and the
power MOSFET turns on/off periodically to
regulate VOUT following the SS signal. When the
MP9184A starts switching, and VOUT is lower
than VIN, both the linear charge current limit
(regulated CLDR voltage) and the boost input
average current limit (regulated COMP voltage)
begin to work; both the control loops work with
the limit of VCL/RSENSE.
After VOUT is charged higher than VIN in boost
mode, only the boost input average current limit
works (regulated COMP voltage). The
MP9184A will not trigger hiccup OCP unless
the SS voltage is higher than 0.7V, and VOUT
drops lower than VIN. If hiccup protection is
triggered in switching mode, the switching stops,
and CLDR is pulled low. It will re-start after
20ms~70ms, depending on VIN and VOUT. The
recovery process is the same as the start-up
process.
Table 1 shows the detailed over-currentprotection mode when using an external
current-sense resistor.
MP9184A Rev. 1.1
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MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
Table 1: MP9184A OCP Mode when Using an External Current-Sense Resistor
Condition
Work Mode
VCLDR < VIN + 1.6V
Linear charge
mode,
no boost switching
VCLDR ≥ VIN + 1.6V（8）
VOUT ≤ VIN
VSS ≤ 0.7V
Boost switching
VCLDR ≥ VIN + 1.6V（8）
VOUT ≤ VIN
VSS > 0.7V
Boost switching
Runs into hiccup protection without delay.
Boost switching
The linear charge current limit does not work. VCLDR remains
high.
Boost input average current limit works.
(1) COMP voltage is regulated to keep the input average
current at VCL/RSENSE, no hiccup.
VCLDR ≥ VIN + 1.6V（8）
VOUT > VIN
OCP Action
Linear charge current limit works:
(1) VCLDR is regulated down to keep the input current at
VCL/RSENSE.
(2) If the linear charge OCP lasts 0.5ms, the MP9184A triggers
hiccup protection.
Boost input average current limit does not work.
Linear charge current limit works:
(1) VCLDR is regulated down to keep the input current at
VCL/RSENSE.
(2) If the linear charge OCP lasts 0.5ms, the MP9184A triggers
hiccup protection.
Boost input average current limit works:
(1) COMP voltage is regulated to keep the input average
current at VCL/RSENSE.
NOTE:
8) After start-up, the VCLDR ≥ VIN + 1.6V condition is registered if VCLDR is higher than VIN + 1.6V one time. This means the MP9184A treats the
condition as VCLDR ≥ VIN + 1.6V even if VCLDR falls below VIN + 1.6V again in protection mode (unless it is turned off by the hiccup protection
or by the power re-cycle).
If the inductor current ramps quickly and the
inductor
peak
current
exceeds
100(mV)/RSENSE(mΩ), the MP9184A shuts down
immediately, entering SCP hiccup. This fast
protection allows the MP9184A to survive all
SCP events.
When the MP9184A is shut down by EN or VIN,
CLDR is pulled down to GND, so the output and
input are well isolated by the input MOSFET.
This is the VIN-to-VOUT disconnecting function.
Light-Load Operation
To optimize efficiency at light load, the
MP9184A employs a foldback frequency and a
pulse-skipping mechanism. When the load
becomes lighter, the COMP voltage decreases,
causing the MP9184A to enter foldback
operation (the lighter the load, the lower the
frequency). However, if the load becomes
exceedingly low, the MP9184A enters PSM.
PSM operation is optimized so that only one
switching pulse is launched in every burst cycle.
Enable (EN) and Programmable UVLO
EN enables and disables the MP9184A. When
voltage higher than VEN_H (1V) is applied, the
MP9184A starts up some of the internal circuits
(micro-power mode). If the EN voltage
continues to increase higher than VEN_ON
(1.33V), the MP9184A enables all functions and
begins to boost operation. Boost operation is
disabled if the EN voltage is lower than VEN_ON
(1.33V). To shut down the MP9184A completely,
a voltage less than VEN_L (0.4V) is required on
EN. After shutdown, the MP9184A sinks a
current less than 1µA from the input power.
The maximum recommended voltage on EN is
5.5V. If the EN control signal comes from a
voltage higher than 5.5V, a resistor should be
added between EN and the control source. An
internal Zener diode on EN clamps the EN
voltage to prevent runaway. Ensure the Zener
clamped current flowing into EN is less than
0.3mA.
MP9184A Rev. 1.1
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MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
EN can be used to program Vin’s UVLO (see
the “Applications\UVLO Hysteresis” section for
additional details.
Output Over-Voltage Protection
Except for controlling the COMP signal to
regulate the output voltage, the MP9184A also
provides over-voltage protection. If the FB
voltage is higher than 108% of the reference
voltage, boost switching stops. When the FB
voltage drops below 104% of the reference
voltage, the device resumes switching
automatically.
Thermal Shutdown
The device has an internal temperature monitor.
If the die temperature exceeds 150°C, the
converter shuts down. Once the temperature
drops below 125°C, the converter will turn on
again.
MP9184A Rev. 1.1
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MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
APPLICATION INFORMATION
Components referred to below apply to the
“Typical Application” circuit.
Selecting the Current Limit Resistor
The MP9184A features an average current limit
when the external sensing resistor is used. The
resistor (RSENSE) connected between IN and
SENSE sets the current limit (ICL). See Equation
(1):
ICL VCL /RSENSE
(1)
Where, VCL is 54mV, typically, ICL is in amperes,
and RSENSE is in mΩ.
Considering the parasitic inductance on the
sense resistor, a small package resistor (e.g.,
0805 package) is recommended. (Add several
parallel resistors if the power rating is lower than
requested.) To reduce the affection of parasitic
resistance and noise, a sense resistor with higher
than 4mΩ resistance is recommended.
UVLO Hysteresis
The MP9184A features a programmable UVLO
hysteresis. When powering up, EN sinks a 4.5μA
current from the upper resistor, RTOP (see Figure
2). VIN must increase in voltage to overcome the
current sink. The VIN start-up threshold is
determined by Equation (2):
VINON VENON (1
RTOP
) 4.5A RTOP
RBOT
(2)
Where, VEN-ON is the EN voltage turn-on threshold
(1.33V, typically).
Once the EN voltage reaches VEN-ON, the 4.5µA
sink current turns off to create a reverse
hysteresis for the VIN falling threshold. See
Equation (3):
VINUVLO HYS 4.5A RTOP
Figure 2: VIN VULO Program
(3)
Selecting the Soft-Start Capacitor
The MP9184A includes a soft-start circuit that
limits the voltage on COMP during start-up to
prevent excessive input current. This prevents
premature termination of the source voltage at
start-up due to input current overshoot. When
power is applied to the MP9184A and enable is
asserted, a 7μA internal current source charges
the external capacitor at SS. The SS voltage
clamps the COMP voltage (as well as the
inductor peak current) until the output is close to
regulation or until COMP reaches 2V. For most
applications, a 10nF SS capacitor is sufficient. If
the output capacitance is large or the front power
supply cannot withstand the huge inrush current,
SS capacitors can be increased properly.
Setting the Output Voltage
The output voltage is fed back through two sense
resistors in series. The feedback reference
voltage is 1.225V, typically. The output voltage is
determined with Equation (4):
VOUT VREF (1
R1
)
R2
(4)
Where:
R1 is the top feedback resistor.
R2 is the bottom feedback resistor.
VREF is the reference voltage (1.225V, typically).
Choose the feedback resistors in the 10kΩ range
(or higher) for good efficiency.
Selecting the Input Capacitor
An input capacitor is required to supply the AC
ripple current to the inductor while limiting noise
at the input source. A low ESR capacitor is
required to minimize noise. Ceramic capacitors
are preferred, but tantalum or low ESR
electrolytic capacitors will suffice.
At least two 22µF capacitors are recommended
for high-power applications, considering loop
stability. The capacitor can be electrolytic,
tantalum, or ceramic. However, since the
capacitor absorbs the input switching current, it
requires an adequate ripple current rating. Use a
capacitor with a RMS current rating greater than
the inductor ripple current (see the “Selecting the
Inductor” section to determine the inductor ripple
current).
MP9184A Rev. 1.1
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MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
To ensure stable operation, place the input
capacitor as close to the IC as possible.
Alternately, a smaller, high-quality 0.1μF ceramic
capacitor may be placed closer to the IC while
the larger capacitor placed farther away. If using
this technique, a larger electrolytic or tantalum
type capacitor is recommended. All ceramic
capacitors should be placed close to the
MP9184A input.
Selecting the Inductor
The inductor is required to force the higher output
voltage while being driven by the input voltage. A
higher value inductor has less ripple current,
resulting in lower peak inductor current. This
reduces stress on the internal N-channel switch
and enhances efficiency. However, the higher
value inductor has a larger physical size, a higher
series resistance, and a lower saturation current.
Selecting the Output Capacitor
A good rule of thumb is to allow the peak-to-peak
ripple current to be approximately 30%-40% of
the maximum input current. Make sure that the
peak inductor current is below 75% of the current
limit at the operating duty cycle to prevent loss of
regulation due to the current limit. Also, make
sure that the inductor does not saturate under the
worst-case load transient and start-up conditions.
Calculate the required inductance value with
Equation (7) and Equation (8):
The output capacitor is required to maintain the
DC output voltage. Low ESR capacitors are
preferred to minimize the output voltage ripple.
The characteristics of the output capacitor affect
the stability of the regulation control system.
Ceramic, tantalum, or low ESR electrolytic
capacitors are recommended. If using ceramic
capacitors, the impedance of the capacitor at the
switching frequency is dominated by the
capacitance, so the output voltage ripple is
independent of the ESR. The output voltage
ripple is estimated with Equation (5):
VIN
) ILOAD
VOUT
COUT FSW
(5)
Where VRIPPLE is the output ripple voltage, VIN and
VOUT are the DC input and output voltages
respectively, ILOAD is the load current, Fsw is the
600kHz fixed switching frequency, and COUT is
the capacitance of the output capacitor.
If using tantalum or low ESR electrolytic
capacitors, the ESR dominates the impedance at
the switching frequency, so the output ripple is
estimated using Equation (6):
VIN
) ILOAD
VOUT
I
RESR VOUT
LOAD
COUT FSW
VIN
(1
VRIPPLE
VIN (VOUT VIN )
VOUT FSW I
IIN(max)
(1
VRIPPLE
L
(6)
Where, RESR is the equivalent series resistance of
the output capacitors.
Choose an output capacitor to satisfy the output
ripple and load transient requirements of the
design. Capacitance de-rating should be taken
into consideration when designing high output
voltage applications. Three 22μF ceramic
capacitors are suitable for most applications.
(7)
VOUT ILOAD(MAX)
VIN
(8)
Where :
ILOAD(MAX) is the maximum load current.
ΔI is the peak-to-peak inductor ripple current.
ΔI = (30% - 40%) x IIN (MAX).
ŋ is the efficiency.
Selecting the Output Rectifier
The MP9184A features a SDR gate driver.
Instead of a Schottky diode, an N-channel
MOSFET can be used to free-wheel the inductor
current when the internal MOSFET is off. The
SDR gate driver voltage has a high 5V voltage,
so choose an N-channel MOSFET compatible
with a 5V gate voltage rating. The minimum high
level is about 3V. Therefore, the MOSFET’s turnon threshold is recommended lower than 2.5V.
In some low output applications, such as a 5V
output, the voltage across the BST capacitor may
be insufficient. In this case, a Schottky diode
should be connected from the output port to BST,
conducting the current into the BST capacitor
when SW goes low (see Figure 3).
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MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
6. On resistance (RDS_ON). It should be small for
high conversion efficiency.
7. Low leakage current. It should be low for
better isolation.
In addition, size and thermal temperature should
be taken into consideration.
Selecting the Input MOSFET
The MP9184A integrates one CLDR pin to drive
an external N-channel MOSFET to disconnect
the input power or limit the input current. The
following key factors should be considered when
selecting the input disconnecting MOSFET:
1. Drain-to-source voltage rating. This value
should be higher than VIN plus VTH of the
input MOSFET.
2. Drain-to-source current rating. The maximum
current through the input disconnecting
MOSFET is the maximum input current. This
occurs when the input voltage is at a
minimum and the load power is at a
maximum.
3. SOA. The MOSFET should survive when
conducting a current pulse that has a high
level of VCL(mV)/RSENSE(mΩ) and lasts for
Css(nF) x 0.7(V)/7(uA) + 0.5 (units: ms).
4. Gate-to-source voltage rating. The positive
gate-to-source voltage rating should be
higher than 5.5V while the negative voltage
rating should be higher than the value of the
output voltage. If the output voltage is too
high and the MOSFET gate-to-source rating
cannot meet the requirement, a diode from
the source to the gate of the disconnecting
MOSFET is recommended (see Figure 4).
5. Gate-to-source threshold voltage. The
threshold should be lower than 1.5V. A
1V~1.2V overall temperature range is
preferred.
BST
The MOSFET voltage rating should be equal to
or higher than the output voltage. The average
current rating must be higher than the maximum
load current, and the peak current rating must be
higher than the peak inductor current. If a
Schottky diode is used as the output rectifier, the
same specifications should be considered.
SW
Figure 3: BST Charger for Low Output Application
Figure 4: Gate Protection Diode for High Output
Voltage Condition
Compensation
The output of the transconductance error
amplifier (COMP) is used to compensate the
regulation control system. The system uses two
poles and one zero to stabilize the control loop.
The poles are FP1 (set by the output capacitor,
COUT, and the load resistance), and FP2 (start from
origin). The zero FZ1 is set by the compensation
capacitor (CCOMP) and the compensation resistor
(RCOMP). These are determined by Equation (9)
and Equation (10):
FP1
FZ1
1
(Hz)
2 RLOAD COUT
1
2 RCOMP CCOMP
(Hz)
(9)
(10)
Where, RLOAD is the load resistance.
The DC loop gain is calculated using Equation
(11):
A VDC
A VEA VIN R LOAD VFB G CS x R COMP
(V / V )
2
2 VOUT
(11)
Where GCS is the compensation voltage to the
inductor current gain, AVEA is the error amplifier
voltage gain, and VFB is the feedback regulation
threshold.
Also, there is a right-half-plane zero (FRHPZ) that
exists in continuous conduction mode (the
inductor current does not drop to zero in each
cycle). The frequency of the right-half-plane zero
is determined with Equation (12):
FRHPZ
RLOAD
V
( IN )2 (Hz)
2 L VOUT
MP9184A Rev. 1.1
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6/30/2016
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21
MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
The right-half-plane zero increases the gain and
reduces the phase simultaneously, which results
in a smaller phase and gain margin. The worstcase condition occurs when the input voltage is
at its minimum and the output power is at its
maximum.
Compensation recommendations are listed in the
“Typical Application Circuits” section.
PCB Layout Guidelines
High frequency switching regulators require very
careful layout for stable operation and low noise.
All components must be placed as close to the IC
as possible. For best results, refer to Figure 5
and follow the guidelines below. The
corresponding schematic can be found on page 1.
2
1
2
SDR
SS
AGND
7
3
6
4
5
1
2
2
1
1
C5
R1
2
2
8
7
6
5
R3
1
1
C3
8
2
BST
IN
FB
VDD
1
COMP
2
EN
1
OUT
CLDR
SENS
E
1
2
3
4
2
1
2
1
2
5. Connect the compensation components and
SS capacitor to AGND with a short loop.
6. Connect the VDD capacitor to AGND with a
short loop. Do NOT connect to the PGND net
before connecting to the IC and AGND.
7. Keep the input loop ( C1, R4, Q1, L1, SW,
and PGND) as small as possible. Also, make
the BST and SDR path as short as possible.
8. Place enough GND vias close to the
MP9184A for good thermal dissipation.
9. Do NOT place vias on the SW net.
10. Use a 4-layer
applications.
PCB
for
high-power
11. Place wide copper and vias associated with
the input MOSFET’s drain pin for thermal
dissipation.
Design Example
Below is a design example following the
application guidelines for the specifications:
Table 2: Design Example
VIN
VOUT
IOUT
3.3V-10V
12V
0A to 2A(9)
1
Figure 5: Recommended PCB Layout
1. Keep the output loop (SW, PGND, Q2, and
C2) as small as possible.
2. Place the FB divider R1 and R2 as close as
possible to FB.
3. Route the sensing traces (SENSE and IN) in
parallel closely with a small closed area. A
0805 package is recommended for the
sensing resistor (R4) to reduce parasitic
inductance.
The maximum output current is determined by
the permitted temperature rising, current limit,
and input voltage. The detailed application
schematic is shown in Figure 6. The typical
performance and circuit waveforms have been
shown
in
the
“Typical
Performance
Characteristics” section. For more device
applications, please refer to the related
evaluation board datasheets.
NOTE:
9) The maximum load capability may be limited by the permitted
temperature rising.
4. Connect FB and OUT feedback from the
output capacitor (C2).
MP9184A Rev. 1.1
www.MonolithicPower.com
6/30/2016
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© 2016 MPS. All Rights Reserved.
22
MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
PGND
AGND
SW
BST
TYPICAL APPLICATION CIRCUITS
AGND
PGND
SW
BST
4
Figure 6: 12V Output Synchronous Solution with Input Disconnect Function
Figure 7: 12V Output Synchronous Solution Using an Internal Current-Sensing Circuit
MP9184A Rev. 1.1
www.MonolithicPower.com
6/30/2016
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© 2016 MPS. All Rights Reserved.
23
AGND
PGND
SW
BST
MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
Figure 8: 12V Output Non-Synchronous Solution with Input Disconnect Function
Figure 9: 5V Output Synchronous Solution Using Internal Current-Sensing Circuit
MP9184A Rev. 1.1
www.MonolithicPower.com
6/30/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
24
MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
VIN 3-4.2V
R4 18mX4
L1 1.5uH
SIR802
R7
C6
0
0.1uF
Q1
FDMC7678
Q2
VOUT
C1A C1B C1C
22uF 22uF 22uF
CLDR
GND
EN
GND
GND
R5
100k
IN
C3
GND
22uF 22uF 22uF
OUT
MP9184A
GND
VDD
2.2uF
R6
C4
FB
SS
GND
300k
C5
R2
97.6k
COMP
R8
6.8nF
10nF
R3
GND
GND
124K
R11
100K
100K
Q3
GND
C7
100K
Q5
C9
C8
0.47uF
0.47uF
GND
124K
R13
Q4
GND
0.47uF
R12
R10
91k
R9
27k
GND
GND
Output voltage setting by
GPIO
Port1 Port2
Port3 Vout(V)
0
0
0
5
1
0
0
9
1
1
0
12
1
1
1
15
GND
R1
EN
NC
C2A C2B C2C
SDR
U1
SENSE
GND
GND
Port3
Port2
Port2
Port1
AGND
PGND
COMP
5
3
14
2N7002LT1G
2N7002LT1G
Port3
AGND
PGND
SW
BST
Figure 10: USB Type-C Power Supply Application from Signal Cell Battery
2N7002LT1G
2N7002LT1G
2N7002LT1G
Figure 11: USB Type-C Power Supply Application from Dual Cell Batteries
MP9184A Rev. 1.1
www.MonolithicPower.com
6/30/2016
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© 2016 MPS. All Rights Reserved.
25
MP9184A – 19A, 600KHZ, 20V SYNCHRONOUS BOOST CONVERTER WITH INPUT DISCONNECT FUNCTION
PACKAGE INFORMATION
QFN-22 (3mm x 4mm)
PIN 1 ID
MARKING
PIN 1 ID
0.125 X 45° TYP
PIN 1 ID INDEX
AREA
BOTTOM VIEW
TOP VIEW
SIDE VIEW
0.125 X 45°
NOTE:
RECOMMENDED LAND PATTERN
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MP9184A Rev. 1.1
www.MonolithicPower.com
6/30/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
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