MP9840
36V, 3.5A, Low IQ,
Synchronous Step-Down Converter
DESCRIPTION
FEATURES
The MP9840 is a high-frequency, synchronous,
rectified, step-down, switch-mode converter
with built-in power MOSFETs. It offers a very
compact solution that achieves 3.5A of
continuous output current with excellent load
and line regulation over a wide 3.3V to 36V
input supply range. The switching frequency
can be programmed or synchronized to an
external clock in the range of 350kHz to
2.5MHz. The synchronous operation and ultralow 14μA sleep mode quiescent current provide
high efficiency over the output current load
range, allowing the MP9840 to be used in a
variety of step-down applications in automotive
input environments and battery-powered
applications.
•
•
•
Peak-current-mode operation provides fast
transient response and eases loop stabilization.
The excellent low dropout performance allows
the MP9840 to be used in high duty cycle
applications.
•
•
•
•
•
•
•
2μA Low Shutdown Supply Current
14μA No-Load Quiescent Current
Internal 125mΩ High-Side and 55mΩ LowSide MOSFET
350kHz to 2.5MHz Programmable Switching
Frequency
Power Good (PG) Output
External Soft Start (SS)
80ns Minimum On Time
Selectable Forced CCM and AAM
Hiccup Over-Current Protection (OCP)
Available in a QFN-16 (3mmx4mm)
Package
APPLICATIONS
•
•
Automotive Systems
Industrial Power Systems
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under
Quality Assurance. “MPS” and “The Future of Analog IC Technology” are
registered trademarks of Monolithic Power Systems, Inc.
Full protection features include over-current
protection (OCP), short-circuit protection (SCP),
and thermal shutdown. An open-drain power
good (PG) signal indicates when the output is
within 10% of its nominal voltage.
The MP9840 is available in a space-saving
QFN-16 (3mmx4mm) package.
TYPICAL APPLICATION
VIN
VIN
VOUT
BST
SW
GND
MP9840
OFF ON
FB
EN
SYNC
BIAS
PG
PHASE
VCC
FREQ
MP9840 Rev. 1.01
1/23/2018
AGND
PGND
SS
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
1
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
Package
Top Marking
MP9840GL
QFN-16 (3mmx4mm)
See Below
* For Tape & Reel, add suffix –Z (e.g. MP9840GL–Z)
TOP MARKING
MP: MPS prefix
Y: Year code
W: Week code
9840: First four digits of the part number
LLL: Lot number
PACKAGE REFERENCE
TOP VIEW
FREQ
16
FB
SS
AGND
15
14
13
PHASE
1
12
VCC
VIN
2
11
BST
SW
3
10
SW
PGND
4
9
5
EN
6
SYNC
7
PG
PGND
8
BIAS
QFN-16 (3mmx4mm)
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
2
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
(3)
Supply voltage (VINx) ..................... -0.3V to 40V
Switch voltage (VSWx) ... -0.3V to VIN (MAX) + 0.3V
BST voltage (VBSTx) ....................VSW (MAX) + 6.5V
EN voltage (VENx) ........................... -0.3V to 40V
PG voltage ..................................... -0.3V to 40V
BIAS voltage .................................. -0.3V to 20V
All other pins .................................... -0.3V to 6V
Continuous power dissipation (TA = +25°C) (2)
QFN-16 (3mmx4mm) .................................2.6W
Junction temperature ............................... 150°C
Lead temperature .................................... 260°C
Storage temperature .................. -65°C to 150°C
QFN-16 (3mmx4mm) ............ 48 ....... 11 ... °C/W
θJA
θJC
NOTES:
1) Absolute maximum ratings are rated under room temperature
unless otherwise noted. Exceeding these ratings may
damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation
produces an excessive die temperature, causing the regulator
to go into thermal shutdown. Internal thermal shutdown
circuitry protects the device from permanent damage.
3) Measured on JESD51-7, 4-layer PCB.
Recommended Operating Conditions
Supply voltage (VIN) ....................... 3.3V to 36V
Operating junction temp. (TJ) ...-40°C to +125°C
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
3
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, VEN = 2V, TJ = -40°C to +125°C
+25°C.
Parameter
Symbol
VIN quiescent current
IQ
VIN shutdown current
ISHDN
(4)
, unless otherwise noted. Typical values are at TJ =
Condition
Min
VFB = 0.85V, no load, no
switching, TJ = +25°C
Typ
Max
14
21
VFB = 0.85V, no load, no switching
VIN under-voltage lockout
threshold rising
VIN under-voltage lockout
threshold hysteresis
0.9
VEN_HYS
Feedback reference voltage
VREF
HS switch on resistance
RON_HS
LS switch on resistance
RON_LS
Switching frequency
FSW
(5)
VSYNC_LOW
SYNC input high voltage
VSYNC_HIGH
6
µA
2.8
3.2
V
1.05
mV
1.2
120
TJ = 25°C
V
mV
784
800
816
mV
792
800
808
mV
125
165
mΩ
55
85
mΩ
VBST - VSW = 5V
RFREQ = 180kΩ or from sync clock
RFREQ = 82kΩ or from sync clock
400
850
475
1000
550
1150
kHz
kHz
RFREQ = 27kΩ or from sync clock
2250
2500
2750
kHz
TON_MIN
SYNC input low voltage
2
150
VEN_RISING
EN threshold hysteresis
Minimum on time
2.4
INUVHYS
EN rising threshold
µA
29
VEN = 0V
INUVRISING
Units
80
ns
0.4
1.8
V
V
Current limit
ILIMIT_HS
Duty cycle = 40%
4.6
5.6
7.4
A
Low-side valley current limit
ILIMIT_LS
VOUT = 3.3V, L = 4.7µH
3.1
4.4
5.7
A
ZCD current
Reverse current limit
Switch leakage current
IZCD
0.1
A
ILIMIT_REVERSE
3
A
ISW_LKG
Soft-start current
ISS
VCC regulator
VCC
VCC load regulation
Thermal shutdown
VSS = 0.8V
5
0.01
1
µA
10
15
µA
5
ICC = 5mA
(5)
Thermal shutdown hysteresis
(5)
%
170
°C
TSD_HYS
20
°C
PGRISING
PG falling threshold (VFB/VREF)
PGFALLING
TPG_DEGLITCH
PG output voltage low
3.5
TSD
PG rising threshold (VFB/VREF)
PG deglitch timer
V
VPG_LOW
VFB rising
85
90
95
VFB falling
105
110
115
VFB falling
79
84
89
VFB rising
%
%
113.5 118.5 123.5
%
PG from low to high
30
µs
PG from high to low
50
µs
ISINK = 2mA
0.2
0.4
V
NOTE:
4) Not tested in production and guaranteed by over-temperature correlation.
5) Not tested in production and guaranteed by design and characterization.
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
4
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
5
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
TYPICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted.
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
6
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VOUT = 3.3V, L = 10μH, FSW = 500kHz, AAM, TA = +25°C, unless otherwise noted.
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
7
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10μH, FSW = 500kHz, AAM, TA = +25°C, unless otherwise noted.
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
8
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10μH, FSW = 500kHz, AAM, TA = +25°C, unless otherwise noted.
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
9
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10μH, FSW = 500kHz, AAM, TA = +25°C, unless otherwise noted.
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
10
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10μH, FSW = 500kHz, AAM, TA = +25°C, unless otherwise noted.
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
11
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10μH, FSW = 500kHz, AAM, TA = +25°C, unless otherwise noted.
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
12
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10μH, FSW = 500kHz, AAM, TA = +25°C, unless otherwise noted.
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
13
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 10μH, FSW = 500kHz, AAM, TA = +25°C, unless otherwise noted.
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
14
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
PIN FUNCTIONS
Pin #
QFN-16
(3mmx4mm)
Name
1
PHASE
2
VIN
3, 10
SW
4, 9
PGND
5
EN
6
SYNC
7
PG
8
BIAS
11
BST
12
VCC
13
AGND
14
SS
15
FB
16
FREQ
MP9840 Rev. 1.01
1/23/2018
Description
Selectable in-phase or 180° out-of-phase of SYNC input. Pull PHASE high to be
in-phase. Pull PHASE low to be 180° out-of-phase.
Input supply. VIN supplies power to all of the internal control circuitries and the
power switch connected to SW. Place a decoupling capacitor to ground close to VIN
to minimize switching spikes.
Switch node. SW is the output of the internal power switch.
Power ground. PGND is the reference ground of the power device and requires
careful consideration during PCB layout. For best results, connect PGND with
copper pours and vias.
Enable. Pull EN below the specified threshold to shut the chip down. Pull EN above
the specified threshold to enable the chip.
Synchronize. Apply a 350kHz to 2.5MHz clock signal to SYNC to synchronize the
internal oscillator frequency to the external clock. The external clock should be at
least 250kHz larger than the RFREQ set frequency. SYNC can also be used to select
forced CCM or AAM. Drive SYNC high before the chip starts up to choose forced
CCM; drive SYNC low or leave SYNC floating to choose AAM.
Power good output. The output of PG is an open drain.
Bias input. Connect BIAS to an external power supply (5V ≤ VBIAS ≤ 18V) to reduce
power dissipation and increase efficiency. If not in use, float BIAS or connect BIAS
to ground.
Bootstrap. BST is the positive power supply for the high-side MOSFET driver
connected to SW. Connect a bypass capacitor between BST and SW.
Bias supply. VCC supplies power to the internal control circuit and gate drivers. A
decoupling capacitor (≥1µF) to ground is required close to VCC.
Analog ground. AGND is the reference ground of the logic circuit.
Soft-start input. Place a capacitor from SS to AGND to set the soft-start period. The
MP9840 sources 10µA from SS to the soft-start capacitor during start-up. As the SS
voltage rises, the feedback threshold voltage increases to limit inrush current during
start-up.
Feedback input. Connect FB to the center point of the external resistor divider. The
feedback threshold voltage is 0.8V. Place the resistor divider as close to FB as
possible. Avoid placing vias on the FB traces.
Switching frequency program. Connect a resistor from FREQ to ground to set the
switching frequency.
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
15
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
BLOCK DIAGRAM
BIAS
VCC
VCC
VCC
Regulator
VIN
VCC
EN
Vref
Reference
FREQ
BST
Oscillator
PLL
SYNC
ISW
PHASE
PG
Logic
VREF
SS
FB
+
-
VFB
110%xVREF
+
-
90%xVREF
VFB
Error Amplifier
VFB
+
+
-
Control Logic,
OCP,
OTP,
BST Refresh
SW
VCC
VC
R1
460kΩ
C1
52pF
C2
0.2pF
Ireverse
PGND
AGND
Figure 1: Functional Block Diagram
MP9840 Rev. 1.01
1/23/2018
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2018 MPS. All Rights Reserved.
16
MP9840 – 36V, 3.5A, LOW IQ, SYNC STEP-DOWN CONVERTER
OPERATION
The MP9840 is a synchronous, step-down,
switching regulator with integrated, internal,
high-side and low-side power MOSFETs. The
MP9840 provides 3.5A of highly efficient output
current with current mode control.
The MP9840 features a wide input voltage
range, switching frequency programmable from
350kHz to 2.5MHz, external soft start, and
precision current limit. Its very low operational
quiescent current makes it suitable for batterypowered applications.
Pulse-Width Modulation (PWM) Control
At moderate-to-high output currents, the
MP9840 operates in a fixed-frequency, peakcurrent-control mode to regulate the output
voltage. A pulse-width modulation (PWM) cycle
is initiated by the internal clock. At the rising
edge of the clock, the high-side power
MOSFET (HS-FET) is turned on and remains
on until its current reaches the value set by the
COMP voltage (VCOMP). If the current in the HSFET does not reach VCOMP in one PWM period,
the HS-FET remains on, saving a turn-off
operation.
When the high-side power switch is off, the lowside MOSFET (LS-FET) is turned on
immediately and remains on until the next cycle
begins.
For each turn-on and -off in a switching cycle,
the HS-FET turns on and off with a minimum on
and off time limit.
Advanced Asynchronous Mode (AAM)
The MP9840 employs advanced asynchronous
mode (AAM) functionality to optimize efficiency
during light-load or no-load conditions. AAM
can be enabled by connecting SYNC to a low
level (