MPM3620AGQV-Z

MPM3620A The Future of Analog IC Technology 24 V/2 A DC/DC Module Synchronous Step-Down Converter with Integrated Inductor DESCRIPTION FEATURES The MPM3620A is a synchronous, rectified, step-down module converter with an integrated inductor, two capacitors, and power MOSFETs. It offers a compact solution that requires only 5 external components to achieve a 2 A continuous output current with excellent load and line regulation over a wide input-supply range. Also, it provides fast load transient response. • • • Full protection features include over-current protection (OCP) and thermal shutdown (TSD). MPM3620A eliminates design and manufacturing risks while dramatically improving time-to-market. The MPM3620A is available in a space-saving QFN20 (3mm x 5mm x 1.6mm) package. • • • • • • • • • 4.5 V to 24 V Operating Input Range 2 A Continuous Load Current 90 mΩ/40 mΩ Low RDS(ON) Internal Power MOSFETs Integrated Inductor Integrated VCC and Bootstrap Capacitors Power-Save Mode at Light Load Power Good Indicator Over-Current Protection and Hiccup Thermal Shutdown Output Adjustable from 0.8 V Available in QFN20 (3mm x 5mm x 1.6mm) Package Total Solution Size 6.7mm x 7.3mm APPLICATIONS • • • • • Industrial Controls Medical and Imaging Equipment Telecom and Networking Applications LDO Replacement Space and Resource-Limited Applications All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive. For MPS green status, please visit the MPS website under Quality Assurance. “MPS” and “The Future of Analog IC Technology” are registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION Efficiency VOUT=3.3V 100 90 80 VIN=24V 70 60 50 40 30 0.01 VIN=19V VIN=12V VIN=5V 0.1 1 LOAD CURRENT (A) MPM3620A Rev. 1.0 www.MonolithicPower.com 4/21/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 10 1 MPM3620A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR ORDERING INFORMATION Part Number* MPM3620AGQV Package QFN-20 (3mm x 5mm x 1.6mm) Top Marking See Below * For Tape & Reel, add suffix –Z (e.g. MPM3620AGQ–Z); TOP MARKING MP: MPS prefix Y: Year code W: Week code 3620A: Product code of MPM3620AGQV LLL: Lot number M: Module PACKAGE REFERENCE MPM3620A Rev. 1.0 www.MonolithicPower.com 4/21/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 2 MPM3620A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VIN .............................................. -0.3 V to 28 V VOUT ............................................. -0.3 V to 28 V VSW .................................................................... -0.3 V (-5 V for 1 V (when VFB is above 90% of VREF), PG is pulled high (after a 35 µs delay). During normal operation, PG is pulled low when the VFB drops below 83% of VREF (after an 80µs delay). When UVLO or OTP occurs, PG is pulled low immediately; when OC (over-current) occurs, PG is pulled low when VFB drops below 83% of VREF (after an 80µs delay). Since MPM3620A doesn’t implement dedicated output over-voltage protection, PG will not respond to an output over-voltage condition. Over-Current Protection and Hiccup (OCP) The MPM3620A has a cycle-by-cycle overcurrent limiting control. When the inductor current peak value exceeds the internal peak current-limit threshold, the HS-FET turns off and the LS-FET turns on, remaining on until the inductor current falls below the internal valley current-limit threshold. The valley current-limit circuit decreases the operation frequency (after the peak current-limit threshold is triggered). Meanwhile, the output voltage drops until VFB is below the under-voltage (UV) threshold (50% below the reference, typically). MPM3620A Rev. 1.0 www.MonolithicPower.com 4/21/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 15 MPM3620A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR Once UV is triggered, the MPM3620A enters hiccup mode to re-start the part periodically. This protection mode is useful when the output is dead-shorted to ground and greatly reduces the average short-circuit current to alleviate thermal issues and protect the converter. The MPM3620A exits hiccup mode once the overcurrent condition is removed. Thermal Shutdown (TSD) To prevent thermal damage, MPM3620A stops switching when the die temperature exceeds 150°C. As soon as the temperature drops below its lower threshold (130°C, typically), the power supply resumes operation. Floating Driver and Bootstrap Charging An internal bootstrap capacitor powers the floating power MOSFET driver. This floating driver has its own UVLO protection. This UVLO’s rising threshold is 2.2 V with a hysteresis of 150 mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, M1, C4, L1, and C2 (see Figure 5). If VBST-VSW exceeds 5 V, U1 regulates M1 to maintain a 5 V voltage across C4. Additional RC Snubber Circuit An additional RC snubber circuit can clamp the voltage spike and damp the ringing voltage for better EMI performance. The power dissipation of the RC snubber circuit is estimated using Equation (1): PLoss = fS × CS × VIN2 (1) Where fS is the switching frequency, Cs is the snubber capacitor, and VIN is the input voltage. For improved efficiency, the value of CS should not be set too high. Generally, a 5.6 Ω RS and a 330 pF CS are recommended to generate the RC snubber circuit (see Figure 6). Figure 6—Additional RC snubber circuit Figure 5—Internal bootstrap charging circuit Start-Up and Shutdown If both VIN and VEN exceed their respective thresholds, the chip starts up. The reference block starts first, generating a stable reference voltage, and then the internal regulator is enabled. The regulator provides a stable supply for the remaining circuitries. Three events can shut down the chip: VIN low, VEN low, and thermal shutdown. During the shutdown procedure, the signaling path is blocked first to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. MPM3620A Rev. 1.0 www.MonolithicPower.com 4/21/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 16 MPM3620A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR APPLICATION INFORMATION Setting the Output Voltage The external resistor divider sets the output voltage (see “Typical Application” on page 1). Choose R1 (see Table 1); R2 is then given by Equation (2): R2 = R1 VOUT 0.798V (2) Figure 7—Feedback network −1 See Table 1 and Figure 7 for the feedback network and a list of recommended feedback network parameters for common output voltages. Table 1—Recommended parameters for common output voltages Small solution size(CIN=10µF/0805/25V, COUT=22 µF/0805/16 V) VIN (V) 24 21 19 16 14 VOUT R1 (V) (kΩ) R2 (kΩ) Cf (pF) VOUT ripple (9) (mV) Load transient (10) (mV) R1 (kΩ) R2 Cf (kΩ) (pF) VOUT ripple (9) (mV) Load transient (10) (mV) 5 130 24.9 NS 19.2 162 56 10.7 NS 10.4 103 3.3 120 38.3 NS 13.6 127 75 24 NS 7.6 86 2.5 102 47.5 5.6 10.8 94 62 29.4 5.6 5.8 58 5 115 22 NS 17.6 157 40.2 7.68 NS 9.4 93 3.3 102 32.4 NS 12.4 115 62 19.6 NS 7 83 2.5 102 47.5 5.6 10 87 62 29.4 5.6 5.2 60 5 115 22 NS 16.4 159 40.2 7.68 NS 8.8 93 3.3 102 32.4 NS 11.4 119 62 19.6 NS 6.6 86 2.5 102 47.5 5.6 9.8 91 62 29.4 5.6 5 64 5 115 22 NS 15.6 159 40.2 7.68 NS 7.8 89 3.3 102 32.4 NS 10.6 123 62 19.6 NS 6 90 2.5 102 47.5 5.6 9.6 94 62 29.4 5.6 4.8 68 1.8 102 82 5.6 8.6 71 62 49.9 5.6 4 53 5 115 22 NS 14.8 158 40.2 7.68 NS 7.4 91 3.3 102 32.4 NS 10.2 126 40.2 12.7 NS 5.6 71 2.5 75 34.8 5.6 9.4 82 40.2 18.7 5.6 4.6 58 1.8 102 82 5.6 8.4 81 62 49.9 5.6 4.2 59 1.5 158 180 5.6 7.2 89 62 69.8 5.6 3.6 56 5 100 19.1 NS 13.8 141 34 6.49 NS 6.4 87 3.3 75 24 NS 9.4 110 40.2 12.7 NS 5.2 70 2.5 75 34.8 5.6 9 86 40.2 18.7 5.6 4.4 60 1.8 (11) 12 Low VOUT ripple(CIN=10 µF/0805/25 V, COUT=2X22 µF/0805/16 V) 102 82 5.6 7.8 85 47 37.4 5.6 4 54 (11) 158 180 5.6 6.6 109 47 53.6 5.6 3.4 50 (11) 158 316 5.6 6.2 105 75 147 5.6 3 66 1.5 1.2 MPM3620A Rev. 1.0 www.MonolithicPower.com 4/21/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 17 MPM3620A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR Table 1—Recommended parameters for common output voltages (continued) Small Solution Size(CIN=10µF/0805/25V, COUT=22µF/0805/16V) VIN (V) 10 VOUT R1 (V) (kΩ) Cf (pF) VOUT ripple (9) (mV) Load transient (10) (mV) R1 (kΩ) R2 Cf (kΩ) (pF) VOUT ripple (9) (mV) Load transient (10) (mV) 100 19.1 NS 13.2 141 34 6.49 NS 6.2 82 3.3 75 24 NS 8.4 104 40.2 12.7 NS 4.8 68 2.5 75 34.8 5.6 8.2 87 40.2 18.7 5.6 4 60 1.8 75 59 5.6 7.2 73 47 37.4 5.6 3.6 56 1.5 102 115 5.6 6 87 47 53.6 5.6 3.2 52 1.2 102 205 5.6 5.4 85 62 124 5.6 2.8 59 (11) 102 402 5.6 4.8 82 82 324 5.6 2.6 70 5 100 19.1 NS 9.2 140 34 6.49 NS 5 86 3.3 75 24 NS 7.6 103 40.2 12.7 NS 3.8 72 2.5 75 34.8 5.6 7 87 40.2 18.7 5.6 3.4 60 1.8 75 59 5.6 6.4 76 47 37.4 5.6 3 58 1.5 75 84.5 5.6 5.4 75 47 53.6 5.6 2.8 53 75 147 5.6 5 69 47 93.1 5.6 2.6 50 (11) 1 75 294 5.6 4.6 65 56 221 5.6 2.2 52 3.3 75 24 NS 6 104 40.2 12.7 NS 3.4 74 2.5 75 34.8 5.6 5.8 91 40.2 18.7 5.6 3.2 60 1.8 75 59 5.6 5.2 86 47 37.4 5.6 2.8 58 1.5 62 69.8 5.6 5 73 47 53.6 5.6 2.4 56 62 124 5.6 4.6 67 47 93.1 5.6 2.2 53 62 243 5.6 4.4 66 47 187 5.6 2 50 1 (11) 1.2 5 R2 (kΩ) 5 (11) 8 Low VOUT Ripple(CIN=10µF/0805/25V, COUT=2X22µF/0805/16V) (11) 1.2 (11) 1 NOTES: 9) VOUT PWM ripple is tested when Io=2 A. 10) Load transient from 1 A to 2 A, slew rate =0.8 A/µs. 11) In these specs, BST operation current will charge the output voltage higher than the setting value when there is no load, due to a large resistor divider value. A 10 µA load current can pull the output voltage up to a normal regulation level. Normally, it is recommended to set the output voltage from 0.8 V to 5.5 V. However, it can be set higher than 5.5 V. In this case, the output voltage ripple is larger due to a larger inductor ripple current. An additional output capacitor is needed to reduce the output ripple voltage. If output voltage is high, heat dissipation becomes more important. Please refer to the “PCB Layout Guidelines” section on page 19 to achieve better thermal performance. For thermal consideration, the relationship curve between the output voltage and the maximum Figure 8—Maximum output current vs. output voltage output current is shown in Figure 8. MPM3620A Rev. 1.0 www.MonolithicPower.com 4/21/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 18 MPM3620A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR Selecting the Input Capacitor The input current to the step-down converter is discontinuous, and therefore requires a capacitor to supply the AC current while maintaining the DC input voltage. Use low ESR capacitors for improved performance. Use ceramic capacitors with X5R or X7R dielectrics for optimum results because of their low ESR and small temperature coefficients. For most applications, use a 10 µF capacitor. Since C1 absorbs the input switching current, it requires an adequate ripple-current rating. The RMS current in the input capacitor is estimated with Equation (3): I C1 = ILOAD × VOUT ⎛⎜ VOUT × 1− VIN ⎜⎝ VIN ⎞ ⎟ ⎟ ⎠ (3) Where L1 is the inductor value, RESR is the equivalent series resistance (ESR) value of the output capacitor, and L1=1 μH. For ceramic capacitors, the capacitance dominates the impedance at the switching frequency; the capacitance causes the majority of the output voltage ripple. For simplification, the output voltage ripple is estimated using Equation (6): ΔVOUT = ILOAD 2 For simplification, choose an input capacitor with an RMS current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum, or ceramic. When using electrolytic or tantalum capacitors, add a small, high-quality ceramic capacitor (e.g. 0.1 μF) placed as close to the IC as possible. When using ceramic capacitors, make sure they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at the input. The input voltage ripple caused by capacitance can be estimated using Equation (4): ΔVIN = ⎛ ⎞ ILOAD V V × OUT × ⎜ 1 − OUT ⎟ fS × C1 VIN ⎝ VIN ⎠ ΔVOUT = ΔVOUT = ⎞ VOUT ⎛ VOUT ⎞ ⎛ 1 × ⎜1 − ⎟ × ⎜ RESR + ⎟ fS × L1 ⎝ VIN ⎠ ⎝ 8 × fS × C2 ⎠ (5) VOUT ⎛ V × ⎜ 1 − OUT fS × L1 ⎝ VIN ⎞ ⎟ × RESR ⎠ (7) The characteristics of the output capacitor affect the stability of the regulation system. The MPM3620A internal compensation is optimized for a wide range of capacitance and ESR values. PCB Layout Guidelines(12) Efficient PCB layout is critical to achieve stable operation, particularly for input capacitor placement. For best results, refer to Figure 9 and follow the guidelines below: 1. Use a large ground plane to connect directly to PGND. Add vias near PGND if the bottom layer is ground plane. 2. The high-current paths (PGND, IN, and OUT) should have short, direct, and wide traces. Place the ceramic input capacitor close to IN and PGND. Keep the input capacitor and IN connection as short and wide as possible. 3. Place the external feedback resistors next to FB. 4. Keep the feedback network away from the switching node. (4) Selecting the Output Capacitor The output capacitor (C2) maintains the DC output voltage. Use ceramic, tantalum, or low ESR electrolytic capacitors. For best results, use low ESR capacitors to keep the output voltage ripple low. The output voltage ripple is estimated using Equation (5): (6) For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple is approximated using Equation (7): The worst case condition occurs at VIN = 2 VOUT, where: IC1 = ⎛ V ⎞ VOUT × ⎜ 1 − OUT ⎟ VIN ⎠ 8 × fS 2 × L1 × C2 ⎝ NOTES: 12) The recommended layout is based on the “Typical Application Circuits” section on page 21. MPM3620A Rev. 1.0 www.MonolithicPower.com 4/21/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 19 MPM3620A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR Design Example Table 2 shows a design example following the application guidelines for the specifications below: Table 2—Design example PGND C2 NC NC PGND IN NC EN R1 R2 6.7mm C3 PG R3 VIN VOUT IOUT 12 V 3.3 V 2A The detailed application schematic is shown in Figure 11. The typical performance and circuit waveforms are shown in the “Typical Characteristics” section (For additional device applications, please refer to the related evaluation board datasheets). Top Layer Bottom Layer Figure 9—Recommended PCB layout MPM3620A Rev. 1.0 www.MonolithicPower.com 4/21/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 20 MPM3620A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR TYPICAL APPLICATION CIRCUITS (13)(14) Figure 10—Vo=5 V, Io=2 A Figure 11—Vo=3.3 V, Io=2 A Figure 12—Vo=2.5 V, Io=2 A MPM3620A Rev. 1.0 www.MonolithicPower.com 4/21/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 21 MPM3620A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR TYPICAL APPLICATION CIRCUITS (continued) Figure 13—Vo=1.8 V, Io=2 A Figure 14—Vo=1.5 V, Io=2 A Figure 15—Vo=1.2 V, Io=2 A MPM3620A Rev. 1.0 www.MonolithicPower.com 4/21/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 22 MPM3620A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR TYPICAL APPLICATION CIRCUITS (continued) Figure 16—Vo=1 V, Io=2 A NOTES: 13) In 12 VIN to 1 VOUT application conditions, the HS-FET’s on-time is close to the minimum on-time; although the SW may have a little jitter, the output voltage ripple is smaller than 15 mV in PWM mode. 14) In 12 VIN to 1.5/1.2/1 VOUT application conditions, BST operation current will charge the output voltage higher than the setting value when there is completely no load, due to a large resistor divider value. A 10 µA load current is able to pull the output voltage up to a normal regulation level. MPM3620A Rev. 1.0 www.MonolithicPower.com 4/21/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2015 MPS. All Rights Reserved. 23 MPM3620A – SYNCHRONOUS STEP-DOWN MODULE WITH INTEGRATED INDUCTOR PACKAGE INFORMATION QFN-20 (3mm x 5mm x 1.6mm) 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) SHADED AREA IS THE KEEP-OUT ZONE. ANY PCB METAL TRACE AND VIA ARE NOT ALLOWED TO CONNECT TO THIS AREA ELECTRICALLY OR MECHANICALLY. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETERS MAX. 4) JEDEC REFERENCE IS MO-220. 5) DRAWING IS NOT TO SCALE. NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPM3620A Rev. 0.81 www.MonolithicPower.com 4/21/2015 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. Preliminary Specifications Subject to Change © 2015 MPS. All Rights Reserved. 24