MPM38222GR-P

PRODUCT RELIABILITY REPORT Product: MPM38222/MPM38111 Reliability Department Monolithic Power Systems 79 Great Oaks Boulevard San Jose, CA 95119 Tel: 408-826-0600 Fax: 408-826-0601 Monolithic Power Systems, Inc. 1 1. Device Information Product: Package: Process Technology: Report Date: MPM38222/MPM38111 14-PIN FCM QFN MODULE (4mm×4mm×1.6mm) BCD 08/15/2018 2. Summary of Test Results Test Test Condition Lot# or Date Code Test Results Comment (S.S./Rej) Temperature, Bias, and Operating Life JESD22-A108, @+125°C for 1000 hours or equivalent EP365505 EP320901 EP281609 80/0 80/0 80/0 ESD: Human Body Model (HBM) ANSI/ESDA/JEDEC JS001 EP365505 3/0 ESD: Device Charged Model (CDM) Latch-up ANSI/ESDA/JEDEC JS002 EP365505 3/0 EIA/JESD78 EP365505 6/0 Moisture/Reflow Sensitivity J-STD-020 1517 1519 1535 300/0 300/0 300/0 High Temperature Storage Life JESD22-A103, @150°C for 1000 hours 1517 1519 1535 50/0 50/0 50/0 Temperature Cycling JESD22-A104, from -65°C to 150°C for 1000 cycles or equivalent 1517 1519 1535 80/0 80/0 80/0 Accelerated Moisture ResistanceUnbiased Autoclave JESD22-A102, @121°C/100%RH for 168 hours or equivalent 1517 1519 1535 80/0 80/0 80/0 Steady State Temperature Humidity Bias Life Test JESD22-A101, @85°C/85%RH static bias at Vinmax for 1000 hours or equivalent 1506 1519 1535 80/0 80/0 80/0 VIN/EN1 pin>1800V Other pins>2000V >750V >+/-100mA & >1.5Vccmax MSL = 3 Monolithic Power Systems, Inc. 2 Mechanical Shock (MS) JESD22-B104 1506 15/0 Vibration Variable Frequency (VVF) JESD22-B103 Sequence from MS 1506 15/0 Constant Acceleration (CA) M2001 Sequence from VVF 1506 15/0 3. Failure Rate Calculation Sample Size: Rejects: Activation Energy (eV): Equivalent Device Hours: Failure Rate (FIT@60%CL): MTBF (years): 1646 0 0.7 1.284×108 Hours 7.1 FIT 15,981 Years Revision / Update History Revision 1.0 2.0 Reason for Change Initial release Update Date April 2016 August 2018 Rel Engineer Ramon Lei Ramon Lei Monolithic Power Systems, Inc. 3 Appendix: Description of Reliability Test and Failure Rate Calculation High Temperature Operating Life Test Purpose: This test is a worst-case life test that checks the integrity of the product. The high temperature testing is use for acceleration of any potential failures over time. The calculation for failure rate (FIT) using the operating ambient temperature is done using the Arrhenius equation. Condition: 125°C @ Vccmax Pass Criteria: All units must pass the min/max limits of the datasheet. ESD Test Purpose: Condition: Pass Criteria: The purpose of the ESD test is to guarantee that the device can withstand electrostatic voltages during handling. Human Body Model and Charged Device Model ESD Testing on every pin. The device must be fully functional after testing and pass the min/max limits in the datasheet. IC Latch-Up Test Purpose: The purpose of this specification is to establish a method for determining IC latch-up characteristics and to define latch-up failure criteria. Latch-up characteristics are extremely important in determining product reliability and minimizing No Trouble Found (NTF) and Electrical Overstress (EOS) failures due to latch-up. Condition: Voltage and current injection Pass criteria: All pins with the exception of “no connect” pins and timing related pins, shall be latch-up tested. The device must be fully functional after testing and pass the min/max limits in the datasheet. Moisture/Reflow Sensitivity Classification for Nonhermetic Solid State Surface Mount Devices Purpose: The purpose of this standard is to identify the classification level of nonhermetic solid state surface mount devices (SMDs) that are sensitive to moisture-induced stress so that they can be properly packaged, stored, and handled to avoid damage during assembly solder reflow attachment and/or repair operations. Condition: Bake + moisture sock + 3X reflow at 260°C Pass criteria: All units must pass the min/max limits of the datasheet High Temperature Storage Life Purpose: The test is typically used to determine the effects of time and temperature, under storage conditions, for thermally activated failure mechanisms and time-to-failure distributions of solid state electronic devices, including nonvolatile memory devices (data retention failure mechanisms). Condition: Bake at 150°C Pass Criteria: All units must pass min/max limits of the datasheet Accelerated Moisture Resistance- Unbiased Autoclave Purpose: To check the performance of the device in humid environments. This test checks the integrity of the passivation, poor metal to plastic seal and contamination level during assembly and material compatibility. Condition: 121°C/15psig/100% RH (no bias) Pass Criteria: All units must pass min/max limits of the datasheet Temperature Cycle Test Purpose: This test is used to evaluate the die attach integrity and bond integrity. This is similar to the Thermal Shock test, but can generate different failure modes due to the longer dwell time and gradual temperature change. Condition: -65°C to 150°C Pass Criteria: All units must pass min/max limits of the datasheet Monolithic Power Systems, Inc. 4 Steady State Temperature Humidity Bias Life Test Purpose: This is to check the performance of the device in humid environments. This test checks the integrity of the passivation, poor metal to plastic seal and contamination level during assembly and material compatibility. Condition: 85%RH at 85°C with Vin=Vinmax Pass Criteria: All units must pass min/max limits of the datasheet Highly Accelerated Temperature and Humidity Stress Test Purpose: This is an equivalent test to Steady State Temperature Humidity Bias Life test with different (higher) temperature stress condition. Condition: 85%RH at 130°C with Vin=Vinmax Pass Criteria: All units must pass min/max limits of the datasheet Failure Rate Calculation The failure rate is gauged by a Failures-In-Time (FIT) based upon accelerated stress data. The unit for FIT is failure per billion device hour. Where 𝐹𝐼𝑇 𝑅𝑎𝑡𝑒 = (χ2 /2) × 109 𝐸𝐷𝐻 χ2 (Chi-Squared) is the goodness-of-fit test statistic at a specified level of confidence; EDH= Equivalent Device Hours = AF × (Life test sample size) × (test duration); AF= Acceleration Factor. High Temperature Operating Life (HTOL) test is usually done under acceleration of temperature and voltage. The total number of failures from the stress test determines the chi-squared factor. AF=AFT × AFV The Temperature Acceleration Factor AFT: E AFT = exp a K   1 1    − T   J (use ) TJ ( stress )   TJuse = Junction temp under typical operating conditions; TJstress =Junction temp under accelerated test conditions; Ea is Activation energy=0.7eV; K=Boltzmann’s constant=8.62×10-5 eV/K. The voltage Acceleration Factor AFV: 𝐴𝐹𝑉 = 𝑒 𝛽×[𝑉𝑠𝑡𝑟𝑒𝑠𝑠−𝑉𝑢𝑠𝑒] Vuse = Gate voltage under typical operating conditions; Vstress = Gate voltage under accelerated test conditions; β = Voltage acceleration factor (in 1/Volts) and specified by technology. Note: For calculation in the report, AFV = 1 for simplicity. MTBF (Mean Time Between Failure) equals to 109/FIT (in hours). Monolithic Power Systems, Inc. 5