MPQ2177A
5.5V, 1A, 2.4MHz, Synchronous Step-Down
Converter with Power Good and Soft Start,
AEC-Q100 Qualified
DESCRIPTION
FEATURES
The MPQ2177A is a monolithic, step-down,
switch-mode converter with integrated internal
power MOSFETs. It can achieve up to 1A of
continuous output current (IOUT) across a 2.5V
to 5.5V input voltage (VIN) range, with excellent
load and line regulation. The output voltage
(VOUT) can be regulated to as low as 0.6V.
•
The MPQ2177A is ideal for a wide range of
applications, including automotive clusters,
telematics, and infotainment systems.
•
Constant-on-time (COT) control provides fast
transient response and eases loop stabilization.
Fault protections include cycle-by-cycle current
limiting and thermal shutdown.
The MPQ2177A requires a minimal number of
readily
available,
standard
external
components, and is available in a compact
QFN-8 (1.5mmx2mm) package.
•
•
•
•
Designed for Automotive Applications:
o Wide 2.5V to 5.5V Operating Input
Voltage (VIN) Range
o Up to 1A Output Current (IOUT)
o 1% Feedback (FB) Accuracy
o -40°C to +150°C Operating Junction
Temperature (TJ) Range
o Available in AEC-Q100 Grade 1
Increased Battery Life:
o 21μA Sleep Mode Quiescent Current (IQ)
o AAM Mode for Increased Efficiency
under Light-Load Conditions
High Performance for Improved
Thermals:
o 75mΩ and 45mΩ Integrated Internal
Power MOSFETs
Optimized for EMC and EMI:
o 2.4MHz Switching Frequency (fSW)
o MeshConnectTM Flip-Chip Package
Reduces Board Size and BOM:
o Integrated Internal Power MOSFETs
o Integrated Compensation Network
o Available in a Compact QFN-8
(1.5mmx2mm) Package
Additional Features
o Enable (EN) for Power Sequencing
o Power Good (PG)
o 100% Duty Cycle
o External Soft Start (SS) Control
o Output Discharge
o OVP and SCP with Hiccup Mode
o Available in a Wettable Flank Package
APPLICATIONS
•
•
•
•
•
Automotive Clusters, Telematics, and
Infotainment Systems
Camera Modules
Key Fobs
Industrial Supplies
Battery-Powered Devices
All MPS parts are lead-free, halogen-free, and adhere to the RoHS directive.
For MPS green status, please visit the MPS website under Quality
Assurance. “MPS”, the MPS logo, and “Simple, Easy Solutions” are
trademarks of Monolithic Power Systems, Inc. or its subsidiaries.
MPQ2177A Rev. 1.0
MonolithicPower.com
8/6/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
1
MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
TYPICAL APPLICATION
Efficiency vs. Load Current
vs. Power Loss
VOUT
SW
VIN
OFF ON
FB
PG
SS
GND
EFFICIENCY (%)
OUT
MPQ2177A
EN
100
90
80
70
60
50
40
30
20
10
0
VOUT = 1.2V, L = 2.2μH
(XFL4020-222MEB, DCR = 21.35mΩ)
0.50
0.40
EFFICIENCY
0.30
VIN = 2.5V
VIN = 3.3V
VIN = 5V
VIN = 5.5V
1
0.20
POWER LOSS
10
100
LOAD CURRENT (mA)
MPQ2177A Rev. 1.0
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8/6/2021
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© 2021 MPS. All Rights Reserved.
0.10
POWER LOSS (W)
VIN
0.00
1000
2
MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
ORDERING INFORMATION
Part Number*
MPQ2177AGQHE-AEC1***
Package
QFN-8 (1.5mmx2mm)
Top Marking
See Below
MSL Rating**
1
* For Tape & Reel, add suffix -Z (e.g. MPQ2177AGQHE-AEC1-Z).
** Moisture Sensitivity Level Rating
*** Wettable Flank
TOP MARKING
ME: Product code of MPQ2177AGQHE-AEC1
LL: Lot number
PACKAGE REFERENCE
TOP VIEW
PG 1
8 FB
VIN 2
7 OUT
3
6
SS
GND 4
5
EN
SW
QFN-8 (5mmx2mm)
MPQ2177A Rev. 1.0
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8/6/2021
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3
MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
PIN FUNCTIONS
Pin #
Name Description
1
PG
2
VIN
3
SW
4
GND
5
EN
6
SS
7
OUT
8
FB
Power good indicator. The PG pin is an open-drain output. Connect PG to a voltage source
via an external resistor. If the feedback (FB) voltage (VFB) exceeds 90% of the reference
voltage (VREF), then PG is pulled high. If VFB drops below 85% of VREF, then PG is pulled to
GND. Float this pin if not used.
Supply voltage. The MPQ2177A operates from a 2.5V to 5.5V input. A decoupling capacitor is
required to prevent large voltage spikes at the input.
Output switching node. The SW pin is the drain of the internal P-channel high-side MOSFET
(HS-FET). Connect the inductor to SW to complete the converter.
Ground.
Enable (EN) control. Pull the EN pin above 0.9V to turn the converter on; pull EN below 0.65V
or float EN to turn it off. There is an internal 2MΩ resistor connected between EN and GND.
Soft start. Connect a capacitor between SS and GND to set the soft-start time (tSS) and to
avoid start-up inrush current. The minimum recommended soft-start capacitance (CSS) is 1nF.
Output voltage. Power rail and input sense pin for the output voltage (VOUT). Connect the load
to this pin. An output capacitor (C2) is required to reduce the output voltage ripple (∆VOUT).
Feedback (FB). The FB pin is tapped to an external resistor divider connected between the
output and GND. To set the regulation voltage, VFB is compared to the internal VREF (0.6V).
θJA
θJC
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
All pins ........................................ -0.3V to +6.5V
Junction temperature ............................... 150°C
Lead temperature .................................... 260°C
Continuous power dissipation (TA = 25°C) (2) (5)
……….….. .................................................2.2W
Storage temperature ................ -65°C to +150°C
QFN-8 (1.5mmx2mm)
JESD51-7 (3) (4)….......................130.....25.... °C/W
EVQ2177A-LE-00A (5)..............59.....14.... °C/W
ESD Ratings
Human body model (HBM) .................... ±2000V
Charged device model (CDM) ................. ±750V
Recommended Operating Conditions
Input voltage (VIN) .......................... 2.5V to 5.5V
Output voltage (VOUT)...............0.6V to VIN- 0.5V
Operating junction temp (TJ) .... -40°C to +150°C
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX) - TA) / θJA. Exceeding the maximum allowable power
dissipation can cause excessive die temperature, and the
device may go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) Measured on JESD51-7, 4-layer PCB.
4) The values given in this table are only valid for comparison
with other packages and cannot be used for design purposes.
These values were calculated in accordance with JESD51-7,
and simulated on a specified JEDEC board. They do not
represent the performance obtained in an actual application.
5) Measured on the EVQ2177A-LE-00A, a 4-layer, 6.3cmx6.3cm
PCB with 2oz per layer.
MPQ2177A Rev. 1.0
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8/6/2021
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
ELECTRICAL CHARACTERISTICS
VIN = 3.6V, TJ = -40°C to +150°C, typical values are tested at TJ = 25°C, unless otherwise noted.
Parameter
Input range
Under-voltage lockout
(UVLO) rising threshold
UVLO threshold hysteresis
Shutdown current
Quiescent current
Feedback (FB) voltage
Symbol
VIN
VUVLO_
Condition
RISING
VUVLO_HYS
ISD
IQ
VFB
VEN = 0V, TJ = 25°C
VEN = 0V, TJ = -40°C to +125°C (6)
VEN = 0V, TJ = -40°C to +150°C
VEN = 2V, VFB = 0.63V, VIN = 3.6V,
TJ = 25°C
VEN = 2V, VFB = 0.63V, VIN = 3.6V,
TJ = -40°C to +125°C (6)
VEN = 2V, VFB = 0.63V, VIN = 3.6V,
TJ = -40°C to +150°C
TJ = 25°C
TJ = -40°C to +150°C
VFB = 0.63V
FB current
IFB
P-channel high-side MOSFET
RDS(ON)_HS VIN = 5V
(HS-FET) on resistance
N-channel low-side MOSFET
RDS(ON)_LS VIN = 5V
(LS-FET) on resistance
Zero-current detection (ZCD)
threshold
VEN = 0V, VIN = 6V, VSW = 0V or 6V,
TJ = 25°C
Switch leakage current
VEN = 0V, VIN = 6V, VSW = 0V or 6V,
TJ = -40°C to +125°C (6)
Switching frequency
fSW
VIN = 5V, VOUT = 1.2V, CCM
Minimum on time (6)
tMIN_ON
VIN = 5V
Minimum off time (6)
tMIN_OFF VIN = 5V
P-channel HS-FET peak
ILIMIT_PEAK
current limit
N-channel LS-FET valley
ILIMIT_VALLEY
current limit
Soft-start current
ISS
Maximum duty cycle
Power good (PG) UVLO
VPG_UVLO_
FB rising edge
rising threshold
RISING
VPG_UVLO_
PG UVLO falling threshold
FB falling edge
FALLING
PG delay
PG sink current capability
PG logic high voltage
Self-biased PG
PG leakage current and logic
high
Enable (EN) start-up delay
EN shutdown delay
EN input logic low voltage
Min
2.5
tPGD
VPG_LOW
VPG_HIGH
PG rising/falling edge
Sink 1mA
VIN = 5V, VFB = 0.6V
VIN = 0V, VEN = 0V, PG is pulled up
between 3V and 5.5V via a 100kΩ
resistor
Typ
Max
5.5
Units
V
2.3
2.45
V
1
3
20
mV
μA
μA
μA
30
μA
40
μA
80
μA
200
0.01
21
594
591
600
600
50
606
609
100
75
110
mΩ
45
70
mΩ
50
0
mV
nA
mA
1
μA
30
μA
2000
2400
50
80
2640
kHz
ns
ns
1.6
2.5
3.4
A
0.4
1
1.6
A
1.5
3
100
4.5
µA
% VFB
87
90
93
% VFB
82
85
88
% VFB
0.4
ms
V
V
0.7
V
100
nA
80
4.9
5V logic high
EN on to SW active
EN off to stop switching
0.4
100
30
0.65
MPQ2177A Rev. 1.0
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µs
µs
V
5
MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
ELECTRICAL CHARACTERISTICS (continued)
VIN = 3.6V, TJ = -40°C to +150°C, typical values are tested at TJ = 25°C, unless otherwise noted.
Parameter
EN input logic high voltage
EN pull-down resistor
Output discharge resistor
EN input current
Symbol
Condition
Min
Typ
0.9
2
150
1.2
0
Max
1.2
Units
V
MΩ
Ω
μA
μA
110
115
120
% VFB
RDISCHARGE VEN = 0V, VOUT = 1.2V
VEN = 2V
VEN = 0V
Output over-voltage protection
VOVP_RISING
(OVP) rising threshold
Output OVP hysteresis
VOVP_HYS
Output over-voltage (OV) delay
LS-FET current limit
Current flows from SW to GND
Absolute VIN OVP
After VOUT OVP is enabled
Absolute VIN OVP hysteresis
Thermal shutdown (6)
Thermal shutdown hysteresis (6)
10
2
1.2
6.1
160
170
20
% VFB
µs
A
V
mV
°C
°C
Note:
6) Guaranteed by design and bench characterization. Not tested in production.
MPQ2177A Rev. 1.0
MonolithicPower.com
8/6/2021
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© 2021 MPS. All Rights Reserved.
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
TYPICAL CHARACTERISTICS
VIN = 3.6V, TJ = -40°C to +150°C, unless otherwise noted.
VIN UVLO Threshold vs.
Temperature
EN Threshold vs. Temperature
0.95
2.35
0.90
0.85
2.25
Rising
Falling
2.20
VEN (V)
VIN_UVLO (V)
2.30
2.15
0.80
0.75
Rising
Falling
0.70
0.65
0.60
2.10
0.55
2.05
0.50
-50
-25
0
25
50
75
100 125 150
-50
-25
TEMPERATURE (°C)
0
25
50
75
100 125 150
TEMPERATURE (°C)
Shutdown Current vs.
Temperature
Quiescent Current vs.
Temperature
1.2
33
31
1.0
29
IQ (μA)
ISD (μA)
0.8
0.6
0.4
27
25
23
21
0.2
19
17
0.0
-50
-25
0
25
50
75
-50
100 125 150
-25
600.4
2480
600.2
2460
600.0
2440
599.4
599.2
50
75
100 125 150
Switching Frequency vs.
Temperature
fSW (kHz)
VFB (mV)
Feedback Voltage vs.
Temperature
599.6
25
TEMPERATURE (°C)
TEMPERATURE (°C)
599.8
0
2420
2400
2380
2360
599.0
2340
598.8
2320
598.6
-50
-25
0
25 50 75 100 125 150
TEMPERATURE (°C)
-50
-25
0
25
50
75
100 125 150
TEMPERATURE (°C)
MPQ2177A Rev. 1.0
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8/6/2021
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
TYPICAL CHARACTERISTICS (continued)
VIN = 3.6V, TJ = -40°C to +150°C, unless otherwise noted.
RDS(ON)_HS vs. Temperature
RDS(ON)_HS vs. Temperature
65
100
60
90
RDSON_LS (mΩ)
RDSON_HS (mΩ)
95
85
80
75
70
55
50
45
40
65
60
35
-50
-25
0
25
50
75
100 125 150
-50
-25
TEMPERATURE (°C)
50
75
100 125 150
HS-FET Peak Current Limit vs.
Temperature
1.015
2.52
1.010
2.51
2.50
1.005
ILIMIT_PEAK (A)
ILIMIT_VALLEY (A)
25
TEMPERATURE (°C)
LS-FET Valley Current Limit vs.
Temperature
1.000
0.995
0.990
0.985
2.49
2.48
2.47
2.46
2.45
0.980
2.44
-50
-25
0
25
50
75
100 125 150
-50
-25
TEMPERATURE (°C)
0
25
50
75
100 125 150
TEMPERATURE (°C)
LS-FET Reverse Current Limit vs.
Temperature
PG Threshold vs. Temperature
PG THRESHOLD (% OF VFB)
1.210
1.205
ILIMIT_REVERSE (A)
0
1.200
1.195
1.190
1.185
1.180
1.175
1.170
91
90
89
PG Rising Threshold
PG Falling Threshold
88
87
86
85
84
83
-50
-25
0
25
50
75
100 125 150
TEMPERATURE (°C)
-50
-25
0
25 50 75 100 125 150
TEMPERATURE (°C)
MPQ2177A Rev. 1.0
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
TYPICAL CHARACTERISTICS (continued)
VIN = 3.6V, TJ = -40°C to +150°C, unless otherwise noted.
Zero-Current Detection Threshold
vs. Temperature
Soft-Start Current vs. Temperature
3.08
53
3.06
52
3.02
IZCD (mA)
ISS (μA)
3.04
3.00
2.98
2.96
51
50
49
2.94
48
2.92
-50
-25
0
25
50
75
100 125 150
TEMPERATURE (°C)
-50
-25
0
25
50
75
100 125 150
TEMPERATURE (°C)
MPQ2177A Rev. 1.0
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8/6/2021
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.3V, VOUT = 1.2V, L = 2.2μH, C2 = 22µF, TA = 25°C, unless otherwise noted.
Efficiency vs. Load Current
vs. Power Loss
Efficiency vs. Load Current
VOUT = 1.2V, L = 2.2μH
(XFL4020-222MEB, DCR = 21.35mΩ)
95
0.05
75
65
10
0.01
0.00
1
10
LOAD CURRENT (mA)
100
VOUT = 1.8V, L = 2.2μH
(XFL4020-222MEB, DCR = 21.35mΩ)
90
0.48
85
0.36
VIN = 2.5V
VIN = 3.3V
VIN = 5V
VIN = 5.5V
0.24
0.12
EFFICIENCY (%)
0.60
POWER LOSS (W)
EFFICIENCY (%)
0.02
POWER LOSS
Efficiency vs. Load Current
75
POWER LOSS
70
0.00
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
100
90
80
70
60
50
40
30
20
10
0
0.01
LOAD CURRENT (A)
VIN = 3.3V
VIN = 5V
VIN = 5.5V
VIN = 3V
EFFICIENCY
0.1
1
LOAD CURRENT (mA)
Efficiency vs. Load Current
vs. Power Loss
VOUT = 1.8V, L = 2.2μH
(XFL4020-222MEB, DCR = 21.35mΩ)
VOUT = 1.8V, L = 2.2μH
(XFL4020-222MEB, DCR = 21.35mΩ)
EFFICIENCY
VIN = 3.3V
VIN = 5V
VIN = 5.5V
VIN = 3V
POWER LOSS
1
10
100
LOAD CURRENT (mA)
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0.00
200
EFFICIENCY (%)
Efficiency vs. Load Current
vs. Power Loss
POWER LOSS (W)
EFFICIENCY (%)
0.03
55
EFFICIENCY
97
94
91
88
85
82
79
76
73
70
0.04
VIN = 2.5V
VIN = 3.3V
VIN = 5V
VIN = 5.5V
70
POWER LOSS (W)
0.06
80
60
VOUT = 1.2V, L = 2.2μH
(XFL4020-222MEB, DCR = 21.35mΩ)
80
0.07
EFFICIENCY
85
Efficiency vs. Load Current
vs. Power Loss
95
0.08
90
96
94
92
90
88
86
84
82
80
78
76
10
EFFICIENCY
VIN = 3.3V
VIN = 5V
VIN = 5.5V
VIN = 3V
POWER LOSS
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
POWER LOSS (W)
100
90
80
70
EFFICIENCY
60
50
40
30
VIN = 2.5V
VIN = 3.3V
20
VIN = 5V
VIN = 5.5V
10
0
0.01
0.1
1
LOAD CURRENT (mA)
EFFICIENCY (%)
EFFICIENCY (%)
VOUT = 1.2V, L = 2.2μH
(XFL4020-222MEB, DCR = 21.35mΩ)
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
LOAD CURRENT (A)
MPQ2177A Rev. 1.0
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 3.3V, VOUT = 1.2V, L = 2.2μH, C2 = 22µF, TA = 25°C, unless otherwise noted.
Line Regulation
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
-0.1
-0.2
-0.3
VOUT = 1.2V
LINE REGULATION (%)
LOAD REGULATION (%)
Load Regulation
VIN=2.5V
VIN=3.3V
VIN=5V
VIN=5.5V
0.5
VOUT = 1.2V
0.4
0.3
0.2
0.1
0.0
IOUT = 0.1A
IOUT = 0.5A
-0.1
IOUT = 1A
-0.2
1
10
100
LOAD CURRENT (mA)
1000
2.5
3.0
3.5
4.0
4.5
5.0
INPUT VOLTAGE (V)
MPQ2177A Rev. 1.0
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5.5
11
MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 3.3V, VOUT = 1.2V, L = 2.2μH, C2 = 22µF, TA = 25°C, unless otherwise noted.
Steady State
Steady State
IOUT = 0A
IOUT = 1A
CH2:
VOUT/AC
2mV/div.
CH2:
VOUT/AC
10mV/div.
CH3: VIN
1V/div.
CH4: IL
500mA/div.
CH3: VIN
1V/div.
CH4: IL
500mA/div.
CH1: VSW
2V/div.
CH1: VSW
2V/div.
20ms/div.
400ns/div.
Start-Up through VIN
Start-Up through VIN
IOUT = 0A
IOUT = 1A
CH3: VIN
2V/div.
CH2: VOUT
1V/div.
CH3: VIN
2V/div.
CH2: VOUT
1V/div.
CH4: IL
500mA/div.
CH4: IL
1A/div.
CH1: VSW
2V/div.
CH1: VSW
2V/div.
1ms/div.
1ms/div.
Shutdown through VIN
Shutdown through VIN
IOUT = 0A
IOUT = 1A
CH3: VIN
2V/div.
CH2: VOUT
1V/div.
CH3: VIN
2V/div.
CH2: VOUT
1V/div.
CH4: IL
500mA/div.
CH4: IL
1A/div.
CH1: VSW
2V/div.
CH1: VSW
2V/div.
20ms/div.
4ms/div.
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 3.3V, VOUT = 1.2V, L = 2.2μH, C2 = 22µF, TA = 25°C, unless otherwise noted.
Start-Up through EN
Start-Up through EN
IOUT = 0A
IOUT = 1A
CH3: VEN
3V/div.
CH3: VEN
3V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH4: IL
500mA/div.
CH4: IL
1A/div.
CH1: VSW
2V/div.
CH1: VSW
2V/div.
1ms/div.
1ms/div.
Shutdown through EN
Shutdown through EN
IOUT = 0A
IOUT = 1A
CH3: VEN
3V/div.
CH3: VEN
3V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH4: IL
500mA/div.
CH4: IL
1A/div.
CH1: VSW
2V/div.
CH1: VSW
2V/div.
20ms/div.
20µs/div.
SCP Entry
SCP Entry
IOUT = 0A
IOUT = 1A
CH3: VPG
2V/div.
CH3: VPG
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
CH1: VSW
2V/div.
CH1: VSW
2V/div.
200µs/div.
200µs/div.
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 3.3V, VOUT = 1.2V, L = 2.2μH, C2 = 22µF, TA = 25°C, unless otherwise noted.
SCP Recovery
SCP Recovery
IOUT = 0A
IOUT = 1A
CH2: VOUT
1V/div.
CH3: VPG
2V/div.
CH2: VOUT
1V/div.
CH3: VPG
2V/div.
CH4: IL
2A/div.
CH4: IL
2A/div.
CH1: VSW
2V/div.
CH1: VSW
2V/div.
400µs/div.
400µs/div.
PG Start-Up through VIN
Short Circuit Protection (SCP)
CH2: VOUT
1V/div.
CH3: VPG
2V/div.
IOUT = 1A
CH3: VIN
2V/div.
CH2: VOUT
1V/div.
CH4: IL
1A/div.
CH4: VPG
2V/div.
CH1: VSW
2V/div.
CH1: VSW
2V/div.
200µs/div.
1ms/div.
PG Shutdown through VIN
PG Start-Up through EN
IOUT = 1A
IOUT = 1A
CH3: VEN
3V/div.
CH3: VIN
2V/div.
CH2: VOUT
1V/div.
CH2: VOUT
1V/div.
CH4: VPG
2V/div.
CH4: VPG
2V/div.
CH1: VSW
2V/div.
CH1: VSW
2V/div.
4ms/div.
1ms/div.
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 3.3V, VOUT = 1.2V, L = 2.2μH, C2 = 22µF, TA = 25°C, unless otherwise noted.
PG Shutdown through EN
Load Transient
IOUT = 1A
IOUT = 0.5A to 1A, 1A/μs
CH3: VEN
3V/div.
CH3: VPG
2V/div.
CH2:
VOUT/AC
50mV/div.
CH2: VOUT
1V/div.
CH4: VPG
2V/div.
CH4: IOUT
500mA/div.
CH1: VSW
2V/div.
CH1: VSW
2V/div.
40µs/div.
80µs/div.
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
FUNCTIONAL BLOCK DIAGRAM
VIN
EN
Bias
Voltage
and
VREF
R1
2M
Soft Start
+
COMP
-
VTH
SS
0.6V
RST
+
+ EA
-
ConstantOn-Time
Control
R2
25k
C1
25pF
+
EN
FB
+ COMP
FB
PDRV
PWM
Main
Switch
(PCH)
PWM
SW
Driver
-
VOUT
Ramp
Generator
SW
NDRV
Synchronous
Rectifier
(NCH)
OUT
GND
0.54V
+
COMP
-
PG
Figure 1: Functional Block Diagram
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
OPERATION
The MPQ2177A employs input voltage (VIN)
feed-forward and constant-on-time (COT)
control to stabilize the switching frequency (fSW)
across the entire VIN range. It can achieve 1A of
continuous output current (IOUT) across a 2.5V
to 5.5V VIN range, with excellent load and line
regulation. The output voltage (VOUT) can be
regulated to as low as 0.6V. 100% maximum
duty cycle can be reached in low-dropout mode.
Constant-On-Time (COT) Control
COT control provides a simpler control loop and
faster transient response. The MPQ2177A’s
switching cycles have a fixed minimum off time
(tOFF_MIN) to prevent inductor current (IL)
runaway during load transient. If the low-side
MOSFET (LS-FET) turns on, it remains on for
at least tMIN_OFF (typically 80ns). The high-side
MOSFET (HS-FET) turns on once the feedback
(FB) voltage (VFB) drops below the reference
voltage (VREF). This indicates an insufficient
VOUT. Input voltage feed-forward allows the
device to maintain a nearly constant fSW across
the input range and load range. The fSW on time
(tON) can be calculated with Equation (1):
t ON =
VOUT
400ns
VIN
Advanced Asynchronous Modulation (AAM)
Mode under Light-Load Conditions
The device features advanced asynchronous
modulation (AAM) mode and a zero-current
detection (ZCD) circuit for light-load operation.
The AAM current (IAAM) is set internally. The SW
pin’s on time (tON) is determined by the on-timer
generator and AAM comparator. Under lightload conditions, SW’s tON exceeds the AAM
comparator’s tON. Figure 2 shows the simplified
AAM control logic.
COT Generator
VFB
EN
VREF
FB
Comparator
IL_SENSE
IAAM
HS-FET
Driver
S Q
R
AAM
Comparator
Figure 2: Simplified AAM Control Logic
If the AAM comparator’s tON exceeds the ontimer’s pulse, then the AAM comparator
controls SW’s tON (see Figure 3).
AAM
IOUT
(1)
IL
Light Load during AAM Mode
AAM
Sleep Mode
The MPQ2177A employs sleep mode for high
efficiency under light-load conditions. In sleep
mode, most of the circuit block input currents
(IIN) decrease, specifically the error amplifier
(EA) and pulse-width modulation (PWM)
comparator.
As the load becomes lighter, the converter’s fSW
decreases. If the load continues to decrease
and the off time (tOFF) exceeds 3.5µs, then the
MPQ2177A enters sleep mode. To further
improve light-load efficiency, the converter
consumes a very low quiescent current (IQ)
while in sleep mode.
Once an HS-FET pulse occurs, MPQ2177A
exits sleep mode.
IOUT
IL
Increased Load during AAM Mode
Figure 3: AAM Comparator Control of SW’s tON
When using a lower-value inductor, the AAM
comparator’s tON is below the on-timer. Figure 4
shows the operation mode. The HS-FET
depends on the on-timer; therefore the on-timer
controls tON (see Figure 4).
AAM
IOUT
IL
Light Load with On-Timer
AAM
IOUT
IL
Increased Load with On-Timer
Figure 4: On-Timer Controls of SW’s tON
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
Aside from the on-timer method, the AAM
circuit has another AAM blanking time (150ns)
for sleep mode. This means that if the on-timer
drops below 150ns, then the HS-FET turns off
after an on-timer pulse is generated without
AAM control. In this scenario, IL may not reach
the AAM threshold (see Figure 5).
AAM
IOUT
IL
150ns
150ns
Figure 5: AAM Blanking Time during Sleep Mode
In sleep mode, the on-timer’s pulse is about
40% greater than its pulse during discontinuous
conduction mode (DCM) and continuous
conduction mode (CCM). Figure 6 shows how
the AAM threshold decreases as tON increases
gradually. For CCM, IOUT must exceed half of
the AAM threshold.
AAM THRESHOLD (mA)
600
Output Discharge
If the MPQ2177A shuts down, the device
initiates output discharge mode. The internal
discharge MOSFET provides a resistive
discharge path for the output capacitor (C2)
between the OUT pin and GND. To block the
output discharge path, add an external
capacitor between VOUT and the OUT pin (see
the Output Discharge Blocking section on page
21).
Soft Start (SS)
The MPQ2177A features external soft start
(SS). To avoid overshoot during start-up, the
SS pin ramps up VOUT at a controlled slew rate.
The SS pin’s charge current is typically 3µA.
The soft-start time (tSS) is determined by the
external soft-start capacitor (CSS). tSS can be
calculated with Equation (2):
t SS (ms) =
CSS (nF) 0.6V
ISS (μA)
(2)
Where ISS is the internal soft-start charge
current (3μA).
500
400
It is recommended that CSS be ≥1nF.
300
The device has a pre-biased start-up function.
Once EN is pulled above 0.9V, the converter
starts up regardless of any pre-biased voltage
on the output. Pre-biased start-up works even
while the output discharge path is blocked.
200
100
0
0
1
2
3
4
5
tON (μs)
Figure 6: AAM Threshold Decreases as tON
Increases
The MPQ2177A employs ZCD to determine
whether IL begins to reverse. If IL reaches the
ZCD threshold (typically 50mA), then the LSFET turns off.
Even if VOUT is close to VIN, AAM mode and
ZCD allow the device to continually operate in
DCM under light-load conditions.
Enable (EN) Control
The enable (EN) pin is a digital control pin that
turns the MPQ2177A on and off. Pull EN above
0.9V to turn the converter on; pull EN below
0.65V or float EN to turn it off. Pulling EN to
GND also disables the device. There is an
internal 2MΩ resistor connected between EN
and GND.
Peak Current Limit and Valley Current Limit
Both the HS-FET and LS-FET feature currentlimit protection. If IL reaches the HS-FET’s peak
current limit (ILIMIT_PEAK) threshold (typically
2.5A), then the HS-FET turns off and the LSFET turns on to discharge the energy. The HSFET does not turn again until IL drops below the
valley current limit (ILIMIT_VALLEY) threshold
(typically 1A). This prevents current runaway
during overload and short-circuit events.
Short-Circuit Protection (SCP) and SCP
Recovery
Short-circuit protection (SCP) protects the
circuitries from over-current (OC) faults. If a
VOUT short to GND occurs and the device has
exceeded its current limit, then SCP is triggered
and the IC attempts to recover via hiccup mode.
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
Once the soft-start voltage (VSS) is discharged
completely, the device initiates a new SS. This
process repeats until the fault condition is
removed.
Over-Voltage Protection (OVP)
The MPQ2177A monitors VFB to detect overvoltage (OV) conditions. If VFB exceeds 115% of
VREF, then the converter enters its dynamic
regulation period. During this period, the LSFET remains on until the LS-FET current
reaches -1.2A. This process discharges VOUT to
keep it within its normal range. If the OV
condition still remains after this process, there
is a 1.5µs delay and then the LS-FET turns on
again. Once VFB falls below 105% of VREF, the
converter exits the regulation period. If the
dynamic regulation period cannot prevent VOUT
from increasing and a 6.1V VIN is detected, then
over-voltage protection (OVP) is triggered and
the device stops switching until VIN drops below
6V. Once VIN drops below 6V, the MPQ2177A
resumes normal operation.
Power Good (PG) Indicator
The MPQ2177A has a power good (PG) output
to indicate whether the converter is operating
normally after start-up. PG is the open drain of
an internal MOSFET. It is recommended that
this MOSFET’s maximum RDS(ON) be below
400Ω. PG can be connected to VIN or an
external voltage source via an external resistor
(10kΩ to 100kΩ). Once VIN is applied, the
MOSFET turns on and PG is pulled to GND
before SS is ready. After VFB reaches 90% of
VREF, PG is pulled high by the external voltage
source. If VFB drops to 85% of VREF, then the PG
voltage (VPG) is pulled to GND to indicate an
output failure.
If VINand EN are not available, and PG is
pulled up via an external power supply, then PG
self-biases and asserts. If a 100kΩ pull-up
resistor is being used, then VPG should be
below 0.7V.
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider sets the
MPQ2177A’s adjustable output voltage (VOUT).
Select a feedback (FB) resistor (R1) to reduce
the VOUT leakage current (typically between
10kΩ and 100kΩ). Then R2 can then be
calculated with Equation (3):
R2 =
R1
(3)
VOUT
−1
0.6
VOUT
MPQ2177A
R1
FB
R2
Selecting the Inductor
A 0.47µH to 2.2µH inductor is recommended for
most applications. For high efficiency, select an
inductor with a DC resistance below 25mΩ.
L1 =
Table 1 shows the recommended resistors
value for common output voltages.
Table 1: Resistor Values for Common Output
Voltages
R2 (kΩ)
47 (1%)
100 (1%)
18 (1%)
16 (1%)
15 (1%)
VOUT +RDS(ON) _ P IOUT
t
1 − MIN _ OFF-9
400 10
VOUT (VIN − VOUT )
VIN IL fSW
(4)
(5)
Where ΔIL is the inductor ripple current.
Choose an inductor with a ripple current rating
that is approximately 30% of the maximum load
current (ILOAD). The maximum inductor peak
current (IL_MAX) can be calculated with Equation
(6):
IL(MAX) = ILOAD +
Frequency Scaling at Low Input Voltages
Under heavy-load conditions, the HS-FET
voltage decreases as the on time (tON)
increases and the duty cycle is extended. If the
minimum off time (tOFF_MIN) is reached at a low
input voltage and under heavy-load conditions,
then fSW scales down. To maintain a constant
fSW during heavy-load operation, a larger VOUT is
required for a larger VIN. For a 1.8V VOUT at a
1A load, VIN should be above 2.7V to keep fSW
above 2MHz. If the frequency begins to scale
down, VIN can be estimated with Equation (4):
VIN =
7) Guaranteed by design and bench characterization. Not tested
in production.
For most designs, the inductance (L1) can be
estimated with Equation (5):
Figure 7: Feedback Network
R1 (kΩ)
30.9 (1%)
100 (1%)
36 (1%)
51 (1%)
68 (1%)
Note:
High-frequency, switch-mode power supplies
with magnetic devices (such as the
MPQ2177A) can have strong electromagnetic
inference (EMI). It is recommended to avoid
using unshielded power inductors, as they
provide poor magnetic shielding. Shielded
inductors (e.g. metal alloy or multi-layer chip
power inductors) are highly recommended for
their effective EMI reduction.
Figure 7 shows the FB network.
VOUT (V)
1
1.2
1.8
2.5
3.3
Where the maximum tMIN_OFF is 125ns. (7)
IL
2
(6)
Selecting the Input Capacitor
The step-down converter has a discontinuous
input current (IIN), and requires a capacitor to
supply AC current to the converter while
maintaining the DC input voltage. For the best
performance, it is recommended to use lowESR capacitors. Ceramic capacitors with X5R
or X7R dielectrics are strongly recommended
due to their low ESR and small temperature
coefficients. For most applications, a 10µF
capacitor is sufficient. Higher output voltages
may require a 22μF capacitor to increase
system stability.
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
The input capacitor (C1) requires an adequate
ripple current rating to absorb the switching IIN.
C1’s RMS current rating (IC1) can be estimated
with Equation (7):
IC1 = ILOAD
VOUT VOUT
1−
VIN VIN
(7)
The
worst-case
scenario
occurs
at
VIN = 2 x VOUT, which can be calculated with
Equation (8):
IC1 =
ILOAD
2
(8)
For simplification, choose an input capacitor
with an RMS current rating greater than half of
the maximum load current.
C1 can be an electrolytic, tantalum, or ceramic
capacitor. When using electrolytic or tantalum
capacitors, place a small, high-quality, 0.1μF
ceramic capacitor as close to the IC as
possible. When using ceramic capacitors,
ensure that the capacitor has enough
capacitance to prevent excessive voltage ripple
at the input. The input voltage ripple (∆VIN) can
be estimated with Equation (9):
V
I
V
VIN = LOAD OUT 1 − OUT
fSW C1 VIN
VIN
For simplification, ∆VOUT can be estimated with
Equation (11):
ΔVOUT =
V
VOUT
1 − OUT
2
8 fSW L1 C2
VIN
Ceramic capacitors with X7R or X5R dielectrics
are highly recommended due to their low ESR
and small temperature coefficients.
For tantalum or electrolytic capacitors, the ESR
dominates the impedance at the switching
frequency. For simplification, ∆VOUT can be
estimated with Equation (12):
ΔVOUT =
VOUT
V
1 − OUT
fSW L1
VIN
RESR
(12)
C2’s characteristics can also affect the stability
of the regulation system.
Output Discharge Blocking
If the device is disabled, an internal resistive
discharge path between the OUT pin and GND
is enabled to discharge C2. The discharge path
can be blocked by adding an external capacitor
between VOUT and the OUT pin (see Figure 8).
VOUT
(9)
MPQ2177A
Selecting the Output Capacitor
The output capacitor (C2) stabilizes the DC
VOUT. It is recommended to use ceramic
capacitors for C2. Low-ESR capacitors are
recommended, as they effectively limit the
output voltage ripple (∆VOUT). ∆VOUT can be
estimated with Equation (10):
OUT
VOUT =
(11)
(10)
V
VOUT
1
1 − OUT RESR +
fSW L1
VIN
8 fS C2
Where L1 is the inductance, and RESR is C2’s
equivalent series resistance (ESR).
Blocking
Capacitor
Figure 8: Circuit with VOUT Discharge Blocking
The blocking capacitor should be at least 10nF
to avoid influencing the loop and load transient.
It is recommended to use a 10nF to 100nF
blocking capacitor. A larger-value blocking
capacitor does not have an impact on loop
performance, but is physically larger and is
typically unnecessary for the best results.
When
using
ceramic
capacitors,
the
capacitance dominates the impedance at the
switching frequency and causes the majority of
∆VOUT.
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
PCB Layout Guidelines
Efficient PCB layout is critical for stable
operation. Poor layout design can result in poor
line and load regulation, as well as stability
issues. For the best results, refer to Figure 9
and follow the guidelines below:
1. Place the high-current paths (GND, VIN,
and SW) close to the IC with short, direct,
and wide traces.
2. Place the input capacitor (C1) as close to
the VIN and GND pins as possible.
Top Layer
3. Place the output capacitor (C2) close to the
GND pin.
4. For the adjustable-output version, place the
external feedback resistors close to the FB
pin.
5. Keep the switching node (SW) short and
away from the feedback network.
6. Keep the VOUT_SENSE line (OUT) as short as
possible, and place it as far away from the
inductor as possible. OUT should not
surround the inductor or be close to SW.
Mid-Layer 1
Mid-Layer 2
Bottom Layer
Figure 9: Recommended PCB Layout
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
TYPICAL APPLICATION CIRCUITS
VIN = 5V
2
C1
C2
10μF
0.1μF
SW
VIN
R1
100k
OUT
R4
100k
5
EN
0.65V 0.9V
FB
VOUT =
1.2V/1A
C4
22μF
R2
100k
EN
PG
6
ILIMIT
(Typically 2.5A)
7
MPQ2177A
1
PG
3
L1
2.2μH
8
Typically
0.6V
SS
R3
100k
GND
C3
2.2nF
4
Figure 10: Typical Application Circuit (1.2V Output)
VIN = 5V
2
C1
C2
10μF
0.1μF
R1
100k
OUT
R4
100k
5
EN
0.65V 0.9V
PG
6
SS
C4
22μF
R2
36k
EN
FB
VOUT =
1.8V/1A
ILIMIT
(Typically 2.5A)
7
MPQ2177A
1
PG
C3
2.2nF
SW
VIN
3
L1
1µH
8
Typically
0.6V
R3
18k
GND
4
Figure 11: Typical Application Circuit (1.8V Output)
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MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
PACKAGE OUTLINE DRAWING FOR 8L FCQFN (1.5X2.0MM)-2
MF-PO-D-0483 revision 0.0
PACKAGE INFORMATION
QFN-8 (1.5mmx2mm)
Wettable Flank
PIN 1 ID
0.15X45º TYP
PIN 1 ID
MARKING
PIN 1 ID
INDEX AREA
TOP VIEW
BOTTOM VIEW
SIDE VIEW
SECTION A-A
0.15 X 45°
NOTE:
1) THE LEAD SIDE IS WETTABLE.
2) ALL DIMENSIONS ARE IN MILLIMETERS.
3) LEAD COPLANARITIES SHALL BE 0.08
MILLIMETERS MAX.
4) JEDEC REFERENCE IS MO-220.
5) DRAWING IS NOT TO SCALE.
RECOMMENDED LAND PATTERN
MPQ2177A Rev. 1.0
MonolithicPower.com
8/6/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
24
MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
CARRIER INFORMATION
Pin1
1
1
ABCD
1
1
ABCD
ABCD
ABCD
Feed Direction
Part Number
MPQ2177AGQHEAEC1-Z
Package
Description
QFN-8
(1.5mmx2mm)
Quantity
/Reel
5000
Quantity Quantity
Reel
Carrier
Carrier
/Tube
/Tube
Diameter Tape Width Tape Pitch
N/A
N/A
13in
8mm
MPQ2177A Rev. 1.0
MonolithicPower.com
8/6/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
4mm
25
MPQ2177A – 5.5V, 1A, 2.4MHz, SYNC STEP-DOWN CONVERTER, AEC-Q100
REVISION HISTORY
Revision #
Revision Date
1.0
08/06/2021
Description
Pages Updated
Initial Release
-
Notice: The information in this document is subject to change without notice. Please contact MPS for current specifications.
Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS
products into any application. MPS will not assume any legal responsibility for any said applications.
MPQ2177A Rev. 1.0
MonolithicPower.com
8/6/2021
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2021 MPS. All Rights Reserved.
26
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