MPQ2325
24V, 3A, 500kHz, High-Efficiency,
Synchronous, Step-Down Converter
DESCRIPTION
FEATURES
The
MPQ2325
is
a
high-frequency,
synchronous, rectified, step-down, switch-mode
converter
with
built-in,
internal
power
MOSFETs. It offers a very compact solution
that achieves 3A of continuous output current
with excellent load and line regulation over a
wide input supply range. The MPQ2325 uses
synchronous mode operation for higher
efficiency over the output current load range.
Current mode operation provides a fast
transient response and eases loop stabilization.
Full protection features include over-current
protection (OCP) and thermal shutdown.
The MPQ2325 requires a minimal number of
readily
available,
standard,
external
components and is available in a space-saving,
8-pin, TSOT23 package.
Wide 4.5V to 24V Operating Input Range
90mΩ/40mΩ Low RDS(ON) Internal Power
MOSFETs
Low Quiescent Current
High-Efficiency Synchronous Mode
Operation
Fixed 500kHz Switching Frequency
Frequency Sync from 200kHz to 2MHz
External Clock
Power-Save Mode at Light Load
Internal Soft Start
Power Good Indicator
Over-Current Protection (OCP) and Hiccup
Thermal Shutdown
Output Adjustable from 0.8V
Available in a TSOT23-8 Package
APPLICATIONS
Notebook Systems and I/O Power
Digital Set-Top Boxes
Flat-Panel Televisions and Monitors
All MPS parts are lead-free, halogen-free, and adhere to the RoHS
directive. For MPS green status, please visit the MPS website under Quality
Assurance. “MPS” and “The Future of Analog IC Technology” are registered
trademarks of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
2
VIN
IN
C1
22µF
R4
20
C4
0.1µF
6
7
SW
R1
40.2k
VCC
FB
1
3
EN / SYNC
R3
100k
VOUT
3.3V/3A
L1
4.9µH
MPQ2325
EN/
SYNC
C3
0.1µF
BST
5
8
Rt
33 k
PG
GND
C2
44µF
R2
12.7k
4
MPQ2325 Rev. 1.0
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7/25/2016
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1
MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
ORDERING INFORMATION
Part Number*
MPQ2325GJ
Package
TSOT23-8
Top Marking
See Below
* For Tape & Reel, add suffix –Z (e.g. MPQ2325GJ–Z)
TOP MARKING
AKE: Product code of MPQ2325GJ
Y: Year code
PACKAGE REFERENCE
TSOT23-8
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance (3)
VIN ................................................ -0.3V to +28V
VSW .... -0.3V (-5V < 10ns) to +28V (30V < 10ns)
VBST ............................................................ +6V
All other pins .................................. -0.3V to +6V
Continuous power dissipation (TA = +25°C) (2)
................................................................ 1.25W
Junction temperature ............................... 150°C
Lead temperature .................................... 260°C
Storage temperature .................. -65°C to 150°C
TSOT23-8 ............................ 100 ...... 55 ... °C/W
Recommended Operating Conditions
Supply voltage (VIN) ........................... 4.5 to 24V
Output voltage (VOUT) ............... 0.8V to VIN*DMAX
Operating junction temp (TJ). ... -40°C to +125°C
θJA
θJC
NOTES:
1) The absolute maximum is rated under room temperature
unless otherwise noted. Exceeding these ratings may
damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ (MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD (MAX) = (TJ
(MAX)-TA)/θJA. Exceeding the maximum allowable power
dissipation produces an excessive die temperature, causing
the device to go into thermal shutdown. Internal thermal
shutdown circuitry protects the device from permanent
damage.
3) Measured on JESD51-7, 4-layer PCB.
MPQ2325 Rev. 1.0
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7/25/2016
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2
MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TJ = 25°C.
Parameter
Symbol
Condition
Min
TJ = 25°C
Supply current (shutdown)
IIN
VEN = 0V
Supply current (quiescent)
HS switch on resistance
LS switch on resistance
Switch leakage
Current limit (5)
Iq
VEN = 2V, VFB = 1V
VBST-SW = 5V
VCC = 5V
VEN = 0V, VSW = 12V
Duty cycle = 40%
TJ = 25°C
VFB = 750mV
TJ = -40°C to +125°C
VFB = 200mV
VFB = 750mV
Oscillator frequency
Foldback frequency
Maximum duty cycle
Minimum on time (5)
Sync frequency range
HSRDS-ON
LSRDS-ON
SW LKG
ILIMIT
fSW
fFB
DMAX
TON_MIN
fSYNC
Feedback voltage
VFB
Feedback current
IFB
EN rising threshold
EN hysteresis
VEN_RISING
VFB = 820mV
TJ = 25°C
TJ = -40°C to +125°C
EN input current
20
130
IEN
180
90
40
240
1
4.5
420
6
500
380
90
0.2
779
775
1.2
1.1
VEN_HYS
TJ = 25°C
TJ = -40°C to +125°C
Max
5.5
TJ = -40°C to +125°C
TJ = 25°C
TJ = -40°C to +125°C
VEN = 2V
Typ
1.8
1.6
620
620
0.5
95
60
791
10
1.4
150
2.3
2
803
807
50
1.6
1.7
Units
μA
μA
mΩ
mΩ
μA
A
kHz
fSW
%
ns
MHz
mV
nA
V
mV
2.8
3
TJ = 25°C
50
TJ = -40°C to +125°C
100
VEN = 0
μA
nA
ENTd-off
Power good rising threshold
PGVTH-Hi
0.9
VFB
Power good falling
threshold
PGVTH-LO
0.85
VFB
Power good delay
PGTd
40
μs
Power good sink current
capability
Power good leakage
current
VPG
INUVVth
VIN under-voltage lockout
threshold hysteresis
INUVHYS
VCC load regulation
10
Sink 1mA
IPG-LEAK
VIN under-voltage lockout
threshold rising
VCC regulator
6
VCC
TJ = 25°C
3.7
TJ = -40°C to +125°C
3.6
3.9
14
μs
EN turn-off delay
0.4
V
1
μA
4.1
4.2
650
TJ = 25°C
TJ = -40°C to +125°C
ICC = 5mA
4.65
4.6
4.9
1
MPQ2325 Rev. 1.0
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7/25/2016
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V
mV
5.15
5.2
3
V
%
3
MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TJ = 25°C.
Parameter
Symbol
Soft-start period
Thermal shutdown(4)
Thermal hysteresis(4)
TSS
Condition
Min
Typ
Max
Units
TJ = 25°C
TJ = -40°C to +125°C
0.8
0.5
1.6
2.4
2.7
ms
150
20
°C
°C
NOTES:
4) Derived from bench characterization.
5) Guaranteed by design.
MPQ2325 Rev. 1.0
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MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 12V, VOUT = 3.3V, L = 4.9μH, TA = 25°C, unless otherwise noted.
MPQ2325 Rev. 1.0
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MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.9μH, TA = 25°C, unless otherwise noted.
MPQ2325 Rev. 1.0
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MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VIN = 12V, VOUT = 3.3V, L = 4.9µH, TA = 25°C, unless otherwise noted.
MPQ2325 Rev. 1.0
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MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
PIN FUNCTIONS
Package
Pin #
1
2
3
4
5
6
7
8
Name
Description
Power good output. The output of PG is an open drain. PG is pulled up to VCC by an
external resistor when the output voltage exceeds 90% of the normal voltage. There is a
PG
40µs delay between the time when FB becomes greater than or equal to 90% and PG
rises high.
Supply voltage. IN supplies power for the internal MOSFET and regulator. The
MPQ2325 operates from a +4.5V to +24V input rail. IN requires a low ESR and low
IN
inductance capacitor (C1) to decouple the input rail. Place the input capacitor very close
to IN, and connect it with wide PCB traces and multiple vias.
Switch output. Connect SW to the inductor and bootstrap capacitor. SW is driven up to
VIN by the high-side switch during the PWM duty cycle on time. The inductor current
SW
drives SW negative during the off time. The on resistance of the low-side switch and the
internal body diode fixes the negative voltage. Connect SW using wide PCB traces and
multiple vias.
System ground. GND is the reference ground of the regulated output voltage. GND
GND
requires special consideration during PCB layout. For best results, connect GND with
copper traces and vias.
Bootstrap. A capacitor and a 20Ω resistor connected between SW and BST are required
BST
to form a floating supply across the high-side switch driver.
Enable/sync. Set EN/SYNC = 1 to enable the MPQ2325. An external clock can be
EN/SYNC applied to EN/SYNC to change the switching frequency. For automatic start-up, connect
EN/SYNC to VIN with a 100kΩ resistor.
Bias supply. Decouple VCC with a 0.1μF - 0.22μF capacitor. The capacitance should
VCC
not exceed 0.22μF.
Feedback. An external resistor divider from the output to GND tapped to FB sets the
output voltage. To prevent current limit runaway during a short-circuit fault condition, the
FB
frequency foldback comparator lowers the oscillator frequency when the FB voltage is
below 400mV.
MPQ2325 Rev. 1.0
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MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
BLOCK DIAGRAM
Figure 1: Functional Block Diagram
MPQ2325 Rev. 1.0
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MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
OPERATION
The
MPQ2325
is
a
high-frequency,
synchronous, rectified, step-down, switch mode
converter
with
built-in,
internal
power
MOSFETs. The MPQ2325 offers a very
compact solution that achieves 3A of
continuous output current with excellent load
and line regulation over a wide input supply
range.
The MPQ2325 operates in a fixed-frequency,
peak-current-control mode to regulate the
output voltage. A PWM cycle is initiated by the
internal clock. The integrated high-side power
MOSFET is turned on and remains on until its
current reaches the value set by the COMP
voltage (VCOMP). When the power switch is off, it
remains off until the next clock cycle starts. If
the current in the power MOSFET does not
reach the COMP-set current value within 95%
of one PWM period, the power MOSFET is
forced off.
Under light-load condition, the value of VCOMP is
low. When VCOMP is less than VAAM, and VFB is
less than VREF, VCOMP ramps up until it exceeds
VAAM. During this time, the internal clock is
blocked, so the MPQ2325 skips some pulses
for pulse-frequency modulation (PFM) mode
and achieves a light-load power save.
4
33k
Figure 2: Simplified AAM Control Logic
For VIN = 12V, VOUT = 3.3V, and L = 4.9μH, the
inductor peak current set internally is about
500mA at light load. The AAM voltage is varied
with the duty cycle internally to keep the
inductor peak current constant.
Internal Regulator
Most of the internal circuitries are powered from
the 5V internal regulator. This regulator takes
the VIN input and operates in the full VIN range.
When VIN is greater than 5.0V, the output of
the regulator is in full regulation. When VIN is
lower than 5.0V, the output decreases. A 0.1µF
ceramic capacitor is required for decoupling.
Error Amplifier (EA)
The error amplifier compares the FB voltage
with the internal 0.8V reference (REF) and
outputs a COMP voltage, which is used to
control the power MOSFET current. The
optimized internal compensation network
minimizes the external component count and
simplifies the control loop design.
Power Save Mode for Light-Load Condition
The MPQ2325 uses advanced asynchronous
modulation (AAM) power-save mode for light
load (see Figure 2). Under heavy-load
condition, VCOMP is higher than VAAM. When the
clock goes high, the high-side power MOSFET
turns on and remains on until VILsense reaches
the value set by VCOMP. The internal clock resets
whenever VCOMP is higher than VAAM.
Figure 3: AAM Selection for Common Output
Voltages (VIN = 4.5V - 24V)
Enable/SYNC Control (EN/SYNC)
EN/SYNC is a digital control pin that turns the
regulator on and off. Drive EN/SYNC high to
turn on the regulator; drive EN/SYNC low to
turn off the regulator. There is an internal 1MΩ
resistor from EN/SYNC to GND, so EN/SYNC
can be floated to shut down the chip. The
EN/SYNC voltage is clamped at around 6.5V by
an internal Zener diode. The pull-up resistor
connecting VIN and EN/SYNC should be large
enough to limit the EN/SYNC input current
below 100µA. Generally, a resistor around
100kΩ should be sufficient for all applications.
MPQ2325 Rev. 1.0
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MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
The chip can be synchronized to the external
clock range from 200kHz up to 2MHz through
EN/SYNC about 2ms after the output voltage is
set with the internal clock rising edge
synchronized to the external clock rising edge.
The EN/SYNC synchronized logic high voltage
should be higher than 2V. The EN/SYNC
synchronized logic low voltage should be lower
than 400mV. The EN/SYNC logic high pulse
width must be less than 1.6µs; otherwise, the
internal clock may turn on the high-side
MOSFET. The EN/SYNC logic low pulse width
must be less than 6µs; otherwise, the
MPQ2325 may enter EN/SYNC shutdown.
Power Good (PG) Indicator
The MPQ2325 has an open-drain pin for power
good indication (PG). When FB is higher than
90% of the regulation voltage, PG is pulled up
to VCC by an external resistor. If the FB voltage
drops down to 85% of the regulation voltage,
PG is pulled down to ground by an internal
MOSFET.
Under-Voltage Lockout (UVLO)
Under-voltage lockout (UVLO) is implemented
to protect the MPQ2325 from operating at an
insufficient supply voltage. The MPQ2325
UVLO comparator monitors the output voltage
of the internal regulator (VCC). The UVLO
rising threshold is about 3.9V, while its falling
threshold is a consistent 3.25V.
This protection mode is especially useful when
the output is dead shorted to ground. The
average short-circuit current is reduced greatly
to alleviate thermal issues and protect the
regulator. The MPQ2325 exits hiccup mode
once the over-current condition is removed.
Thermal Shutdown
Thermal shutdown is implemented to prevent
the chip from operating at exceedingly high
temperatures. When the silicon die temperature
is higher than 150°C, the entire chip shuts
down. When the temperature is lower than its
lower threshold (typically 130°C), the chip is
enabled again.
Floating Driver and Bootstrap Charging
The floating power MOSFET driver is powered
by an external bootstrap capacitor. This floating
driver has its own UVLO protection. This
UVLO’s rising threshold is 2.2V with a
hysteresis of 150mV. The bootstrap capacitor
voltage is regulated internally by VIN through
D1, R5, C5, L1, and C2 (see Figure 4). If VIN VSW is more than 5V, U1 regulates M1 to
maintain a 5V BST voltage across C5.
R5
5
Internal Soft Start (SS)
Soft start (SS) is implemented to prevent the
converter output voltage from overshooting
during start-up. When the chip starts up, the
internal circuitry generates a soft-start voltage
that ramps up from 0V. The soft-start period
lasts until the voltage on the soft-start capacitor
exceeds the reference voltage of 0.8V. At this
point, the reference voltage takes over. The
soft-start time is set to around 1.5ms internally.
Over-Current Protection (OCP) and Hiccup
The MPQ2325 uses a cycle-by-cycle overcurrent limit when the inductor current peak
value exceeds the set current limit threshold.
Meanwhile, the output voltage begins dropping
until FB is below the under-voltage (UV)
threshold, typically 50% below the reference.
Once UV is triggered, the MPQ2325 enters
hiccup mode to restart the part periodically.
Figure 4: Internal Bootstrap Charging Circuit
Start-Up and Shutdown
If both VIN and EN/SYNC are higher than their
appropriate thresholds, the chip starts up. The
reference block starts first, generating a stable
reference voltage and current, and then the
internal regulator is enabled. The regulator
provides a stable supply for the remaining
circuitries.
Three events can shut down the chip:
EN/SYNC low, VIN low, and thermal shutdown.
In the shutdown procedure, the signaling path is
first blocked to avoid any fault triggering. VCOMP
and the internal supply rail are then pulled
down. The floating driver is not subject to this
shutdown command.
MPQ2325 Rev. 1.0
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11
MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
APPLICATION INFORMATION
Setting the Output Voltage
The external resistor divider is used to set the
output voltage (see the Typical Application on
page 1). The feedback resistor (R1) also sets
the feedback loop bandwidth with the internal
compensation capacitor. R2 can be calculated
with Equation (1):
R2
R1
VOUT
1
0.8V
(1)
The T-type network is highly recommended
(see Figure 5).
Figure 5: T-Type Network
Table 1 lists the recommended T-type resistors
values for common output voltages.
Table 1: Resistor Selection for Common Output
Voltages
VOUT (V) R1 (kΩ) R2 (kΩ) Rt (kΩ) L (µH) Cf (pF)
1
20.5
76.8
100
1.8
15
1.2
20.5
39.2
100
1.8
15
1.8
40.2
31.6
56
3.3
15
2.5
40.2
18.7
56
3.3
15
3.3
40.2
12.7
33
4.9
15
5
40.2
7.5
33
4.9
15
Selecting the Inductor
A 1µH to 22µH inductor with a DC current rating
at least 25% higher than the maximum load
current is recommended for most applications.
For the highest efficiency, the inductor DC
resistance should be less than 15mΩ. For most
designs, the inductance value can be derived
from Equation (2):
L1
VOUT (VIN VOUT )
VIN IL fOSC
Where ∆IL is the inductor ripple current.
(2)
Choose
the
inductor
current
to
be
approximately 30% of the maximum load
current. The maximum inductor peak current
can be calculated with Equation (3):
IL(MAX ) ILOAD
IL
2
(3)
Under light-load conditions below 100mA, a
larger inductance is recommended for improved
efficiency.
Selecting the Input Capacitor
The input current to the step-down converter is
discontinuous and therefore requires a
capacitor to supply AC current to the step-down
converter while maintaining the DC input
voltage. Use low ESR capacitors for the best
performance. Ceramic capacitors with X5R or
X7R dielectrics are highly recommended
because of their low ESR and small
temperature coefficients. For most applications,
a 22µF capacitor is sufficient.
Since the input capacitor (C1) absorbs the input
switching current, it requires an adequate ripple
current rating. The RMS current in the input
capacitor can be estimated with Equation (4):
IC1 ILOAD
VOUT VOUT
1
VIN
VIN
(4)
The worst-case condition occurs at VIN = 2VOUT,
shown in Equation (5):
IC1
ILOAD
2
(5)
For simplification, choose the input capacitor
with an RMS current rating greater than half of
the maximum load current.
The input capacitor can be electrolytic, tantalum,
or ceramic. When using electrolytic or tantalum
capacitors, a small, high-quality, ceramic
capacitor (i.e.: 0.1μF) should be placed as close
to the IC as possible. When using ceramic
capacitors, ensure that they have enough
capacitance to provide a sufficient charge to
prevent excessive voltage ripple at the input.
The input voltage ripple caused by the
capacitance can be estimated with Equation (6):
VIN
V
ILOAD
V
OUT 1 OUT
fS C1 VIN
VIN
MPQ2325 Rev. 1.0
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(6)
12
MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
Selecting the Output Capacitor
The output capacitor (C2) is required to
maintain the DC output voltage. Ceramic,
tantalum, or low ESR electrolytic capacitors are
recommended. Low ESR capacitors are
recommended to keep the output voltage ripple
low. The output voltage ripple can be estimated
with Equation (7):
VOUT
V
V
OUT 1 OUT
fS L1
VIN
1
RESR
8 fS C2
(7)
Where L1 is the inductor value and RESR is the
equivalent series resistance (ESR) value of the
output capacitor.
In the case of ceramic capacitors, the
impedance at the switching frequency is
dominated by the capacitance. The output
voltage ripple is mainly caused by the
capacitance. For simplification, the output
voltage ripple can be estimated with Equation
(8):
ΔVOUT
V
VOUT
1 OUT
VIN
8 fS L1 C2
2
(8)
In the case of tantalum or electrolytic capacitors,
the ESR dominates the impedance at the
switching frequency. For simplification, the
output ripple can be approximated with
Equation (9):
ΔVOUT
VOUT
V
1 OUT
fS L1
VIN
RESR
RBST
MPQ2325
Figure 6: Optional External BST Diode Added
Bootstrap Diode to Enhance Efficiency
The recommended external BST diode is
IN4148, and the recommended BST cap is
0.1μF - 1μF.
PCB Layout Guidelines (6)
Efficient PCB layout is critical for stable
operation. For best results, refer to Figure 7 and
follow the guidelines below.
1. Keep the connection of the input ground
and GND as short and wide as possible.
2. Keep the connection of the input capacitor
and IN as short and wide as possible.
3. Ensure that all feedback connections are
short and direct.
4. Place
the
feedback
resistors
and
compensation components as close to the
chip as possible.
5. Route SW away from sensitive analog
areas such as FB.
NOTE:
(9)
6) The recommended layout is based on Figure 8 in the Typical
Application Circuit section on page 15.
The characteristics of the output capacitor also
affect the stability of the regulation system. The
MPQ2325 can be optimized for a wide range of
capacitance and ESR values.
External Bootstrap Diode
An external bootstrap diode may enhance the
efficiency of the regulator. The applicable
conditions of the external BST diode are:
VOUT is 5V or 3.3V
Duty cycle is high: D =
VOUT
> 65%
VIN
In these cases, an external BST diode is
recommended from VCC to BST (see Figure 6).
MPQ2325 Rev. 1.0
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13
MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
C3
R1
GND
C4
SW
R4
5
R3
Table 2: Design Example
VIN
VOUT
IO
4
6
7
3
1
R5
2
8
R6
R2
C5
Design Example
Table 2 is a design example following the
application guidelines for the specifications
below.
L1
C1
C1A
Vin
C2
Vout
19V
5V
3A
The detailed application schematics are shown
in Figure 8 through Figure 13. The typical
performance and circuit waveforms are shown
in the Typical Performance Characteristics
section. For more device applications, please
refer to the related evaluation board datasheets.
C2A
GND
VOUT
GND
VCC
EN/SYNC
BST
SW
GND
Figure 7: Sample Board Layout
MPQ2325 Rev. 1.0
www.MonolithicPower.com
7/25/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
14
MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS
U1
C1A
22µF
R3
20
IN
BST
C1
0.1µF
C4
0.1µF
VCC
R5
100k
C5
0.1µF
L1
4.9µH
5V/3A
SW
MPQ2325
C2
22µF
PG
C2A
22µF
C3
15pF
R4
100k
EN
R6
33k
FB
GND
R2
7.5k
R1
40.2k
Figure 8: Vo = 5V, Io = 3A
U1
C1A
22µF
C1
0.1µF
R3
20
IN
BST
C4
0.1µF
VCC
R5
100k
C5
0.1µF
L1
4.9µH
SW
3.3V/3A
C2
22µF
MPQ2325
PG
C2A
22µF
C3
15pF
R4
100k
R6
33k
EN
FB
GND
R2
12.7k
R1
40.2k
Figure 9: Vo = 3.3V, Io = 3A
U1
C1A
22µF
R3
20
IN
BST
C1
0.1µF
C4
0.1µF
VCC
R5
100k
C5
0.1µF
L1
3.3µH
2.5V/3A
SW
C2
22µF
MPQ2325
PG
C3
15pF
R4
100k
EN
C2A
22µF
GND
FB
R6
56k
R2
18.7k
R1
40.2k
Figure 10: Vo = 2.5V, Io = 3A
MPQ2325 Rev. 1.0
www.MonolithicPower.com
7/25/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
15
MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
TYPICAL APPLICATION CIRCUITS (continued)
U1
IN
C1A
22µF
BST
C1
0.1µF
C4
0.1µF
VCC
R5
100k
R3
20
L1
3.3µH
1.8V/3A
SW
C5
0.1µF
C2
22µF
MPQ2325
PG
C2A
22µF
C3
15pF
R4
100k
EN
R6
56k
FB
GND
R2
31.6k
R1
40.2k
Figure 11: Vo = 1.8V, Io = 3A
U1
IN
C1A
22µF
BST
C1
0.1µF
C4
0.1µF
VCC
R5
100k
R3
20
L1
1.8µH
1.2V/3A
SW
C5
0.1µF
C2
22µF
MPQ2325
PG
C2A
22µF
C3
15pF
R4
100k
EN
R6
100k
FB
GND
R2
39.2k
R1
20.5k
Figure 12: Vo = 1.2V, Io = 3A
U1
C1A
22µF
C1
0.1µF
R3
20
IN
BST
C4
0.1µF
VCC
R5
100k
C5
0.1µF
L1
1.8µH
SW
C2
22µF
MPQ2325
PG
C2A
22µF
C3
15pF
R4
100k
EN
1V/3A
R6
100k
GND
FB
R2
76.8k
R1
20.5k
Figure 13: Vo = 1V, Io = 3A
MPQ2325 Rev. 1.0
www.MonolithicPower.com
7/25/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
16
MPQ2325 – 24V, 3A, SYNCHRONOUS, STEP-DOWN CONVERTER
PACKAGE INFORMATION
PACKAGE OUTLINE DRAWING FOR 8L TSOT23
MF-PO-D-0105
revision 3.0
TSOT23-8
See note 7
EXAMPLE
TOP MARK
PIN 1 ID
IAAAA
RECOMMENDED LAND PATTERN
TOP VIEW
SEATING PLANE
SEE DETAIL ''A''
FRONT VIEW
SIDE VIEW
NOTE:
DETAIL ''A''
1) ALL DIMENSIONS ARE IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD
FLASH, PROTRUSION OR GATE BURR.
3) PACKAGE WIDTH DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
4) LEAD COPLANARITY (BOTTOM OF LEADS
AFTER FORMING) SHALL BE 0.10 MILLIMETERS
MAX.
5) JEDEC REFERENCE IS MO-193, VARIATION BA.
6) DRAWING IS NOT TO SCALE.
7) PIN 1 IS LOWER LEFT PIN WHEN READING TOP
MARK FROM LEFT TO RIGHT, (SEE EXAMPLE TOP
MARK)
NOTICE: The information in this document is subject to change without notice. Users should warrant and
guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into
any application. MPS will not assume any legal responsibility for any said applications.
MPQ2325 Rev. 1.0
www.MonolithicPower.com
7/25/2016
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2016 MPS. All Rights Reserved.
17
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