MPQ3426DL-LF-P

MPQ3426 The Future of Analog IC Technology 6A, 35V Boost Converter with Programmable Switching Frequency and UVLO AEC-Q100 Qualified DESCRIPTION FEATURES The MPQ3426 is a current-mode step-up converter with a 6A, 90mΩ internal switch that provides a highly efficient regulator with a fast response. The MPQ3426 features a programmable frequency of up to 2MHz that allows for easy filtering and reduces noise. An external compensation pin gives the user flexibility in setting loop dynamics, and uses small, low-ESR, ceramic output capacitors. Soft-start results in a small inrush current and can be programmed with an external capacitor. The MPQ3426 operates from an input voltage as low as 3.2V and can generate up to a 35V output.  The MPQ3426’s features include under-voltage lockout, current limiting, and thermal overload protection. The MPQ3426 is available in a lowprofile 14-pin 3mm×4mm QFN package with an exposed pad.           Guaranteed Industrial/Automotive Temp. Range Limits 6A, 90mΩ, 45V Power MOSFET Uses Very Small Capacitors and Inductors Wide Input Range: 3.2V to 22V Output Voltage as High as 35V Programmable fsw: 300kHz to 2MHz Programmable UVLO, Soft-Start, UVLO Hysteresis Micropower Shutdown 6V) for automatic startup. EN pin can also be used to program VIN UVLO. Do not leave EN floating. VIN Input Supply. VIN must be locally bypassed. Power Switch Output. SW is the drain of the internal MOSFET switch. Connect to the SW power inductor and output rectifier. VDD LDO Output PGND Power Ground. AGND Analog Ground. Connect to the exposed pad at a single point. Soft-Start. Connect a soft-start capacitor to this pin. The soft-start capacitor charges SS from a 6µA constant current. Leave disconnected if the soft-start is not used. FB Feedback Input. Reference voltage is 1.25V. Connect a resistor divider to this pin. Frequency Set. Connect a resistor from this pin to AGND. FSET pin voltage is internally FSET regulated to 0.5V. The current flowing out of this pin linearly sets the operating frequency. Exposed Pad. The bottom exposed pad is the power ground. For best thermal EP dissipation, solder the exposed pad to the underlying cooper backplane. COMP MPQ3426 Rev.1.01 www.MonolithicPower.com 7/19/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 9 MPQ3426- 6A, 35V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO AEC-Q100 QUALIFIED BLOCK DIAGRAM Figure 1: Functional Block Diagram MPQ3426 Rev.1.01 www.MonolithicPower.com 7/19/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 10 MPQ3426- 6A, 35V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO AEC-Q100 QUALIFIED APPLICATION INFORMATION Components referenced below apply to the Typical Application Circuits on both page 1 and Figure 4. R P O T s i s e r e t s y H O L V U + Once the EN pin reaches about 1.5V (the EN A 4 (ISINK  IR _ BOTTOM )  R TOP M O T T O B EN UVLO Hysteresis The MPQ3426 features a programmable UVLO hysteresis. Upon power up a 4µA current sink (ISINK) is applied to the EN pin, requiring a higher VIN to overcome the current sink. That extra voltage on VIN equals M O T T O B Where R5 is in kΩ R )  R fFSET  23  (R 0.86 FSET  P O T Selecting the Switching Frequency The switching frequency is set by the FSET resistor (RFSET), where: At the same time VIN startup threshold is determined by its UVLO or: R When VCSA and VCOMP are equal, the PWM comparator turns off the switch to force the inductor current through the external rectifier to the output capacitor. This decreases the inductor current. VCOMP controls the peak inductor current, which is controlled by the output voltage. The output voltage is regulated by the inductor current to satisfy the load. Current-mode regulation improves the transient response and control-loop stability. s i s e r e t s y H O L V U At the beginning of each cycle, the N-Channel MOSFET switch turns on, causing the inductor current to rise. The current-sense amplifier (CSA) at the switch’s source internally converts the switch current to a voltage. This voltage goes to a comparator that compares it to the COMP voltage. The COMP voltage is the output of the error amplifier, which is an amplified version of the difference between the 1.225V reference voltage and VFB.    5 . 1 = N VI Theory of Operation The MPQ3426 uses a constant-frequency, peakcurrent–mode, boost regulator architecture to regulate the feedback voltage. Refer to the functional block diagram for the MPQ3426’s operating principles. turn-on threshold), the MPQ3426 starts and the current sink turns off to create the reverse hysteresis for VIN falling. This hysteresis is determined by: Depending on whichever is big.VIN in unit V and RTOP/RBOTTOM in MΩ. VIN RTOP MPQ3426 EN RBOTTOM Figure 2: EN Resistor Divider Table 1: Switching Frequency vs. FSET Resistor Values RFSET (kΩ) Freq (MHz) 180 0.26 160 0.29 150 0.31 143 0.32 66.5 0.62 35.7 1.06 25 1.44 18 1.91 16 2.12 Selecting the Soft-Start Capacitor The MPQ3426 includes a soft-start timer that limits the COMP voltage during startup to prevent excessive input current. This prevents premature source voltage termination at startup due to input-current overshoot. When power is applied to the MPQ3426, and EN goes HIGH, a 6µA internal current source charges the external SS capacitor. As the SS capacitor charges, the SS MPQ3426 Rev.1.01 www.MonolithicPower.com 7/19/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 11 MPQ3426- 6A, 35V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO AEC-Q100 QUALIFIED voltage rises. When the SS voltage reaches 250mV, the MPQ3426 starts switching at 1/5 the programmed frequency (frequency fold-back mode). At 800mV the switching frequency rises to the programmed value. The soft-start ends when the SS voltage reaches 2.5V. This limits the inductor current at start-up, forcing the input current to rise slowly to the required current to regulate the output voltage. The soft-start period is determined by the equation: C  109  2.5V t SS  SS 6A Where CSS (nF) is the soft-start capacitor from SS to GND, and tSS is the soft-start period. Setting the Output Voltage VOUT connects to the top of a resistor divider (R2 and R3); the resistor divider’s tap connects to the FB pin. The feedback voltage is typically 1.225V. The output voltage is then:  R2  VOUT  VFB  1    R3  Where: R2 is the top feedback resistor R3 is the bottom feedback resistor VFB is the feedback reference (typically 1.225V) voltage To increase efficiency, use ≥10kΩ feedback resistors. Selecting the Input Capacitor The input requires a capacitor to supply the AC ripple current to the inductor, while limiting noise at the input source. Use a low-ESR capacitor with a value >4.7µF to minimize the IC noise. Ceramic capacitors are preferred, but tantalum or low-ESR electrolytic capacitors can also suffice. However since it absorbs the input switching current it requires an adequate ripple current rating. Use a capacitor with an RMS current rating greater than the inductor ripple current. To ensure stable operation, place the input capacitor as close to the IC as possible. As an alternative, place a small, high-quality ceramic 0.1µF capacitor close to the IC and place the larger capacitor further away. If using the latter technique, use either tantalum- or electrolytictype capacitors for the larger capacitor. Place all ceramic capacitors close to the MPQ3426. Selecting the Output Capacitor The output capacitor maintains the DC output voltage. For best results, use low-ESR capacitors to minimize the output voltage ripple. The output capacitor’s characteristics also affect regulatory control system’s stability. For best results, use ceramic, tantalum, or low-ESR electrolytic capacitors. For ceramic capacitors, the capacitance dominates the impedance at the switching frequency, and so the output voltage ripple is mostly independent of the ESR. The output voltage ripple is estimated as VIN VOUT :  C OUT  f SW 1 VRIPPLE  ILOAD Where VRIPPLE is the output ripple voltage, VIN and VOUT are the DC input and output voltages, respectively, ILOAD is the load current, fSW is the switching frequency, and COUT is the value of the output capacitor. For tantalum or low-ESR electrolytic capacitors, the ESR dominates the impedance at the switching frequency, and so the output ripple is: VIN VOUT I  R ESR  VOUT   LOAD C OUT  f SW VIN 1 VRIPPLE  ILOAD Where RESR is the equivalent series resistance of the output capacitors. Choose an output capacitor that satisfies the output ripple and load transient requirements of the design. A 4.7µF-to-22µF ceramic capacitor is suitable for most applications. Selecting the Inductor The inductor forces the output voltage higher than the input voltage. A larger inductor value results in less ripple current and reduces the peak inductor current; this reduces the stress on the internal N-channel switch. However, a largervalue inductor is physically larger, has a higher series resistance, and/or lower saturation current. MPQ3426 Rev.1.01 www.MonolithicPower.com 7/19/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 12 MPQ3426- 6A, 35V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO AEC-Q100 QUALIFIED A good rule of thumb is to allow the peak-to-peak ripple current to equal 30% to 50% of the maximum input current. Make sure that the peak inductor current is less than 75% of the current limit during duty-cycle operation to prevent regulator losses due to the current limit. Also make sure that the inductor does not saturate under the worst-case load transient and startup conditions. Calculate the required inductance value using the following equations: L VIN  ( VOUT  VIN ) VOUT  f SW  I IIN(max)  VOUT  ILOAD(MAX) VIN   Where: ILOAD(max) = maximum load current ∆I = peak-to-peak inductor ripple current ∆I = (30% to 50%) × ILOAD (MAX) ŋ = efficiency. Selecting the Diode The output rectifier diode supplies current to the inductor when the internal MOSFET is off. Use a Schottky diode to reduce losses due to the diode forward voltage and recovery time. The diode should be rated for a reverse voltage equal to or greater than the expected output voltage. The average current rating must exceed the maximum expected load current, and the peak current rating must exceed the peak inductor current. Compensation The output of the transconductance error amplifier (COMP) compensates the regulation control system. The system uses two poles and one zero to stabilize the control loop. The poles are fP1 (set by the output capacitor COUT and the load resistance) and fP2 (set by the compensation capacitor CCOMP and the compensation resistor RCOMP). These are determined by the equations: fP1  fP 2 1 (Hz) 2    R LOAD  C OUT G EA  (Hz) 2    A VEA  C COMP f Z1  1 2    R COMP  C COMP (Hz) Where RLOAD is the load resistance, GEA is the error amplifier transconductance, and AVEA is the error amplifier voltage gain. The DC loop gain is A VDC  A VEA  VIN  RLOAD  VFB  GCS (V/V) 0.5  VOUT 2 Where GCS is the compensation voltage/inductor current gain, and the VFB is the feedback regulation threshold. There is also a right-half-plane zero (fRHPZ) that exists in continuous conduction mode (the inductor current does not drop to zero for each cycle). The fRHPZ is: fRHPZ  V R LOAD    IN 2    L  VOUT 2   (Hz)  Table 2 lists a few compensation component combinations for different input voltages, output voltages and capacitances for the mostfrequently–used output ceramic capacitors. Ceramic capacitors generally have extremely low ESR, and therefore do not require the second compensation capacitor (from COMP to GND). For faster control loop and better transient response, select CCOMP (C7) from Table 2: Recommended Component Values. Then gradually increase the RCOMP (R6) value and check the load step response to find a value that minimizes any output voltage ringing or overshoot at the load step edge. Finally, check the compensator design by calculating the DC loop gain and the crossover frequency. The crossover frequency where the loop gain drops to 0dB (a gain of 1) can be obtained visually by placing a -20dB/decade slope at each pole, and a +20dB/decade slope at each zero. The crossover frequency should be at least one decade below the fRHPZ at the maximum output load current to obtain a high-enough phase margin for stability. MPQ3426 Rev.1.01 www.MonolithicPower.com 7/19/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 13 MPQ3426- 6A, 35V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO AEC-Q100 QUALIFIED Table 2: Recommended Component Values VIN (V) VOUT (V) COUT (µF) RCOMP (kΩ) CCOMP (nF) Switching Frequency (kHz) Inductor (µH) 3.2 3.2 3.2 5 5 5 5 5 12 12 12 12 12 12 12 12 18 18 18 24 24 24 4.7 10 22 10 22 4.7 10 22 4.7 10 22 10 15 30 12 25 12 25 50 10 20 40 6.8 6.8 6.8 4.9 4.9 4.9 4.9 4.9 6.8 6.8 6.8 600 600 600 600 600 600 600 600 600 600 600 8.2 8.2 8.2 6.8 6.8 10 10 10 10 10 10 Layout Considerations High frequency switching regulators require very careful layout for stable operation and low noise. Place all components as close to the IC as possible. Keep the path between L1, D1, and COUT extremely short to minimize noise and ringing. Place CIN close to the VIN pin to maximize decoupling. Keep all feedback components close to the FB pin to prevent noise injection on the FB pin trace. Tie the CIN and COUT ground returns close to the GND pin. Figure 3 shows the recommended component placement for the MPQ3426. Design example Below is a design example following the application guidelines for the following specifications: Table 3: Design Example VIN 8V-22V VOUT 24V fSW 300kHz The typical application circuit for VOUT = 24V on page 1 shows the detailed application schematic, and is the basis for the typical performance and circuit waveforms. For more detailed device applications, please refer to the schematic on page 1. Figure 3: Recommended PCB Layout MPQ3426 Rev.1.01 www.MonolithicPower.com 7/19/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 14 MPQ3426- 6A, 35V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO AEC-Q100 QUALIFIED TYPICAL APPLICATION CIRCUIT Figure 4: Typical Application Schematic—15V Output MPQ3426 Rev.1.01 www.MonolithicPower.com 7/19/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 15 MPQ3426- 6A, 35V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO AEC-Q100 QUALIFIED PACKAGE INFORMATION (FOR MPQ3426DLE) QFN14 (3X4mm) PIN 1 ID 0.30X45° TYP PIN 1 ID MARKING PIN 1 ID INDEX AREA TOP VIEW BOTTOM VIEW SIDE VIEW SECTION A-A NOTE: 1) THE LEAD SIDE IS WETTABLE. 2) ALL DIMENSIONS ARE IN MILLIMETERS. 3) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 4) LEAD COPLANARITY SHALL BE 0.08 MILLIMETERS MAX. 5) JEDEC REFERENCE IS MO-220. 6) DRAWING IS NOT TO SCALE. RECOMMENDED LAND PATTERN MPQ3426 Rev.1.01 www.MonolithicPower.com 7/19/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 16 MPQ3426- 6A, 35V BOOST CONVERTER WITH PROGRAMMABLE SWITCHING FREQUENCY AND UVLO AEC-Q100 QUALIFIED PACKAGE INFORMATION (FOR MPQ3426DL) QFN14 (3X4mm) 2.90 3.10 1.65 1.75 0.35 0.45 PIN 1 ID MARKING PIN 1 ID SEE DETAIL A 1 14 0.20 0.30 3.25 3.35 3.90 4.10 PIN 1 ID INDEX AREA 0.50 BSC 7 8 TOP VIEW BOTTOM VIEW 0.80 1.00 0.20 REF PIN 1 ID OPTION A 0.30x45º TYP. PIN 1 ID OPTION B R0.20 TYP. 0.00 0.05 SIDE VIEW DETAIL A 2.90 0.70 NOTE: 1.70 1) ALL DIMENSIONS ARE IN MILLIMETERS. 2) EXPOSED PADDLE SIZE DOES NOT INCLUDE MOLD FLASH. 3) LEAD COPLANARITY SHALL BE 0.10 MILLIMETER MAX. 4) DRAWING CONFORMS TO JEDEC MO-229, VARIATION VEED-5. 5) DRAWING IS NOT TO SCALE. 0.25 3.30 0.50 RECOMMENDED LAND PATTERN NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MPQ3426 Rev.1.01 www.MonolithicPower.com 7/19/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. 17